pn.pnx

用VHDL语言编写的PN码产生程序

<?xml version='1.0' encoding='utf-8' ?>
<!DOCTYPE ibis [
<!ELEMENT ibis (part, pin+)>
<!ELEMENT part EMPTY>
<!ELEMENT pin EMPTY>
<!ATTLIST part
  arch   CDATA #REQUIRED
  device CDATA #REQUIRED
  spg    CDATA #REQUIRED
  pkg    CDATA #REQUIRED>
<!ATTLIST pin
  nm     CDATA #REQUIRED
  no     CDATA #REQUIRED
  iostd  (LVTTL|SSTL3_I|LVCMOS33|LVCMOS25|SSTL2_I|LVCMOS18|LVCMOS15|HSTL_I|NA) "NA"
  sr     (SLOW|FAST|slow|fast) "SLOW"
  dir    (BIDIR|bidir|INPUT|input|OUTPUT|output) "BIDIR">
]>
<ibis><part pkg="VQ44" spg="-6" arch="acr2" device="XA2C32A"/><pin nm="clk" no="43" dir="input" iostd="LVCMOS18"/><pin nm="seq&lt;10&gt;" no="38" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;11&gt;" no="37" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;12&gt;" no="36" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;13&gt;" no="34" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;14&gt;" no="33" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;15&gt;" no="32" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;1&gt;" no="31" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;2&gt;" no="30" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;3&gt;" no="29" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;4&gt;" no="28" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;5&gt;" no="27" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;6&gt;" no="23" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;7&gt;" no="22" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;8&gt;" no="21" sr="fast" dir="output" iostd="LVCMOS18"/><pin nm="seq&lt;9&gt;" no="20" sr="fast" dir="output" iostd="LVCMOS18"/></ibis>