pn.ucf

用VHDL语言编写的PN码产生程序

NET "clk" TNM_NET = "clk";
TIMESPEC "TS_clk" = PERIOD "clk" 10 ns HIGH 50 %;
#PACE: Start of Constraints generated by PACE

#PACE: Start of PACE I/O Pin Assignments
NET "clk"  LOC = "P2"  ;
NET "seq<10>"  LOC = "P20"  ;
NET "seq<11>"  LOC = "P21"  ;
NET "seq<12>"  LOC = "P22"  ;
NET "seq<13>"  LOC = "P23"  ;
NET "seq<14>"  LOC = "P27"  ;
NET "seq<15>"  LOC = "P28"  ;
NET "seq<1>"  LOC = "P3"  ;
NET "seq<2>"  LOC = "P5"  ;
NET "seq<3>"  LOC = "P6"  ;
NET "seq<4>"  LOC = "P8"  ;
NET "seq<5>"  LOC = "P12"  ;
NET "seq<6>"  LOC = "P13"  ;
NET "seq<7>"  LOC = "P14"  ;
NET "seq<8>"  LOC = "P16"  ;
NET "seq<9>"  LOC = "P19"  ;

#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE