sfr28.h

基于瑞萨 M16C 的最新版本 IIC 通信

#define     u2ere       u2c1_addr.bit.b7    /* Error signal output enable bit */

/*------------------------------------------------------
    Count start flag
------------------------------------------------------*/
union byte_def tabsr_addr;
#define     tabsr       tabsr_addr.byte

#define     ta0s        tabsr_addr.bit.b0   /* Timer A0 count start flag */
#define     ta1s        tabsr_addr.bit.b1   /* Timer A1 count start flag */
#define     ta2s        tabsr_addr.bit.b2   /* Timer A2 count start flag */
#define     ta3s        tabsr_addr.bit.b3   /* Timer A3 count start flag */
#define     ta4s        tabsr_addr.bit.b4   /* Timer A4 count start flag */
#define     tb0s        tabsr_addr.bit.b5   /* Timer B0 count start flag */
#define     tb1s        tabsr_addr.bit.b6   /* Timer B1 count start flag */
#define     tb2s        tabsr_addr.bit.b7   /* Timer B2 count start flag */

/*------------------------------------------------------
    Clock prescaler reset flag
------------------------------------------------------*/
union byte_def cpsrf_addr;
#define     cpsrf       cpsrf_addr.byte

#define     cpsr        cpsrf_addr.bit.b7   /* Clock prescaler reset flag */

/*------------------------------------------------------
    One-shot start flag
------------------------------------------------------*/
union byte_def onsf_addr;
#define     onsf        onsf_addr.byte

#define     ta0os       onsf_addr.bit.b0    /* Timer A0 one-shot start flag */
#define     ta1os       onsf_addr.bit.b1    /* Timer A1 one-shot start flag */
#define     ta2os       onsf_addr.bit.b2    /* Timer A2 one-shot start flag */
#define     ta3os       onsf_addr.bit.b3    /* Timer A3 one-shot start flag */
#define     ta4os       onsf_addr.bit.b4    /* Timer A4 one-shot start flag */
#define     tazie       onsf_addr.bit.b5    /* Z-phase input enable bit */
#define     ta0tgl      onsf_addr.bit.b6    /* Timer A0 event/trigger select bit */
#define     ta0tgh      onsf_addr.bit.b7    /* Timer A0 event/trigger select bit */

/*------------------------------------------------------
    Trigger select register
------------------------------------------------------*/
union byte_def trgsr_addr;
#define     trgsr       trgsr_addr.byte

#define     ta1tgl      trgsr_addr.bit.b0   /* Timer A1 event/trigger select bit */
#define     ta1tgh      trgsr_addr.bit.b1   /* Timer A1 event/trigger select bit */
#define     ta2tgl      trgsr_addr.bit.b2   /* Timer A2 event/trigger select bit */
#define     ta2tgh      trgsr_addr.bit.b3   /* Timer A2 event/trigger select bit */
#define     ta3tgl      trgsr_addr.bit.b4   /* Timer A3 event/trigger select bit */
#define     ta3tgh      trgsr_addr.bit.b5   /* Timer A3 event/trigger select bit */
#define     ta4tgl      trgsr_addr.bit.b6   /* Timer A4 event/trigger select bit */
#define     ta4tgh      trgsr_addr.bit.b7   /* Timer A4 event/trigger select bit */

/*--------------------------------------------------------
    Up/down flag ; Use "MOV" instruction to write to this register.
--------------------------------------------------------*/
union byte_def   udf_addr;               /* UP/down flag */
#define     udf     udf_addr.byte

/*------------------------------------------------------
    Timer B2 special mode register
------------------------------------------------------*/
union byte_def tb2sc_addr;
#define     tb2sc      tb2sc_addr.byte

#define     pwcon          tb2sc_addr.bit.b0   /* Timer B2 reload timing switching bit */
#define     ivpcr1         tb2sc_addr.bit.b1   /* Three phase output port ~SD control bit 1 */
#define     tb0en          tb2sc_addr.bit.b2   /* Timer B0 operation mode select bit */
#define     tb1en          tb2sc_addr.bit.b3   /* Timer B1 operation mode select bit */
#define     tb2sel         tb2sc_addr.bit.b4   /* Trigger select bit */
#define     tb0trig        tb2sc_addr.bit.b5   /* Timer B0 A/D Trigger select bit */
#define     tb1trig        tb2sc_addr.bit.b6   /* Timer B1 A/D Trigger select bit */

/*------------------------------------------------------
    UART0 baud rate generation register ; Use "MOV" instruction when writing to these registers.
------------------------------------------------------*/
union byte_def u0brg_addr;
#define     u0brg       u0brg_addr.byte

/*------------------------------------------------------
    UART1 baud rate generation register ; Use "MOV" instruction when writing to these registers.
------------------------------------------------------*/
union byte_def u1brg_addr;
#define     u1brg       u1brg_addr.byte

/*------------------------------------------------------
    UART transmit/receive control register 2
------------------------------------------------------*/
union byte_def ucon_addr;
#define     ucon        ucon_addr.byte

#define     u0irs       ucon_addr.bit.b0    /* UART0 transmit interrupt cause select bit */
#define     u1irs       ucon_addr.bit.b1    /* UART1 transmit interrupt cause select bit */
#define     u0rrm       ucon_addr.bit.b2    /* UART0 continuous receive mode enable bit */
#define     u1rrm       ucon_addr.bit.b3    /* UART1 continuous receive mode enable bit */
#define     clkmd0      ucon_addr.bit.b4    /* CLK/CLKS select bit 0 */
#define     clkmd1      ucon_addr.bit.b5    /* CLK/CLKS select bit 1 */
#define     rcsp        ucon_addr.bit.b6    /* Separate RTS/CTS bit */

/*------------------------------------------------------
    AD trigger control register
------------------------------------------------------*/
union byte_def adtrgcon_addr;
#define     adtrgcon    adtrgcon_addr.byte

#define     sse        adtrgcon_addr.bit.b0 /* A/D operation mode select bit 2 */
#define     dte        adtrgcon_addr.bit.b1 /* A/D operation mode select bit 3 */
#define     hptrg0     adtrgcon_addr.bit.b2 /* AN0 trigger select bit */
#define     hptrg1     adtrgcon_addr.bit.b3 /* AN1 trigger select bit */

/*------------------------------------------------------
    AD convert status register 0
------------------------------------------------------*/
union byte_def adstat0_addr;
#define     adstat0     adstat0_addr.byte

#define     aderr0      adstat0_addr.bit.b0 /* AN1 trigger status flag */
#define     aderr1      adstat0_addr.bit.b1 /* Conversion termination flag */
#define     adtcsf      adstat0_addr.bit.b3 /* Delayed triggered sweep status flag */
#define     adstt0      adstat0_addr.bit.b4 /* AN0 conversion status flag */
#define     adstt1      adstat0_addr.bit.b5 /* AN1 conversion status flag */
#define     adstrt0     adstat0_addr.bit.b6 /* AN0 conversion completion status flag */
#define     adstrt1     adstat0_addr.bit.b7 /* AN1 conversion completion status flag */

/*------------------------------------------------------
    A/D control register 2
------------------------------------------------------*/
union byte_def adcon2_addr;
#define     adcon2      adcon2_addr.byte

#define     smp         adcon2_addr.bit.b0  /* A/D conversion method select bit */
#define     adgsel0     adcon2_addr.bit.b1  /* AD input group select bit */
#define     adgsel1     adcon2_addr.bit.b2  /* AD input group select bit */
#define     cks2        adcon2_addr.bit.b4  /* Frequency select bit 2 */
#define     trg1        adcon2_addr.bit.b5  /* Trigger select bit */

/*------------------------------------------------------
    A/D control register 0
------------------------------------------------------*/
union byte_def adcon0_addr;
#define     adcon0      adcon0_addr.byte

#define     ch0         adcon0_addr.bit.b0  /* Analog input pin select bit */
#define     ch1         adcon0_addr.bit.b1  /* Analog input pin select bit */
#define     ch2         adcon0_addr.bit.b2  /* Analog input pin select bit */
#define     md0         adcon0_addr.bit.b3  /* A/D operation mode select bit 0 */
#define     md1         adcon0_addr.bit.b4  /* A/D operation mode select bit 0 */
#define     trg         adcon0_addr.bit.b5  /* Trigger select bit */
#define     adst        adcon0_addr.bit.b6  /* A/D conversion start flag */
#define     cks0        adcon0_addr.bit.b7  /* Frequency select bit 0 */

/*------------------------------------------------------
    A/D control register 1
------------------------------------------------------*/
union byte_def adcon1_addr;
#define     adcon1      adcon1_addr.byte

#define     scan0       adcon1_addr.bit.b0  /* A/D sweep pin select bit */
#define     scan1       adcon1_addr.bit.b1  /* A/D sweep pin select bit */
#define     md2         adcon1_addr.bit.b2  /* A/D operation mode select bit 1 */
#define     bits        adcon1_addr.bit.b3  /* 8/10-bit mode select bit */
#define     cks1        adcon1_addr.bit.b4  /* Frequency select bit 1 */
#define     vcut        adcon1_addr.bit.b5  /* Vref connect bit */

/*------------------------------------------------------
    Port P0 register
------------------------------------------------------*/
union byte_def p0_addr;
#define     p0      p0_addr.byte

#define     p0_0        p0_addr.bit.b0      /* Port P00 register */
#define     p0_1        p0_addr.bit.b1      /* Port P01 register */
#define     p0_2        p0_addr.bit.b2      /* Port P02 register */
#define     p0_3        p0_addr.bit.b3      /* Port P03 register */
#define     p0_4        p0_addr.bit.b4      /* Port P04 register */
#define     p0_5        p0_addr.bit.b5      /* Port P05 register */
#define     p0_6        p0_addr.bit.b6      /* Port P06 register */
#define     p0_7        p0_addr.bit.b7      /* Port P07 register */

/*------------------------------------------------------
    Port P1 register
------------------------------------------------------*/
union byte_def p1_addr;
#define     p1      p1_addr.byte

#define     p1_0        p1_addr.bit.b0      /* Port P10 register */
#define     p1_1        p1_addr.bit.b1      /* Port P11 register */
#define     p1_2        p1_addr.bit.b2      /* Port P12 register */
#define     p1_3        p1_addr.bit.b3      /* Port P13 register */
#define     p1_4        p1_addr.bit.b4      /* Port P14 register */
#define     p1_5        p1_addr.bit.b5      /* Port P15 register */
#define     p1_6        p1_addr.bit.b6      /* Port P16 register */
#define     p1_7        p1_addr.bit.b7      /* Port P17 register */

/*------------------------------------------------------
    Port P0 direction register
------------------------------------------------------*/
union byte_def pd0_addr;
#define     pd0     pd0_addr.byte

#define     pd0_0       pd0_addr.bit.b0     /* Port P00 direction register */
#define     pd0_1       pd0_addr.bit.b1     /* Port P01 direction register */
#define     pd0_2       pd0_addr.bit.b2     /* Port P02 direction register */
#define     pd0_3       pd0_addr.bit.b3     /* Port P03 direction register */
#define     pd0_4       pd0_addr.bit.b4     /* Port P04 direction register */
#define     pd0_5       pd0_addr.bit.b5     /* Port P05 direction register */
#define     pd0_6       pd0_addr.bit.b6     /* Port P06 direction register */
#define     pd0_7       pd0_addr.bit.b7     /* Port P07 direction register */

/*------------------------------------------------------
    Port P1 direction register
------------------------------------------------------*/
union byte_def pd1_addr;
#define     pd1     pd1_addr.byte

#define     pd1_0       pd1_addr.bit.b0     /* Port P10 direction register */
#define     pd1_1       pd1_addr.bit.b1     /* Port P11 direction register */
#define     pd1_2       pd1_addr.bit.b2     /* Port P12 direction register */
#define     pd1_3       pd1_addr.bit.b3     /* Port P13 direction register */
#define     pd1_4       pd1_addr.bit.b4     /* Port P14 direction register */
#define     pd1_5       pd1_addr.bit.b5     /* Port P15 direction register */
#define     pd1_6       pd1_addr.bit.b6     /* Port P16 direction register */
#define     pd1_7       pd1_addr.bit.b7     /* Port P17 direction register */

/*------------------------------------------------------
    Port P2 register
------------------------------------------------------*/
union byte_def p2_addr;
#define     p2      p2_addr.byte

#define     p2_0        p2_addr.bit.b0      /* Port P20 register */
#define     p2_1        p2_addr.bit.b1      /* Port P21 register */
#define     p2_2        p2_addr.bit.b2      /* Port P22 register */
#define     p2_3        p2_addr.bit.b3      /* Port P23 register */
#define     p2_4        p2_addr.bit.b4      /* Port P24 register */
#define     p2_5        p2_addr.bit.b5      /* Port P25 register */
#define     p2_6        p2_addr.bit.b6      /* Port P26 register */
#define     p2_7        p2_addr.bit.b7      /* Port P27 register */

/*------------------------------------------------------
    Port P3 register
------------------------------------------------------*/
union byte_def p3_addr;
#define     p3      p3_addr.byte

#define     p3_0        p3_addr.bit.b0      /* Port P30 register */
#define     p3_1        p3_addr.bit.b1      /* Port P31 register */
#define     p3_2        p3_addr.bit.b2      /* Port P32 register */
#define     p3_3        p3_addr.bit.b3      /* Port P33 register */
#define     p3_4        p3_addr.bit.b4      /* Port P34 register */
#define     p3_5        p3_addr.bit.b5      /* Port P35 register */
#define     p3_6        p3_addr.bit.b6      /* Port P36 register */
#define     p3_7        p3_addr.bit.b7      /* Port P37 register */

/*------------------------------------------------------
    Port P2 direction register
------------------------------------------------------*/
union byte_def pd2_addr;
#define     pd2     pd2_addr.byte

#define     pd2_0       pd2_addr.bit.b0     /* Port P20 direction register */
#define     pd2_1       pd2_addr.bit.b1     /* Port P21 direction register */
#define     pd2_2       pd2_addr.bit.b2     /* Port P22 direction register */
#define     pd2_3       pd2_addr.bit.b3     /* Port P23 direction register */
#define     pd2_4       pd2_addr.bit.b4     /* Port P24 direct