📄 iom16c62p.h
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SI/O3 control registers //0x0362
------------------------------------------------------*/
union st_s3c { /* union S3C */
struct { /* Bit Access */
unsigned char SM30:1; /* Internal synchronous clock select bit */
unsigned char SM31:1; /* Internal synchronous clock select bit */
unsigned char SM32:1; /* Sout3 output disable bit */
unsigned char SM33:1; /* SI/O3 port select bit */
unsigned char SM34:1; /* CLK polarity select bit */
unsigned char SM35:1; /* Transfer direction select bit */
unsigned char SM36:1; /* Synchronous clock select bit */
unsigned char SM37:1; /* Sout3 initial value set bit */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
}; /* */
/*------------------------------------------------------
UART0 special mode register 4 //0x036c
------------------------------------------------------*/
union st_u0smr4 { /* union u0smr4 */
struct { /* Bit Access */
unsigned char STAREQ :1; /* Start condition generate bit */
unsigned char RSTAREQ:1; /* Restart condition generate bit */
unsigned char STPREQ :1; /* Stop condition generate bit */
unsigned char STSPSEL:1; /* SCL,SDA output select bit */
unsigned char ACKD :1; /* ACK data bit */
unsigned char ACKC :1; /* ACK data output enable bit */
unsigned char SCLHI :1; /* SCL output stop enable bit */
unsigned char SWC9 :1; /* Final bit L hold enable bit */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
}; /* */
/*------------------------------------------------------
UART0 special mode register 3 //0x036d
------------------------------------------------------*/
union st_u0smr3 { /* union u0smr3 */
struct { /* Bit Access */
unsigned char :1; /* Nothing is assigned */
unsigned char CKPH :1; /* Clock phase set bit */
unsigned char :1; /* Nothing is assigned */
unsigned char NODC :1; /* Clock output set bit */
unsigned char :1; /* Nothing is assigned */
unsigned char DL0 :1; /* SDA0(TxD0) digital delay setup bit */
unsigned char DL1 :1; /* SDA0(TxD0) digital delay setup bit */
unsigned char DL2 :1; /* SDA0(TxD0) digital delay setup bit */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
}; /* */
/*------------------------------------------------------
UART0 special mode register 2 //0x036e
------------------------------------------------------*/
union st_u0smr2 { /* union u0smr2 */
struct { /* Bit Access */
unsigned char IICM2 :1; /* IIC mode selection bit 2 */
unsigned char CSC :1; /* Clock-synchronous bit */
unsigned char SWC :1; /* SCL wait output bit */
unsigned char ALS :1; /* SDA output stop bit */
unsigned char STAC :1; /* UART0 initialization bit */
unsigned char SWC2 :1; /* SCL wait output bit 2 */
unsigned char SDHI :1; /* SDA output disable bit */
unsigned char :1; /* Nothing is assigned */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
}; /* */
/*------------------------------------------------------
UART0 special mode register //0x036f
------------------------------------------------------*/
union st_u0smr { /* union u0smr */
struct { /* Bit Access */
unsigned char IICM:1; /* IIC mode selection bit */
unsigned char ABC :1; /* Arbitration lost detecting flag control bit */
unsigned char BBS :1; /* Bus busy flag */
unsigned char :1; /* Reserved bit,set to 0 */
unsigned char ABSC:1; /* Bus collision detect sampling clock select bit */
unsigned char ACSE:1; /* Auto clear function select bit of transmit enable bit */
unsigned char SSS :1; /* Transmit start condition select bit */
unsigned char :1; /* Nothing is assigned */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
}; /* */
/*------------------------------------------------------
UART1 special mode register 4 //0x0370
------------------------------------------------------*/
union st_u1smr4 { /* union u1smr4 */
struct { /* Bit Access */
unsigned char STAREQ:1; /* Start condition generate bit */
unsigned char RSTARE:1; /* Restart condition generate bit */
unsigned char STPREQ:1; /* Stop condition generate bit */
unsigned char STSPSE:1; /* SCL,SDA output select bit */
unsigned char ACKD :1; /* ACK data bit */
unsigned char ACKC :1; /* ACK data output enable bit */
unsigned char SCLHI :1; /* SCL output stop enable bit */
unsigned char SWC9 :1; /* Final bit L hold enable bit */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
}; /* */
/*------------------------------------------------------
UART1 special mode register 3 //0x0371
------------------------------------------------------*/
union st_u1smr3 { /* union u1smr3 */
struct { /* Bit Access */
unsigned char :1; /* Nothing is assigned */
unsigned char CKPH :1; /* Clock phase set bit */
unsigned char :1; /* Nothing is assigned */
unsigned char NODC :1; /* Clock output set bit */
unsigned char :1; /* Nothing is assigned */
unsigned char DL0 :1; /* SDA1(TxD1) digital delay setup bit */
unsigned char DL1 :1; /* SDA1(TxD1) digital delay setup bit */
unsigned char DL2 :1; /* SDA1(TxD1) digital delay setup bit */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
}; /* */
/*------------------------------------------------------
UART1 special mode register 2 //0x0372
------------------------------------------------------*/
union st_u1smr2 { /* union u1smr2 */
struct { /* Bit Access */
unsigned char IICM2 :1; /* IIC mode selection bit 2 */
unsigned char CSC :1; /* Clock-synchronous bit */
unsigned char SWC :1; /* SCL wait output bit */
unsigned char ALS :1; /* SDA output stop bit */
unsigned char STAC :1; /* UART0 initialization bit */
unsigned char SWC2 :1; /* SCL wait output bit 2 */
unsigned char SDHI :1; /* SDA output disable bit */
unsigned char :1; /* Nothing is assigned */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
}; /* */
/*------------------------------------------------------
UART1 special mode register //0x0373
------------------------------------------------------*/
union st_u1smr { /* union u1smr */
struct { /* Bit Access */
unsigned char IICM:1; /* IIC mode selection bit */
unsigned char ABC :1; /* Arbitration lost detecting flag control bit */
unsigned char BBS :1; /* Bus busy flag */
unsigned char :1; /* Reserved bit,set to 0 */
unsigned char ABSC:1; /* Bus collision detect sampling clock select bit */
unsigned char ACSE:1; /* Auto clear function select bit of transmit enable bit */
unsigned char SSS :1; /* Transmit start condition select bit */
unsigned char :1; /* Nothing is assigned */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
}; /* */
/*------------------------------------------------------
UART2 special mode register 4 //0x0374
------------------------------------------------------*/
union st_u2smr4 { /* union u1smr4 */
struct { /* Bit Access */
unsigned char STAREQ:1; /* Start condition generate bit */
unsigned char RSTARE:1; /* Restart condition generate bit */
unsigned char STPREQ:1; /* Stop condition generate bit */
unsigned char STSPSE:1; /* SCL,SDA output select bit */
unsigned char ACKD :1; /* ACK data bit */
unsigned char ACKC :1; /* ACK data output enable bit */
unsigned char SCLHI :1; /* SCL output stop enable bit */
unsigned char SWC9 :1; /* Final bit L hold enable bit */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
}; /* */
/*------------------------------------------------------
UART2 special mode register 3 //0x0375
------------------------------------------------------*/
union st_u2smr3 { /* union U2SMR3 */
struct { /* Bit Access */
unsigned char :1; /* Nothing is assigned */
unsigned char CKPH :1; /* Clock phase set bit */
unsigned char :1; /* Nothing is assigned */
unsigned char NODC :1; /* Clock output set bit */
unsigned char :1; /* Nothing is assigned */
unsigned char DL0 :1; /* SDA digital delay setup bit */
unsigned char DL1 :1; /* SDA digital delay setup bit */
unsigned char DL2 :1; /* SDA digital delay setup bit */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
}; /* */
/*------------------------------------------------------
UART2 special mode register 2 //0x0376
------------------------------------------------------*/
union st_u2smr2 { /* union U2SMR2 */
struct { /* Bit Access */
unsigned char IICM2:1; /* IIC mode selection bit 2 */
unsigned char CSC :1; /* Clock-synchronous bit */
unsigned char SWC :1; /* SCL wait output bit */
unsigned char ALS :1; /* SDA output stop bit */
unsigned char STAC :1; /* UART2 initialization bit */
unsigned char SWC2 :1; /* SCL wait output bit 2 */
unsigned char SDHI :1; /* SDA output disable bit */
unsigned char :1; /* Nothing is assigned */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
}; /* */
/*------------------------------------------------------
UART2 special mode register //0x0377
------------------------------------------------------*/
union st_u2smr { /* union U2SMR */
struct { /* Bit Access */
unsigned char IICM :1; /* IIC mode selection bit */
unsigned char ABC :1; /* Arbitration lost detecting flag control bit */
unsigned char BBS :1; /* Reserved bit,set to 0 */
unsigned char :1; /* SCLL sync output enable bit */
unsigned char ABSCS:1; /* Bus collision detect sampling clock select bit */
unsigned char ACSE :1; /* Auto clear function select bit of transmit enable bit */
unsigned char SSS :1; /* Transmit start condition select bit */
unsigned char :1; /* Nothing is assigned */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
}; /* */
/*------------------------------------------------------
UART2 transmit/receive mode register //0x0378
------------------------------------------------------*/
union st_u2mr { /* union U2MR */
struct { /* Bit Access */
unsigned char SMD0_U2MR :1; /* Serial I/O mode select bit */
unsigned char SMD1_U2MR :1; /* Serial I/O mode select bit */
unsigned char SMD2_U2MR :1; /* Serial I/O mode select bit */
unsigned char CKDIR_U2MR:1; /* Internal/external clock select bit */
unsigned char STPS_U2MR :1; /* Stop bit length select bit */
unsigned char PRY_U2MR :1; /* Odd/even parity select bit */
unsigned char PRYE_U2MR :1; /* Parity enable bit */
unsigned char IOPOL_U2MR:1; /* TxD RxD I/O polarity reverse bit */
} BIT; /* */
unsigned char BYTE; /* Byte Access */
};
/*------------------------------------------------------
UART2 Transmit buffer register 16 bit //0x037a
------------------------------------------------------*/
union st_u2tb { /* UART2 Transmit buffer register 16 bit ; Use "MOV" instruction when writing to this register. */
struct{
unsigned char U2TBL; /* UART2 Transmit buffer register low 8 bit */
unsigned char U2TBH; /* UART2 Transmit buffer register high 8 bit */
} BYTE; /* Byte access */
unsigned short WORD; /* Word Access */
};
/*------------------------------------------------------
UART2 transmit/receive control register 0//0x037c
------------------------------------------------------*/
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