sfr6n4.h

基于瑞萨 M16C 的最新版本 IIC 通信

/************************************************************************
*                                                                       *
*   file name   : definition of M16C/6N4's SFR                          *
*                                                                       *
*   Copyright   : RENESAS Technology Corporation                        *
*                                                                       *
*   Version     : 1.00 ( 2004-06-25 )                                   *
*                     first version                                     *
*               : 1.01 ( 2004-07-15 )                                   *
*                     Corrected comment bug                             *
*                                                                       *
************************************************************************/
/*
  note:
    This data is a freeware that SFR for M16C/6N4 is described.
    Renesas Technology Corporation assumes no responsibility for any damage
    that occurred by this data.
*/
/********************************************************
*   declare SFR address                                 *
********************************************************/

#ifndef _SFR_6N_
#define _SFR_6N_

#pragma ADDRESS     pm0_addr        0004h       /* Processor mode register 0 */

#pragma ADDRESS     pm1_addr        0005h       /* Processor mode register 1 */

#pragma ADDRESS     cm0_addr        0006h       /* System clock control register 0 */

#pragma ADDRESS     cm1_addr        0007h       /* System clock control register 1 */

#pragma ADDRESS     csr_addr        0008h       /* Chip select control register */

#pragma ADDRESS     aier_addr       0009h       /* Address match interrupt enable register */

#pragma ADDRESS     prcr_addr       000ah       /* Protect register */

#pragma ADDRESS     cm2_addr        000ch       /* Oscillation stop detection register */

#pragma ADDRESS     wdts_addr       000eh       /* Watchdog timer start register */

#pragma ADDRESS     wdc_addr        000fh       /* Watchdog timer control register */

#pragma ADDRESS     rmad0_addr      0010h       /* Address match interrupt register 0 */

#pragma ADDRESS     rmad1_addr      0014h       /* Address match interrupt register 1 */

#pragma ADDRESS     cse_addr        001bh       /* Chip select expansion control register */

#pragma ADDRESS     plc0_addr       001ch       /* PLL control register 0 */

#pragma ADDRESS     pm2_addr        001eh       /* Processor mode register 2 */

#pragma ADDRESS     sar0_addr       0020h       /* DMA0 source pointer */

#pragma ADDRESS     dar0_addr       0024h       /* DMA0 destination pointer */

#pragma ADDRESS     tcr0_addr       0028h       /* DMA0 transfer counter */

#pragma ADDRESS     dm0con_addr     002ch       /* DMA0 control register */

#pragma ADDRESS     sar1_addr       0030h       /* DMA1 source pointer */

#pragma ADDRESS     dar1_addr       0034h       /* DMA1 destination pointer */

#pragma ADDRESS     tcr1_addr       0038h       /* DMA1 transfer counter */

#pragma ADDRESS     dm1con_addr     003ch       /* DMA1 control register */

#pragma ADDRESS     c01wkic_addr    0041h       /* CAN0/1 wake up interrupt control register */

#pragma ADDRESS     c0recic_addr    0042h       /* CAN0 successful reception interrupt control register */

#pragma ADDRESS     c0trmic_addr    0043h       /* CAN0 successful transmission interrupt control register */

#pragma ADDRESS     int3ic_addr     0044h       /* INT3 interrupt control register */

#pragma ADDRESS     tb5ic_addr      0045h       /* Timer B5 interrupt control register */

#pragma ADDRESS     tb4ic_addr      0046h       /* Timer B4 interrupt control register */

#pragma ADDRESS     u1bcnic_addr    0046h       /* UART1 bus collision detection interrupt control register */

#pragma ADDRESS     tb3ic_addr      0047h       /* Timer B3 interrupt control register */

#pragma ADDRESS     u0bcnic_addr    0047h       /* UART0 bus collision detection interrupt control register */

#pragma ADDRESS     c1recic_addr    0048h       /* CAN1 successful reception interrupt control register */

#pragma ADDRESS     int5ic_addr     0048h       /* INT5 interrupt control register */

#pragma ADDRESS     c1trmic_addr    0049h       /* CAN1 successful transmission interrupt control register */

#pragma ADDRESS     s3ic_addr       0049h       /* SI/O3 interrupt control register */

#pragma ADDRESS     int4ic_addr     0049h       /* INT4 interrupt control register */

#pragma ADDRESS     u2bcnic_addr    004ah       /* UART2 bus collision detection interrupt control register */

#pragma ADDRESS     dm0ic_addr      004bh       /* DMA0 interrupt control register */

#pragma ADDRESS     dm1ic_addr      004ch       /* DMA1 interrupt control register */

#pragma ADDRESS     c01erric_addr   004dh       /* CAN0/1 error interrupt control register */

#pragma ADDRESS     adic_addr       004eh       /* A-D conversion interrupt control register */

#pragma ADDRESS     kupic_addr      004eh       /* Key input interrupt control register */

#pragma ADDRESS     s2tic_addr      004fh       /* UART2 transmit interrupt control register */

#pragma ADDRESS     s2ric_addr      0050h       /* UART2 receive interrupt control register */

#pragma ADDRESS     s0tic_addr      0051h       /* UART0 transmit interrupt control register */

#pragma ADDRESS     s0ric_addr      0052h       /* UART0 receive interrupt control register */

#pragma ADDRESS     s1tic_addr      0053h       /* UART1 transmit interrupt control register */

#pragma ADDRESS     s1ric_addr      0054h       /* UART1 receive interrupt control register */

#pragma ADDRESS     ta0ic_addr      0055h       /* Timer A0 interrupt control register */

#pragma ADDRESS     ta1ic_addr      0056h       /* Timer A1 interrupt control register */

#pragma ADDRESS     ta2ic_addr      0057h       /* Timer A2 interrupt control register */

#pragma ADDRESS     ta3ic_addr      0058h       /* Timer A3 interrupt control register */

#pragma ADDRESS     ta4ic_addr      0059h       /* Timer A4 interrupt control register */

#pragma ADDRESS     tb0ic_addr      005ah       /* Timer B0 interrupt control register */

#pragma ADDRESS     tb1ic_addr      005bh       /* Timer B1 interrupt control register */

#pragma ADDRESS     tb2ic_addr      005ch       /* Timer B2 interrupt control register */

#pragma ADDRESS     int0ic_addr     005dh       /* INT0 interrupt control register */

#pragma ADDRESS     int1ic_addr     005eh       /* INT1 interrupt control register */

#pragma ADDRESS     int2ic_addr     005fh       /* INT2 interrupt control register */

#pragma ADDRESS     c0slot          0060h       /* CAN0 message box   :Message Object */

#pragma ADDRESS     c0slot0         0060h       /* CAN0 message box 0 :Message Object */

#pragma ADDRESS     c0slot1         0070h       /* CAN0 message box 1 :Message Object */

#pragma ADDRESS     c0slot2         0080h       /* CAN0 message box 2 :Message Object */

#pragma ADDRESS     c0slot3         0090h       /* CAN0 message box 3 :Message Object */

#pragma ADDRESS     c0slot4         00a0h       /* CAN0 message box 4 :Message Object */

#pragma ADDRESS     c0slot5         00b0h       /* CAN0 message box 5 :Message Object */

#pragma ADDRESS     c0slot6         00c0h       /* CAN0 message box 6 :Message Object */

#pragma ADDRESS     c0slot7         00d0h       /* CAN0 message box 7 :Message Object */

#pragma ADDRESS     c0slot8         00e0h       /* CAN0 message box 8 :Message Object */

#pragma ADDRESS     c0slot9         00f0h       /* CAN0 message box 9 :Message Object */

#pragma ADDRESS     c0slot10        0100h       /* CAN0 message box 10:Message Object */

#pragma ADDRESS     c0slot11        0110h       /* CAN0 message box 11:Message Object */

#pragma ADDRESS     c0slot12        0120h       /* CAN0 message box 12:Message Object */

#pragma ADDRESS     c0slot13        0130h       /* CAN0 message box 13:Message Object */

#pragma ADDRESS     c0slot14        0140h       /* CAN0 message box 14:Message Object */

#pragma ADDRESS     c0slot15        0150h       /* CAN0 message box 15:Message Object */

#pragma ADDRESS     c0gmr           0160h       /* CAN0 global mask register */

#pragma ADDRESS     c0lmar          0166h       /* CAN0 local mask A register */

#pragma ADDRESS     c0lmbr          016ch       /* CAN0 local mask B register */

#pragma ADDRESS     fmr1_addr       01b5h       /* Flash memory control register 1 */

#pragma ADDRESS     fmr0_addr       01b7h       /* Flash memory control register 0 */

#pragma ADDRESS     rmad2_addr      01b8h       /* Address match interrupt register 2 */

#pragma ADDRESS     aier2_addr      01bbh       /* Address match interrupt enable register 2 */

#pragma ADDRESS     rmad3_addr      01bch       /* Address match interrupt register 3 */

#pragma ADDRESS     tbsr_addr       01c0h       /* Timer B3,4,5 Count start flag */

#pragma ADDRESS     ta11_addr       01c2h       /* Timer A1-1 register */

#pragma ADDRESS     ta21_addr       01c4h       /* Timer A2-1 register */

#pragma ADDRESS     ta41_addr       01c6h       /* Timer A4-1 register */

#pragma ADDRESS     invc0_addr      01c8h       /* Three-phase PWM control register 0 */

#pragma ADDRESS     invc1_addr      01c9h       /* Three-phase PWM control register 1 */

#pragma ADDRESS     idb0_addr       01cah       /* Three-phase output buffer register 0 */

#pragma ADDRESS     idb1_addr       01cbh       /* Three-phase output buffer register 1 */

#pragma ADDRESS     dtt_addr        01cch       /* Dead time timer */

#pragma ADDRESS     ictb2_addr      01cdh       /* Timer B2 interrupt occurrences frequency set counter */

#pragma ADDRESS     tb3_addr        01d0h       /* Timer B3 register */

#pragma ADDRESS     tb4_addr        01d2h       /* Timer B4 register */

#pragma ADDRESS     tb5_addr        01d4h       /* Timer B5 register */

#pragma ADDRESS     tb3mr_addr      01dbh       /* Timer B3 mode register */

#pragma ADDRESS     tb4mr_addr      01dch       /* Timer B4 mode register */

#pragma ADDRESS     tb5mr_addr      01ddh       /* Timer B5 mode register */

#pragma ADDRESS     ifsr0_addr      01deh       /* Interrupt cause select register 0*/

#pragma ADDRESS     ifsr1_addr      01dfh       /* Interrupt cause select register 1*/

#pragma ADDRESS     s3trr_addr      01e0h       /* SI/O3 transmit/receive register */

#pragma ADDRESS     s3c_addr        01e2h       /* SI/O3 control register */

#pragma ADDRESS     s3brg_addr      01e3h       /* SI/O3 bit rate generator */

#pragma ADDRESS     u0smr4_addr     01ech       /* UART0 special mode register 4 */

#pragma ADDRESS     u0smr3_addr     01edh       /* UART0 special mode register 3 */

#pragma ADDRESS     u0smr2_addr     01eeh       /* UART0 special mode register 2 */

#pragma ADDRESS     u0smr_addr      01efh       /* UART0 special mode register */

#pragma ADDRESS     u1smr4_addr     01f0h       /* UART1 special mode register 4 */

#pragma ADDRESS     u1smr3_addr     01f1h       /* UART1 special mode register 3 */

#pragma ADDRESS     u1smr2_addr     01f2h       /* UART1 special mode register 2 */

#pragma ADDRESS     u1smr_addr      01f3h       /* UART1 special mode register */

#pragma ADDRESS     u2smr4_addr     01f4h       /* UART2 special mode register 4 */

#pragma ADDRESS     u2smr3_addr     01f5h       /* UART2 special mode register 3 */

#pragma ADDRESS     u2smr2_addr     01f6h       /* UART2 special mode register 2 */

#pragma ADDRESS     u2smr_addr      01f7h       /* UART2 special mode register */

#pragma ADDRESS     u2mr_addr       01f8h       /* UART2 transmit/receive mode register */

#pragma ADDRESS     u2brg_addr      01f9h       /* UART2 bit rate generator */

#pragma ADDRESS     u2tb_addr       01fah       /* UART2 transmit buffer register */

#pragma ADDRESS     u2c0_addr       01fch       /* UART2 transmit/receive control register 0 */

#pragma ADDRESS     u2c1_addr       01fdh       /* UART2 transmit/receive control register 1 */

#pragma ADDRESS     u2rb_addr       01feh       /* UART2 receive buffer register */

#pragma ADDRESS     c0mctl          0200h       /* CAN0 message control register */