📄 start.s
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;******************************************************************************
; uC/OS-II
; The Real-Time Kernel
;
; (c) Copyright 2002, Jean J. Labrosse, Weston, FL
; All Rights Reserved
;
; 68HC11 Startup Code
;
; Filename : START.S
; Programmer : Jean J. Labrosse
;******************************************************************************
;
;/*$PAGE*/
;******************************************************************************
; PUBLIC DECLARATIONS
;******************************************************************************
xdef _Startup
;******************************************************************************
; EXTERNAL DECLARATIONS
;******************************************************************************
xref _main
;/*$PAGE*/
;******************************************************************************
; _Startup
;
; Description : This is the function that is called to initialize the system
; when a RESET occurs. All time critical initialization are
; also performed by this function (i.e., all registers that must
; be written in the 1st 64 E-clock cycles are initialized).
; After the special function registers have been initialized,
; the stack pointer is set to the top of the stack, the C function
; 'AppMain()' defined in the application software is called.
; Arguments : None.
; Returns : None.
;******************************************************************************
_Startup:
; Target microprocessor startup code
sei ; Disable interrupts.
ldaa #00000000B ; bit7 = 0
staa 1035H ; bit6 = 0
; bit5 = 0
; bit4 = CONFIG programming allowed, no EEPROM block protect.
; bit[3:0] = Protection disabled for blocks
ldaa #10010011B ; IRQ = edge sensitive, STOP recovery delay enabled,
staa 1039H ; Clock Monitor disabled, COP timeout = 524.29 mS @ 4 MHz
; Write to OPTION register.
; bit7 = ADPU -> 1 = enable ADC
; bit6 = CSEL -> 0 = ADC clock to use E clock
; bit5 = IRQE -> 0 = level sensitive, 1 = edge sensitive.
; bit4 = DLY -> 1 = delay 4064 cycles after RST from a STOP.
; bit3 = CME -> 0 = Clock Monitor enabled, 0 = disabled
; bit2 = FCME -> 0 = Clock Monitor follows the state of CME bit.
; bit[1:0] = CR[1:0] -> 11 = Divide E by 2^21. (COP to = 524.29 ms @ 4MHz)
ldaa #00000011B ; Timer prescaler = 1.
staa 1024H ; Write to TMSK2 register.
; bit7 = TOI
; bit6 = RTII
; bit5 = PAOVI
; bit4 = PAII
; bit1 = PR1 (FRT is E clk / 16)
; bit0 = PR0 " " " " " "
ldaa #08H ; Highest priority interrupt: IC1
staa 103CH
ldaa #11110100B ; Enable CSIO1, Active HIGH
staa 105DH ; Enable CSIO2, Active HIGH
; Write to Chip Select Control register.
; bit7 = IO1EN -> 1 = CSIO1 is enabled and uses port G bit 5.
; bit6 = IO1PL -> 1 = CSIO1 active HIGH.
; bit5 = IO2EN -> 1 = CSIO2 is enabled and uses port G bit 4.
; bit4 = IO2PL -> 1 = CSIO2 active HIGH.
; bit3 = GCSPR -> 0 = Program chip select has priority over general-purpose chip select.
; bit2 = PCSEN -> 1 = CSPROG is enabled out of reset.
; bit[1:0] = PSIZ[A:B] -> 00 = Set EPROM Size to 64K ($0000 - $FFFF).
lds #03FFH ; Initialize stack pointer to the top of the stack.
ldaa #11010000B ; CCR code - STOP disabled, XIRQ disabled, and general interrupts disabled.
tap ; Transfer to CCR.
; bit7 = S -> STOP disable.
; bit6 = X -> XIRQ disable.
; bit5 = H -> half carry.
; bit4 = I -> interrupt disable.
; bit3 = N -> negative.
; bit2 = Z -> zero.
; bit1 = V -> overflow.
; bit0 = C -> carry.
clra ; Set all RAM to 0
ldx #0
_StartupClearRAM:
staa 0,x
inx
cpx #1024 ; 68HC11F1 has 1024 bytes of RAM
bne _StartupClearRAM
jmp _main ; Execute 'main()' in application software.
end
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