📄 ftmcp100.c
字号:
#include "jinclude.h"
#include "jpeglib.h"
//---------------------------------------------------------------------------
//---------------------------------------------------------------------------
/*
Added by Leo
Well, our zigzag order is shown as below :
0 1 5 6 14 15 27 28
2 4 7 13 16 26 29 42
3 8 12 17 25 30 41 43
9 11 18 24 31 40 44 53
10 19 23 32 39 45 52 54
20 22 33 38 46 51 55 60
21 34 37 47 50 56 59 61
35 36 48 49 57 58 62 63
So, our zigzag order to natural order should be :
0 1 8 16 9 2 3 10
17 24 32 25 18 11 4 5
12 19 26 33 40 48 41 34
27 20 13 6 7 14 21 28
35 42 49 56 57 50 43 36
29 22 15 23 30 37 44 51
58 59 52 45 38 31 39 46
53 60 61 54 47 55 62 63
Because the quantization table in Local Memory for FTMCP100 Media Coprocessor
should be transposed according to hardware's algorithm. So we define another
matrix for zigzag coef order to natural and transposed order to serve this purpose.
*/
/* zigzag coef order to natural and transposed order */
const int jpeg_natural_transpozed_order[DCTSIZE2] = {
0, 8, 1, 2, 9, 16, 24, 17,
10, 3, 4, 11, 18, 25, 32, 40,
33, 26, 19, 12, 5, 6, 13, 20,
27, 34, 41, 48, 56, 49, 42, 35,
28, 21, 14, 7, 15, 22, 29, 36,
43, 50, 57, 58, 51, 44, 37, 30,
23, 31, 38, 45, 52, 59, 60, 53,
46, 39, 47, 54, 61, 62, 55, 63
};
//---------------------------------------------------------------------------
//---------------------------------------------------------------------------
// added by Leo
GLOBAL(void) ftmcp100_set_mcu_dma_params (j_decompress_ptr cinfo)
{
FTMCP100_CODEC *pCodec=(FTMCP100_CODEC *)cinfo->pCodec;
int ci,bi;
jpeg_component_info *compptr;
//unsigned int mcublks=0;
unsigned int comp=0;
unsigned short tbidx[3]= { 0,0,0 };
unsigned int bc=0; // block counts
unsigned int mcutir=0; // mcu table index
// Control and Length DMA Register for local command buffer
// 0x4B10010 in Control and Length register represents
// TDmask : 1 , BEINT: 0 , TDINT: 0
// Enable : 1 , Chain: 1 , Dir: 1
// LType : 00 , SType : 01
// Transfer Length : 0010
// It means that to move 16 words(64 bytes) from local memory(sequential) to system memory (2D)
//local command buffer 1
pCodec->pLDMA[3] = 0x4B10010; //chain enable
pCodec->pLDMA[7] = 0x4B10010;
pCodec->pLDMA[11] = 0x4B10010;
pCodec->pLDMA[15] = 0x4B10010;
pCodec->pLDMA[19] = 0x4B10010;
pCodec->pLDMA[23] = 0x4B10010;
pCodec->pLDMA[27] = 0x4B10010;
pCodec->pLDMA[31] = 0x4B10010;
pCodec->pLDMA[35] = 0x4B10010;
pCodec->pLDMA[39] = 0x4B10010;
//local command buffer 2
pCodec->pLDMA[43] = 0x4B10010; //chain enable
pCodec->pLDMA[47] = 0x4B10010;
pCodec->pLDMA[51] = 0x4B10010;
pCodec->pLDMA[55] = 0x4B10010;
pCodec->pLDMA[59] = 0x4B10010;
pCodec->pLDMA[63] = 0x4B10010;
pCodec->pLDMA[67] = 0x4B10010;
pCodec->pLDMA[71] = 0x4B10010;
pCodec->pLDMA[75] = 0x4B10010;
pCodec->pLDMA[79] = 0x4B10010;
//Local Memory base address (word alginment)
//local command buffer1
#ifdef CORE_VERSION_1
pCodec->pLDMA[1] = (unsigned int) (CUR_B0);
pCodec->pLDMA[5] = (unsigned int) (CUR_B1);
pCodec->pLDMA[9] = (unsigned int) (CUR_B2);
pCodec->pLDMA[13] = (unsigned int) (CUR_B3);
pCodec->pLDMA[17] = (unsigned int) (CUR_B4);
pCodec->pLDMA[21] = (unsigned int) (CUR_B5);
pCodec->pLDMA[25] = (unsigned int) (CUR_B6);
pCodec->pLDMA[29] = (unsigned int) (CUR_B7);
pCodec->pLDMA[33] = (unsigned int) (CUR_B8);
pCodec->pLDMA[37] = (unsigned int) (CUR_B9);
//local command buffer2
pCodec->pLDMA[41] = (unsigned int) (CUR_B0 + STRIDE_MCU);
pCodec->pLDMA[45] = (unsigned int) (CUR_B1 + STRIDE_MCU);
pCodec->pLDMA[49] = (unsigned int) (CUR_B2 + STRIDE_MCU);
pCodec->pLDMA[53] = (unsigned int) (CUR_B3 + STRIDE_MCU);
pCodec->pLDMA[57] = (unsigned int) (CUR_B4 + STRIDE_MCU);
pCodec->pLDMA[61] = (unsigned int) (CUR_B5 + STRIDE_MCU);
pCodec->pLDMA[65] = (unsigned int) (CUR_B6 + STRIDE_MCU);
pCodec->pLDMA[69] = (unsigned int) (CUR_B7 + STRIDE_MCU);
pCodec->pLDMA[73] = (unsigned int) (CUR_B8 + STRIDE_MCU);
pCodec->pLDMA[77] = (unsigned int) (CUR_B9 + STRIDE_MCU);
#elif defined(CORE_VERSION_2)
pCodec->pLDMA[1] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B0);
pCodec->pLDMA[5] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B1);
pCodec->pLDMA[9] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B2);
pCodec->pLDMA[13] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B3);
pCodec->pLDMA[17] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B4);
pCodec->pLDMA[21] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B5);
pCodec->pLDMA[25] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B6);
pCodec->pLDMA[29] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B7);
pCodec->pLDMA[33] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B8);
pCodec->pLDMA[37] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B9);
//local command buffer2
pCodec->pLDMA[41] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B0 + STRIDE_MCU);
pCodec->pLDMA[45] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B1 + STRIDE_MCU);
pCodec->pLDMA[49] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B2 + STRIDE_MCU);
pCodec->pLDMA[53] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B3 + STRIDE_MCU);
pCodec->pLDMA[57] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B4 + STRIDE_MCU);
pCodec->pLDMA[61] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B5 + STRIDE_MCU);
pCodec->pLDMA[65] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B6 + STRIDE_MCU);
pCodec->pLDMA[69] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B7 + STRIDE_MCU);
pCodec->pLDMA[73] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B8 + STRIDE_MCU);
pCodec->pLDMA[77] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B9 + STRIDE_MCU);
#else
#error "Please define the hardware core version (either CORE_VERSION_1 or CORE_VERSION_2)"
#endif
for (ci = 0; ci < cinfo->comps_in_scan; ci++)
{
compptr = cinfo->cur_comp_info[ci];
//mcublks+=compptr->MCU_blocks;
if(ci<3) // just for boundary safety
{
tbidx[ci] = compptr->ac_tbl_no;
tbidx[ci] = (tbidx[ci]<<1) | compptr->dc_tbl_no;
tbidx[ci] = (tbidx[ci]<<2) | compptr->quant_tbl_no;
tbidx[ci] = tbidx[ci] & 0xf;
}
for(bi=0;bi<compptr->MCU_blocks;bi++)
{
// fill the Block Width Register for Sequential-to-2D (S2D)
// We move sequential data in local memory to 2D data in system memory
// note that the Line Offset field in Block Width Register is defined as
// frame width minus block width plus one (in word)
// therefore, the System Memory Line Offset can be written as
// "(cinfo->MCUs_per_row * compptr->MCU_width)*2-2+1"
#ifdef CORE_VERSION_1
pCodec->pLDMA[2+bc*4] = ((( cinfo->MCUs_per_row * compptr->MCU_width)*2-1)<<8) | 0x02;
pCodec->pLDMA[42+bc*4] = ((( cinfo->MCUs_per_row * compptr->MCU_width)*2-1)<<8) | 0x02;
#elif defined(CORE_VERSION_2)
pCodec->pLDMA[2+bc*4] = ((( cinfo->MCUs_per_row * compptr->MCU_width)*2-1)<<6) | 0x01;
pCodec->pLDMA[42+bc*4] = ((( cinfo->MCUs_per_row * compptr->MCU_width)*2-1)<<6) | 0x01;
#else
#error "Please define the hardware core version (either CORE_VERSION_1 or CORE_VERSION_2)"
#endif
comp = comp | (cinfo->MCU_membership[bc] << (bc<<1)); //pwhsu++:20040108
bc++;
}
}
mcutir = (((tbidx[2]<<8) | (tbidx[1]<<4) | tbidx[0]) << 20) | (comp&0xfffff);
//SET_MCUBR(mcublks) , we set the MCUBR in the ftmcp100_store_multilevel_huffman_table() funciton
SET_MCUTIR(mcutir)
pCodec->pLDMA[cinfo->blocks_in_MCU*4-1] = 0x00910010; //chain disable at the end of blocks
pCodec->pLDMA[cinfo->blocks_in_MCU*4+39] = 0x00910010; //chain disable at the end of blocks
}
GLOBAL(void) ftmcp100_set_mcu_dma_noninterleaved_params (j_decompress_ptr cinfo)
{
FTMCP100_CODEC *pCodec=(FTMCP100_CODEC *)cinfo->pCodec;
int ci,bi;
jpeg_component_info *compptr;
int comp_index;
unsigned int mcublks=0;
unsigned int comp=0;
unsigned short tbidx[3]= { 0,0,0 };
unsigned int bc=0; // block counts
unsigned int mcutir=0; // mcu table index
// Control and Length DMA Register for local command buffer
// 0x4B10010 in Control and Length register represents
// TDmask : 1 , BEINT: 0 , TDINT: 0
// Enable : 1 , Chain: 1 , Dir: 1
// LType : 00 , SType : 01
// Transfer Length : 0010
// It means that to move 16 words(64 bytes) from local memory(sequential) to system memory (2D)
//local command buffer 1
pCodec->pLDMA[3] = 0x4B10010; //chain enable
pCodec->pLDMA[7] = 0x4B10010;
pCodec->pLDMA[11] = 0x4B10010;
pCodec->pLDMA[15] = 0x4B10010;
pCodec->pLDMA[19] = 0x4B10010;
pCodec->pLDMA[23] = 0x4B10010;
pCodec->pLDMA[27] = 0x4B10010;
pCodec->pLDMA[31] = 0x4B10010;
pCodec->pLDMA[35] = 0x4B10010;
pCodec->pLDMA[39] = 0x4B10010;
//local command buffer 2
pCodec->pLDMA[43] = 0x4B10010; //chain enable
pCodec->pLDMA[47] = 0x4B10010;
pCodec->pLDMA[51] = 0x4B10010;
pCodec->pLDMA[55] = 0x4B10010;
pCodec->pLDMA[59] = 0x4B10010;
pCodec->pLDMA[63] = 0x4B10010;
pCodec->pLDMA[67] = 0x4B10010;
pCodec->pLDMA[71] = 0x4B10010;
pCodec->pLDMA[75] = 0x4B10010;
pCodec->pLDMA[79] = 0x4B10010;
//#endif
//Local Memory base address (word alginment)
//local command buffer1
#ifdef CORE_VERSION_1
pCodec->pLDMA[1] = (unsigned int) (CUR_B0);
pCodec->pLDMA[5] = (unsigned int) (CUR_B1);
pCodec->pLDMA[9] = (unsigned int) (CUR_B2);
pCodec->pLDMA[13] = (unsigned int) (CUR_B3);
pCodec->pLDMA[17] = (unsigned int) (CUR_B4);
pCodec->pLDMA[21] = (unsigned int) (CUR_B5);
pCodec->pLDMA[25] = (unsigned int) (CUR_B6);
pCodec->pLDMA[29] = (unsigned int) (CUR_B7);
pCodec->pLDMA[33] = (unsigned int) (CUR_B8);
pCodec->pLDMA[37] = (unsigned int) (CUR_B9);
//local command buffer2
pCodec->pLDMA[41] = (unsigned int) (CUR_B0 + STRIDE_MCU);
pCodec->pLDMA[45] = (unsigned int) (CUR_B1 + STRIDE_MCU);
pCodec->pLDMA[49] = (unsigned int) (CUR_B2 + STRIDE_MCU);
pCodec->pLDMA[53] = (unsigned int) (CUR_B3 + STRIDE_MCU);
pCodec->pLDMA[57] = (unsigned int) (CUR_B4 + STRIDE_MCU);
pCodec->pLDMA[61] = (unsigned int) (CUR_B5 + STRIDE_MCU);
pCodec->pLDMA[65] = (unsigned int) (CUR_B6 + STRIDE_MCU);
pCodec->pLDMA[69] = (unsigned int) (CUR_B7 + STRIDE_MCU);
pCodec->pLDMA[73] = (unsigned int) (CUR_B8 + STRIDE_MCU);
pCodec->pLDMA[77] = (unsigned int) (CUR_B9 + STRIDE_MCU);
#elif defined(CORE_VERSION_2)
pCodec->pLDMA[1] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B0);
pCodec->pLDMA[5] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B1);
pCodec->pLDMA[9] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B2);
pCodec->pLDMA[13] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B3);
pCodec->pLDMA[17] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B4);
pCodec->pLDMA[21] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B5);
pCodec->pLDMA[25] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B6);
pCodec->pLDMA[29] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B7);
pCodec->pLDMA[33] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B8);
pCodec->pLDMA[37] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B9);
//local command buffer2
pCodec->pLDMA[41] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B0 + STRIDE_MCU);
pCodec->pLDMA[45] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B1 + STRIDE_MCU);
pCodec->pLDMA[49] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B2 + STRIDE_MCU);
pCodec->pLDMA[53] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B3 + STRIDE_MCU);
pCodec->pLDMA[57] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B4 + STRIDE_MCU);
pCodec->pLDMA[61] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B5 + STRIDE_MCU);
pCodec->pLDMA[65] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B6 + STRIDE_MCU);
pCodec->pLDMA[69] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B7 + STRIDE_MCU);
pCodec->pLDMA[73] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B8 + STRIDE_MCU);
pCodec->pLDMA[77] = (unsigned int) TRANSLATE_LOCAL_MEMORY_BASE_ADDRESS(CUR_B9 + STRIDE_MCU);
#else
#error "Please define the hardware core version (either CORE_VERSION_1 or CORE_VERSION_2)"
#endif
for (ci = 0; ci < cinfo->comps_in_scan; ci++)
{
//#ifdef FPGA_PLATFORM
//unsigned int comps_length;
//#endif
compptr = cinfo->cur_comp_info[ci];
mcublks+=compptr->MCU_blocks;
comp_index=compptr->component_index;
if(ci<3) // just for boundary safety
{
//tbidx[ci] = compptr->ac_tbl_no;
//tbidx[ci] = (tbidx[ci]<<1) | compptr->dc_tbl_no;
//tbidx[ci] = (tbidx[ci]<<2) | compptr->quant_tbl_no;
//tbidx[ci] = tbidx[ci] & 0xf;
tbidx[comp_index] = compptr->ac_tbl_no;
tbidx[comp_index] = (tbidx[comp_index]<<1) | compptr->dc_tbl_no;
tbidx[comp_index] = (tbidx[comp_index]<<2) | compptr->quant_tbl_no;
tbidx[comp_index] = tbidx[comp_index] & 0xf;
}
for(bi=0;bi<compptr->MCU_blocks;bi++)
{
// fill the Block Width Register for Sequential-to-2D (S2D)
// We move sequential data in local memory to 2D data in system memory
// note that the Line Offset field in Block Width Register is defined as
// frame width minus block width plus one (in word)
// therefore, the System Memory Line Offset can be written as
// "(cinfo->MCUs_per_row * compptr->MCU_width)*2-2+1"
#ifdef CORE_VERSION_1
pCodec->pLDMA[2+bc*4] = ((( cinfo->MCUs_per_row * compptr->MCU_width)*2-1)<<8) | 0x02;
pCodec->pLDMA[42+bc*4] = ((( cinfo->MCUs_per_row * compptr->MCU_width)*2-1)<<8) | 0x02;
#elif defined(CORE_VERSION_2)
pCodec->pLDMA[2+bc*4] = ((( cinfo->MCUs_per_row * compptr->MCU_width)*2-1)<<6) | 0x01;
pCodec->pLDMA[42+bc*4] = ((( cinfo->MCUs_per_row * compptr->MCU_width)*2-1)<<6) | 0x01;
#else
#error "Please define the hardware core version (either CORE_VERSION_1 or CORE_VERSION_2)"
#endif
//comp = comp | (cinfo->MCU_membership[bc] << (bc<<1)); //pwhsu++:20040108
comp = comp | (compptr->component_index << (bc<<1)); //pwhsu++:20040108
bc++;
}
}
mcutir = (((tbidx[2]<<8) | (tbidx[1]<<4) | tbidx[0]) << 20) | (comp&0xfffff);
SET_MCUBR(mcublks) // we set the MCUBR in the ftmcp100_store_multilevel_huffman_table() funciton
SET_MCUTIR(mcutir)
pCodec->pLDMA[cinfo->blocks_in_MCU*4-1] = 0x00910010; //chain disable at the end of blocks
pCodec->pLDMA[cinfo->blocks_in_MCU*4+39] = 0x00910010; //chain disable at the end of blocks
}
// added by Leo
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -