dma_b.h

基于Linux的ffmepg decoder

#ifndef __DMA_B_H
	#define __DMA_B_H
	#include "decoder.h"
	#include "dma.h"

/*
	DMA_COMMAND

	local		(struct)		(words)		(group ID)
	0=============
	 | move_1mv(3)	|	3*4*4		1
	 | 				|
	 | 				|
	 =============
	 | move_4mv(6)	|	6*4*4		2
 	 |				|
 	 |				|
	 | 				|
	 | 				|
	 | 				|
	 =============
	 | move_img(3)	|	3*4*4		3
	 | 				|
	 | 				|
	 =============  
	 |move_rgb(1)		|	1*4*4		4
	 =============
	 |move_ACDC(2)	|	2*4*4		5
	 |				|
	 =============


current chain:
	dummy start.
cca:
	if i-frame then start from "move_img"
	if p-frame then start from "move_1mv"
				or start from "move_4mv"

*/
	#if (OUTPUT_FMT == OUTPUT_FMT_YUV)
	// YUVmode
		// dma_id: 0	always do
		// dma_id: 1
		// 0 1 2 3 4 5
		#define CHNP_REF_4MV_Y0		0
		#define CHNP_REF_4MV_Y1		4
		#define CHNP_REF_4MV_Y2		8
		#define CHNP_REF_4MV_Y3		12
		#define CHNP_REF_4MV_U		16
		#define CHNP_REF_4MV_V		20
		// dma_id: 2
		// 6 7 8
		#define CHNP_REF_1MV_Y		(CHNP_REF_4MV_V + 4)
		#define CHNP_REF_1MV_U		(CHNP_REF_4MV_V + 8)
		#define CHNP_REF_1MV_V		(CHNP_REF_4MV_V + 12)
		// dma_id: 3
		// 9 10 11
		#define CHNP_IMG_Y			(CHNP_REF_1MV_V + 4)
		#define CHNP_IMG_U			(CHNP_REF_1MV_V + 8)
		#define CHNP_IMG_V			(CHNP_REF_1MV_V + 12)
		// dma_id: 4
		// 12 13 14
		#define CHNP_YUV_Y			(CHNP_IMG_V + 4)
		#define CHNP_YUV_U			(CHNP_IMG_V + 8)
		#define CHNP_YUV_V			(CHNP_IMG_V + 12)
		// dma_id: 5
		// 15
		#define CHNP_LOAD_PREDITOR		(CHNP_YUV_V + 4)
		// dma_id: always
		// 16
		#define CHNP_STORE_PREDITOR	(CHNP_LOAD_PREDITOR + 4)

		// dma_id: 3
		// YUVmode: 17 18 19
		#define CHNI_IMG_Y				(CHNP_STORE_PREDITOR + 4)
		#define CHNI_IMG_U			(CHNP_STORE_PREDITOR + 8)
		#define CHNI_IMG_V				(CHNP_STORE_PREDITOR + 12)
		// dma_id: 4
		// 20 21 22
		#define CHNI_YUV_Y				(CHNI_IMG_V + 4)
		#define CHNI_YUV_U			(CHNI_IMG_V + 8)
		#define CHNI_YUV_V				(CHNI_IMG_V + 12)
		// dma_id: 5
		// 23
		#define CHNI_LOAD_PREDITOR		(CHNI_YUV_V + 4)
		// 24
		#define CHNI_STORE_PREDITOR	(CHNI_LOAD_PREDITOR + 4)

		// 25 26
		#define CHN_NVOP_IN			(CHNI_STORE_PREDITOR + 4)
		#define CHN_NVOP_OUT			(CHN_NVOP_IN + 4)
	#else
	// notYUVmode
		// dma_id: 0	always do
		// dma_id: 1
		// 0 1 2 3 4 5
		#define CHNP_REF_4MV_Y0		0
		#define CHNP_REF_4MV_Y1		4
		#define CHNP_REF_4MV_Y2		8
		#define CHNP_REF_4MV_Y3		12
		#define CHNP_REF_4MV_U		16
		#define CHNP_REF_4MV_V		20
		// dma_id: 2
		// 6 7 8
		#define CHNP_REF_1MV_Y		(CHNP_REF_4MV_V + 4)
		#define CHNP_REF_1MV_U		(CHNP_REF_4MV_V + 8)
		#define CHNP_REF_1MV_V		(CHNP_REF_4MV_V + 12)
		// dma_id: 3
		// 9 10 11
		#define CHNP_IMG_Y			(CHNP_REF_1MV_V + 4)
		#define CHNP_IMG_U			(CHNP_REF_1MV_V + 8)
		#define CHNP_IMG_V			(CHNP_REF_1MV_V + 12)
		// dma_id: 4
		// 12
		#define CHNP_RGB				(CHNP_IMG_V + 4)
		// dma_id: 5
		// 13
		#define CHNP_LOAD_PREDITOR		(CHNP_RGB + 4)
		// dma_id: always
		// 14
		#define CHNP_STORE_PREDITOR	(CHNP_LOAD_PREDITOR + 4)
		// dma_id: 3
		// 15 16 17
		#define CHNI_IMG_Y				(CHNP_STORE_PREDITOR + 4)
		#define CHNI_IMG_U			(CHNP_STORE_PREDITOR + 8)
		#define CHNI_IMG_V				(CHNP_STORE_PREDITOR + 12)
		// dma_id: 4
		// 18
		#define CHNI_RGB				(CHNI_IMG_V + 4)
		// dma_id: 5
		// 19
		#define CHNI_LOAD_PREDITOR		(CHNI_RGB + 4)
		// 20
		#define CHNI_STORE_PREDITOR	(CHNI_LOAD_PREDITOR + 4)

		// 21 22
		#define CHN_NVOP_IN			(CHNI_STORE_PREDITOR + 4)
		#define CHN_NVOP_OUT			(CHN_NVOP_IN + 4)
	#endif
	#define ID_CHN_AWYS		0	// always do
	#define ID_CHN_4MV		1
	#define ID_CHN_1MV		2
	#define ID_CHN_IMG		3
	#define ID_CHN_YUV		4
	#define ID_CHN_RGB		4
	#define ID_CHN_ACDC		5

	/////////////////////////////////////////////////
	// ME Control Reigster (MECTL)
	#define MECTL_PXI_MBCNT_DIS	BIT6
	#define MECTL_SKIP_PXI			BIT5
	#define MECTL_VOPSTART		BIT4
	#define mMECTL_RND1b(v)		((v) << 2)
	#define MECTL_PXI_1MV			BIT1
	#define MECTL_MEGO			BIT0

	/////////////////////////////////////////////////
	// MC Control Reigster (MCCTL)
	#define MCCTL_DTGO		BIT17
	#define MCCTL_MVZ			BIT16
	#define MCCTL_SVH			BIT14
	#define MCCTL_ACDC_D		BIT13
	#define MCCTL_ACDC_T		BIT12
	#define MCCTL_ACDC_L		BIT11
	#define MCCTL_DMCGO		BIT10
	#define MCCTL_JPGM		BIT9
	#define mMCCTL_MP4M3b(v)	((v) << 6)
	#define MCCTL_DECGO		BIT5
	#define MCCTL_REMAP		BIT4
	#define MCCTL_MP4Q		BIT3
	#define MCCTL_DIS_ACP		BIT2
	#define MCCTL_INTRA		BIT1
	#define MCCTL_MCGO		BIT0

	/////////////////////////////////////////////////
	// VLD Control Register (VLDCTL)
	#define VLDCTL_ABF_LITTLE_E	BIT6
	#define VLDCTL_ABFSTOP		BIT5
#ifndef ARCH_IS_BIG_ENDIAN
	#define VLDCTL_ABFSTART	(BIT4 | BIT6)
#else
	#define VLDCTL_ABFSTART	BIT4
#endif
	#define mVLDCTL_CMD4b(v)	(v)


	#ifdef DMA_B_GLOBALS
		#define DMA_B_EXT
	#else
		#define DMA_B_EXT extern
	#endif

	DMA_B_EXT void dma_dec_commandq_init(DECODER * dec);
	DMA_B_EXT void dma_mvRef1MV(DECODER * dec,
					const MACROBLOCK *mb, const MACROBLOCK_b *mbb);
	DMA_B_EXT void dma_mvRef4MV(DECODER * dec,
					const MACROBLOCK *mb, const MACROBLOCK_b *mbb);
	DMA_B_EXT void dma_mvRefNotCoded(DECODER * dec, const MACROBLOCK_b *mbb);
#endif /* __DMA_B_H  */