decoder.c

基于Linux的ffmepg decoder

			// dont care LMaddr
			// dont care BlkWidth
			ptDma->Control =
				mDmaIntChainMask1b(TRUE) |
				mDmaEn1b(TRUE) |
				mDmaChainEn1b(TRUE) |
				mDmaDir1b(DONT_CARE) |
				mDmaSType2b(DONT_CARE) |
				mDmaLType2b(DONT_CARE) |
				mDmaLen12b(0) |
				mDmaID4b(0);
		}

		u32grpc = (2 << (ID_CHN_1MV*2))			// disable 1mv
				|(2 << (ID_CHN_4MV*2))		// disable 4mv
				|(2 << (ID_CHN_IMG*2))		// disable IMG
			#if (OUTPUT_FMT == OUTPUT_FMT_YUV)
				|(2 << (ID_CHN_YUV*2))		// YUV dma: disable.
			#else
				|(2 << (ID_CHN_RGB*2))		// RGB dma: disable.
			#endif
				|(3 << (ID_CHN_ACDC*2));		// LdSt_ACDC sync to VLD_done
											// load & store non-meaning


//(16)prePXI(3S)
		if (u32pipe & BIT_3ST) {
			// keep swaping the MV-buffer
			switch (mb_dmc->mode) {
				case MODE_INTER:
				case MODE_INTER_Q:
				case MODE_NOT_CODED:
					u32cmd_me |= MECTL_PXI_1MV;
					break;
				case MODE_INTER4V:
					break;
				default:
					// skip pxi command, but count mb;
					u32cmd_me |= MECTL_SKIP_PXI;
					break;
			}
		}
		else 	// skip pxi
			u32cmd_me |= (MECTL_SKIP_PXI | MECTL_PXI_MBCNT_DIS);

//(5)goME_pmv----------------(17)goME_pxi
		if (u32pipe & (BIT_0ST | BIT_2ST | BIT_3ST))
			ptMP4->MECTL = u32cmd_me;

//************************************** change to next mb *******************
		// update mb pointer
		mbb_rgb = mbb_img;
		mbb_img = mbb_dmc;
		mbb_dmc = mbb_ref;
		mbb_ref = mbb_vld;

		mb_last = mb_rgb;
		mb_rgb = mb_img;
		mb_img = mb_dmc;
		mb_dmc = mb_ref;
		mb_ref = mb_vld;

		i ++;
		mbb_vld = &mbb[i%P_FRAME_PIPE];
		mbb_vld->toggle = i & BIT0;

//(18)preMoveImg(3S)
//(19)preMoveYuv(3S)(Conf1)
 		if (u32pipe & BIT_3ST) {
			u32grpc &= ~(uint32_t)(3 << (ID_CHN_IMG * 2));		// exec IMG dma
			// update address of destination
			// dont forget to update the next one after the one mb-jumpping(dma ping-pong chain)
			// mb_rgb is the next one after mb_img
			if ((mb_img->mb_jump != 0) || (mb_rgb->mb_jump != 0)) {
				if (mbb_vld->toggle == 0) {
					// y
					dma_cmd_tgl0[CHNP_IMG_Y] = 
						mDmaSysMemAddr29b((uint32_t) dec->cur.y_phy + (uint32_t)mbb_img->x * 2 * SIZE_U +
							(uint32_t)mbb_img->y * dec->mb_width * SIZE_Y)
						|mDmaSysInc3b(DMA_INCS_256);		// 2 *  SIZE_U
					// u
					dma_cmd_tgl0[CHNP_IMG_U] =
						mDmaSysMemAddr29b((uint32_t) dec->cur.u_phy + (uint32_t)mbb_img->mbpos * SIZE_U)
						|mDmaSysInc3b(DMA_INCS_128);		// SIZE_U
					// v
					dma_cmd_tgl0[CHNP_IMG_V] =
						mDmaSysMemAddr29b((uint32_t) dec->cur.v_phy + (uint32_t)mbb_img->mbpos * SIZE_V)
						|mDmaSysInc3b(DMA_INCS_128);		// SIZE_U
				}
				else {
					// y
					dma_cmd_tgl1[CHNP_IMG_Y] = 
						mDmaSysMemAddr29b((uint32_t) dec->cur.y_phy + (uint32_t)mbb_img->x * 2 * SIZE_U +
							(uint32_t)mbb_img->y * dec->mb_width * SIZE_Y)
						|mDmaSysInc3b(DMA_INCS_256);		// 2 *  SIZE_U
					// u
					dma_cmd_tgl1[CHNP_IMG_U] =
						mDmaSysMemAddr29b((uint32_t) dec->cur.u_phy + (uint32_t)mbb_img->mbpos * SIZE_U)
						|mDmaSysInc3b(DMA_INCS_128);		// SIZE_U
					// v
					dma_cmd_tgl1[CHNP_IMG_V] =
						mDmaSysMemAddr29b((uint32_t) dec->cur.v_phy + (uint32_t)mbb_img->mbpos * SIZE_V)
						|mDmaSysInc3b(DMA_INCS_128);		// SIZE_U
				}
			}
			else if ((mbb_img->x == 0) || (mbb_img->x == 1)) {
				u32temp = mDmaSysMemAddr29b((uint32_t) dec->cur.y_phy
											+ (uint32_t) mbb_img->mbpos * SIZE_Y
											- (uint32_t) mbb_img->x * 2 * SIZE_U)
						|mDmaSysInc3b(DMA_INCS_256);		// 2 *  SIZE_U
				if (mbb_vld->toggle == 0)
					dma_cmd_tgl0[CHNP_IMG_Y] = u32temp;
				else
					dma_cmd_tgl1[CHNP_IMG_Y] = u32temp;
			}
		#if (OUTPUT_FMT == OUTPUT_FMT_YUV)
			if ((mbb_img->x >= u32output_mb_start) && (mbb_img->x < u32output_mb_end) &&
			(mbb_img->y >= u32output_mb_ystart) && (mbb_img->y < u32output_mb_yend)) {
				u32grpc &= ~(uint32_t)(3 << (ID_CHN_YUV * 2));		// exec YUV dma
				if (((mb_img->mb_jump != 0) || (mb_rgb->mb_jump != 0)) ||
				(mbb_img->x == u32output_mb_start) || (mbb_img->x == (u32output_mb_start + 1))) {
					if (mbb_vld->toggle == 0) {
						// y output
						dma_cmd_tgl0[CHNP_YUV_Y] = 
							mDmaSysMemAddr29b((uint32_t) dec->output_base_phy +
								((mbb_img->x - u32output_mb_start)  +
								(mbb_img->y - u32output_mb_ystart) * dec->output_stride) * PIXEL_Y)
							|mDmaSysInc3b(DMA_INCS_32);		// 2 * PIXEL_Y
						// u output
						dma_cmd_tgl0[CHNP_YUV_U] =
							mDmaSysMemAddr29b((uint32_t) dec->output_base_u_phy +
								((mbb_img->x - u32output_mb_start)  +
								(mbb_img->y - u32output_mb_ystart) * dec->output_stride/2) * PIXEL_U)
							|mDmaSysInc3b(DMA_INCS_16);		// 2 * PIXEL_U
						// v output
						dma_cmd_tgl0[CHNP_YUV_V] =
							mDmaSysMemAddr29b((uint32_t) dec->output_base_v_phy +
								((mbb_img->x - u32output_mb_start)  +
								(mbb_img->y - u32output_mb_ystart) * dec->output_stride/2) * PIXEL_V)
							|mDmaSysInc3b(DMA_INCS_16);		// 2 * PIXEL_V
					}
					else {
						// y output
						dma_cmd_tgl1[CHNP_YUV_Y] = 
							mDmaSysMemAddr29b((uint32_t) dec->output_base_phy +
								((mbb_img->x - u32output_mb_start)  +
								(mbb_img->y - u32output_mb_ystart) * dec->output_stride) * PIXEL_Y)
							|mDmaSysInc3b(DMA_INCS_32);		// 2 *  PIXEL_Y
						// u output
						dma_cmd_tgl1[CHNP_YUV_U] =
							mDmaSysMemAddr29b((uint32_t) dec->output_base_u_phy +
								((mbb_img->x - u32output_mb_start)  +
								(mbb_img->y - u32output_mb_ystart) * dec->output_stride/2) * PIXEL_U)
							|mDmaSysInc3b(DMA_INCS_16);		// 2 * PIXEL_U
						// v output
						dma_cmd_tgl1[CHNP_YUV_V] =
							mDmaSysMemAddr29b((uint32_t) dec->output_base_v_phy +
								((mbb_img->x - u32output_mb_start)  +
								(mbb_img->y - u32output_mb_ystart) * dec->output_stride/2) * PIXEL_V)
							|mDmaSysInc3b(DMA_INCS_16);		// 2 * PIXEL_V
					}
				}
			}
		#endif
		}

//(26)preMoveRGB(4S-R)(D)(Conf0)
//(26')Conf1(4S-x)
 		if (u32pipe & BIT_4ST) {
			u32pipe &= ~ BIT_4ST;
		#if (OUTPUT_FMT < OUTPUT_FMT_YUV)
			u32pipe |=  BIT_DMA_RGB_GO;
			// update address of destination
			// dont forget to update the next one after the one mb-jumpping
			// since dma is a ping-pong chain
			// mb_last is the next one after mb_rgb
			if ((mb_rgb->mb_jump != 0) || (mb_last->mb_jump != 0) ||
				(mbb_rgb->x == u32output_mb_start) || (mbb_rgb->x == (u32output_mb_start + 1))) {
				if ((mbb_rgb->x >= u32output_mb_start)
					&& (mbb_rgb->x < u32output_mb_end)
					&& (mbb_rgb->y >= u32output_mb_ystart)
					&& (mbb_rgb->y < u32output_mb_yend)) {
					if (mbb_vld->toggle == 0)
						dma_cmd_tgl0[CHNP_RGB] =
							mDmaSysMemAddr29b((uint32_t) dec->output_base_phy +
								(mbb_rgb->x - u32output_mb_start) * PIXEL_Y * RGB_PIXEL_SIZE +
								(mbb_rgb->y - u32output_mb_ystart) * dec->output_stride * PIXEL_Y * RGB_PIXEL_SIZE)
							| mDmaSysInc3b(RGB_DMA_INC);		//PIXEL_Y * 2;
					else
						dma_cmd_tgl1[CHNP_RGB] =
							mDmaSysMemAddr29b((uint32_t) dec->output_base_phy +
								(mbb_rgb->x - u32output_mb_start) * PIXEL_Y * RGB_PIXEL_SIZE +
								(mbb_rgb->y - u32output_mb_ystart) * dec->output_stride * PIXEL_Y * RGB_PIXEL_SIZE)
							| mDmaSysInc3b(RGB_DMA_INC);		//PIXEL_Y * 2;
				}
			}
			u32grpc &= ~(uint32_t)(3 << (ID_CHN_RGB * 2));		// exec RGB dma
	 		if ((u32pipe & BIT_PRE_DT) == 0)
				u32grpc |= 1 << (ID_CHN_RGB*2);				// RGB dma: skip but inscr.
		#endif
 		}
		mFa526DrainWrBuf();

DECODER_PFRAME_RECHECK:
//(6)waitME_PMV(0S)
//(7)storeMV(0S)
//(8)preMoveRef(0S-1S)
		if (u32pipe & BIT_0ST) {
			u32pipe &= ~ BIT_0ST;
			u32pipe |= BIT_1ST;
			vpe_prob_me_start();
			// check PMV_done
			while ((ptMP4->CPSTS & BIT3) == 0)
				;
			vpe_prob_me_end();
			u32temp = ptMP4->VLDSTS;
			while (u32temp  & 0xF000) 
			{
				mVpe_Indicator(0x92000000 | (u32temp  & 0xF000));
				mVpe_FAIL();
			 	//waitDMC & waitDT
				while ((ptMP4->CPSTS & (BIT14 | BIT1)) != (BIT14 | BIT1))
					;
				// waitME
				while ((ptMP4->CPSTS & BIT0) == 0)
					;
				u32temp = FindRsmkOrVopS(bs, ptMP4);
			}
			// Start code detected
			if (u32temp & BIT2) {
				u32ErrorCount ++;
				// correct 'ref'ed(dmc) jump to correct next-'ref'ed(ref)
				mb_dmc->mb_jump = dec->mb_width * dec->mb_height - mbb_ref->mbpos;
				// correct 'vld'ed(ref) information
				mbb_ref->x = 0;
				mbb_ref->y = dec->mb_height;
				mbb_ref->mbpos = dec->mb_width * dec->mb_height;
				// no more VLD stage
				u32pipe &= ~BIT_0ST;
				u32cmd_mc &= ~MCCTL_DECGO;
			}
			// Resync marker detected
			if (u32temp & BIT1) {
				if (bRead_video_packet_header(dec, &fcode, NULL, &bound) == -1) {
					mVpe_FAIL();
					break;
				}
				if (bound != mbb_ref->mbpos) {
					u32ErrorCount ++;
					// correct 'ref'ed(dmc) jump to correct next-'ref'ed(ref)
					mb_dmc->mb_jump = bound - mbb_ref->mbpos;
					// correct 'vld'ed(ref) information
					mb_ref = &dec->mbs[bound];
					mb_ref->mb_jump = 0;
					mbb_ref->x = bound % dec->mb_width;
					mbb_ref->y = (int32_t)(bound / dec->mb_width);
					mbb_ref->mbpos = bound;
				}
				mb_cnt_in_vp = (u32temp >> 16) - 1;
				//pu32table = &Table_Output[4];
				pu32table = &((uint32_t *)((uint32_t) dec->pu32BaseAddr + TABLE_OUTPUT_OFF))[4];
				mbpos_in_vp = 0;
			}
			u32temp = *pu32table;
			if (u32temp & BIT5) {	// not coded
				mb_ref->mode = MODE_NOT_CODED;
				if (dec->data_partitioned) {
					// point to next entry if the one is the last
					if (mbpos_in_vp >= ((u32temp >> 8) & 0xFFF))
						pu32table += 4;
				}
			}
			else {
				mb_ref->mode = u32temp & 0x07;
				mbb_ref->cbp = (u32temp >> 23) & 0x3F;
				mbb_ref->quant = (ptMP4->VOP0 >> 8) & 0xFF;
				if (dec->data_partitioned)			// point to next entry
					pu32table += 4;
			}
			mbpos_in_vp ++;
			//storeMV(0S)
			if (mb_ref->mode <= MODE_INTER4V) {
				uint32_t * pu32me = (uint32_t *) ((uint32_t)dec->pu32BaseAddr + ME_CMD_Q_OFF);
				// which buffer valid?
				mb_ref->MVuv.u32num = pu32me[MVUV_BUFF];

				if (mb_ref->mode == MODE_INTER4V) {
					mb_ref->mvs[0].u32num= pu32me[MV_BUFF + 0];
					mb_ref->mvs[1].u32num= pu32me[MV_BUFF + 1];
					mb_ref->mvs[2].u32num= pu32me[MV_BUFF + 2];
					mb_ref->mvs[3].u32num= pu32me[MV_BUFF + 3];
				} else {	// MODE_INTER or MODE_INTER_Q
					mb_ref->mvs[0].u32num=
					mb_ref->mvs[1].u32num=
					mb_ref->mvs[2].u32num=
					mb_ref->mvs[3].u32num= pu32me[MV_BUFF + 3];
				}
			}
			else  {
				mb_ref->mvs[0].u32num =
				mb_ref->mvs[1].u32num =
				mb_ref->mvs[2].u32num =
				mb_ref->mvs[3].u32num = 0;
			}
			//preMoveRef
			switch (mb_ref->mode) {
				case MODE_INTER:
				case MODE_INTER_Q:
					u32grpc &= ~(uint32_t)(3 << (ID_CHN_1MV* 2));		// exec REF1MV dma
					dma_mvRef1MV(dec, mb_ref, mbb_ref);
					break;
				case MODE_INTER4V:
					u32grpc &= ~(uint32_t)(3 << (ID_CHN_4MV* 2));		// exec REF4MV dma
					dma_mvRef4MV(dec, mb_ref, mbb_ref);
					break;
				case MODE_NOT_CODED:
					u32grpc &= ~(uint32_t)(3 << (ID_CHN_1MV* 2));		// exec REF1MV dma
					dma_mvRefNotCoded(dec, mbb_ref);
					break;
				default:
					break;
			}

		}

		mbb_vld->x = mbb_ref->x + 1;
		mbb_vld->y = mbb_ref->y;
		mbb_vld->mbpos = mbb_ref->mbpos + 1;
		if (mbb_vld->x == dec->mb_width) {
			mbb_vld->x = 0;
			mbb_vld->y ++;
		}
		// indicator
		mVpe_Indicator(0x91000000 | mbb_vld->y << 12 | mbb_vld->x);

//(1)preVLD(x-0S)
		u32cmd_mc = u32cmd_mc_reload;
		u32cmd_me = mMECTL_RND1b(rounding) | MECTL_MEGO;
		if (mbb_vld->y < dec->mb_height) {
			u32pipe |= BIT_0ST;
			// init mb_vld
			mb_vld = &dec->mbs[mbb_vld->mbpos];
			mb_vld->mb_jump = 0;
			// init acdcPredict command parameter
			u32temp = predict_acdc_P(dec->mbs, mbb_vld, (int32_t)dec->mb_width, bound);
			u32cmd_mc = u32temp | u32cmd_mc_reload;
		}


//(9)preStoreACDC
//(2)preLoadACDC
		if ((mb_ref->mb_jump != 0) || (mb_dmc->mb_jump != 0) ||(mbb_vld->x == 0)) {
			if (mbb_vld->toggle == 0) {
				dma_cmd_tgl0[CHNP_STORE_PREDITOR] =
					mDmaSysMemAddr29b((uint32_t)dec->pu16ACDC_ptr_phy)
					| mDmaSysInc3b(DMA_INCS_128);
				dma_cmd_tgl0[CHNP_LOAD_PREDITOR] =
					mDmaSysMemAddr29b((uint32_t)dec->pu16ACDC_ptr_phy + 64)
					| mDmaSysInc3b(DMA_INCS_128);
			}else {
				dma_cmd_tgl1[CHNP_STORE_PREDITOR] =
					mDmaSysMemAddr29b((uint32_t)dec->pu16ACDC_ptr_phy)
					| mDmaSysInc3b(DMA_INCS_128);
				dma_cmd_tgl1[CHNP_LOAD_PREDITOR] =
					mDmaSysMemAddr29b((uint32_t)dec->pu16ACDC_ptr_phy + 64)
					| mDmaSysInc3b(DMA_INCS_128);
			}
		}
		else if (mbb_vld->x == 1) {
			if (mbb_vld->toggle == 0)
				dma_cmd_tgl0[CHNP_STORE_PREDITOR] =
					mDmaSysMemAddr29b((uint32_t)dec->pu16ACDC_ptr_phy + 64)
					| mDmaSysInc3b(DMA_INCS_128);
			else
				dma_cmd_tgl1[CHNP_STORE_PREDITOR] =
					mDmaSysMemAddr29b((uint32_t)dec->pu16ACDC_ptr_phy + 64)
					| mDmaSysInc3b(DMA_INCS_128);
		}
		if (mbb_vld->x == (dec->mb_width - 1)) {
			if (mbb_vld->toggle == 0)
				dma_cmd_tgl0[CHNP_LOAD_PREDITOR] =
					mDmaSysMemAddr29b((uint32_t)dec->pu16ACDC_ptr_phy)
					| mDmaSysInc3b(DMA_INCS_128);
			else
				dma_cmd_tgl1[CHNP_LOAD_PREDITOR] =
					mDmaSysMemAddr29b((uint32_t)dec->pu16ACDC_ptr_phy)
					| mDmaSysInc3b(DMA_INCS_128);
		}
//(20)waitDMC(3S-4S)
		if (u32pipe & BIT_3ST) {
			u32pipe &= ~ BIT_3ST;