📄 lcd.h
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//POWER SETTING {LDIC_OSCCTL1_REG, 0x51/*0x41*/}, //osc on frequency control +0%, {0xff, 50}, //delay 50ms {LDIC_PWRCTL2_REG, 0x04}, //ap=100 {0xff, 20}, {LDIC_PWRCTL1_REG, 0x10/*0x18*/}, //gas=0 pon=1 dk=0 xdk=0 {0xff, 20}, {LDIC_PWRCTL1_REG, 0x10}, //GASENB=0,PON=1,DK=0,XDK=0,C1 ON 2Xvci;C2 ON;STB off;ddvdh 5.17v {0xff, 20}, {LDIC_VCOMCTL1_REG, 0x80}, //VCOMG=1 vdv adjust disable //DISPLAY ON SETTING {LDIC_DISPLAYCLT9_REG, 0x0f}, //saps1=1000 {LDIC_DISPLAYCTL1_REG, 0x04}, //gon=0,dte=0,D=01 ALL OFF {0xff, 20}, {LDIC_DISPLAYCTL1_REG, 0x24}, //GON=1,DTE=0,D=01 DISPLAY OFF, VGL OFF {LDIC_DISPLAYCTL1_REG, 0x2C}, //GON=1,DTE=0,D=11 DISPLAY ON {0xff, 20}, {LDIC_DISPLAYCTL1_REG, 0x3C} //GON =1, DTE=1,D=11 VGH VGL ON#elif defined(LCD_TD028TTEC1) /*Sleep Out */ {0xB8, 0xFFF9, 2}, //Output control {0x11, 0x00, 0}, //Sleep Out {0xff,15,0}, {0x29,0x00,0} //Display on #elif defined(LCD_L4F00242T05) {LDIC_SLPOUT_CMD, 0x00, 0}, //Cancel the LCD module's sleep state. {0xff, 70}, //Delay 70ms {LDIC_DISON_CMD, 0x00, 0}, //Display on#elif defined(LCD_TM240320LNFWUGWA5) //5TODO:WAKEUP DEFINED. {0xff, 00}#elif defined(LCD_ST7787)//5TODO:WAKEUP DEFINED. {LDIC_SLPOUT_REG,0x00,0}, //Sleep Out {0xff,100,0}, //Delay 100ms //DISPLAY SETTING {LDIC_FRMCTR1_REG,0x2c10,2}, //In normal mode/Full colors {0xfe,0x10,1}, {0xff,1,0}, //Delay 1ms {LDIC_FRMCTR2_REG,0x2810,2}, //In Idle mode/8-colors {0xfe,0x10,1}, {0xff,1,0}, //Delay 1ms {LDIC_FRMCTR3_REG,0x3e02,2}, //In Partial mode/full colors {0xfe,0x023e,2}, {0xfe,0x0202,2}, {0xff,1,0}, //Delay 1ms {LDIC_INVCTR_REG,/*0x07*/0x00,1}, //line inversion {LDIC_DISSET5_REG,0x0204,2}, //Setting porch area {0xff,1,0}, //Delay 1ms {LDIC_VSYNCOUT_REG,0x00,0}, //stop vsync mode //POWER SETTING {LDIC_PWCTR1_REG,0x00,1}, //GVDD=5.0V {LDIC_PWCTL2_REG,0xbb07,2}, //VGH=15V,VGL=-12V,RGB Pixel clk=76 {0xff,1,0}, //Delay 1ms {LDIC_PWCTL3_REG,0x01d6,2}, //APA=SMALL,BOOSTER CIRCUIT 1=OSC/16 ,..2=OSC/8 {0xfe,0x8530,2}, //C1S=4.5V, BOOSTER CIRCUIT 4=OSC/16;OSC/128,OSC/2048 During Porch area {0xfe,0x05,1}, //OSC/16 {0xff,1,0}, //Delay 1ms {LDIC_PWCTL4_REG,0x0144,2}, //power control 4 {0xfe,0x0400,2}, {0xfe,0x00,1}, {0xff,1,0}, //Delay 1ms {LDIC_PWCTL5_REG,0x04b3,2}, //power control 5 {0xfe,0x0300,2}, {0xfe,0x00,1}, {0xff,1,0}, //Delay 1ms {LDIC_VMCTR1_REG,0x481a,2}, //power control 6 VCOM1 {0xfe,0x80,1}, {0xff,1,0}, //Delay 1ms {LDIC_VMCTR2_REG,0x2200,2}, //power control 7 VCOM2 {0xff,1,0}, //Delay 1ms //NO INFO ABOUT THIS {0xf4,0xff3f,2}, {0xf2,0x80,1}, {0xfb,0x7f,1}, //Vcom multi_mode //GAMMA CONCTRL {LDIC_GMCTRP1_REG,0x0800/*0x010b*/,2}, //Gamma Conctrl 1 {0xfe,0x191b/*0x191d/*0x191c*/,2}, {0xfe,0x1811/*0x1f1a/*0x1b19*/,2}, {0xfe,0x0e0c/*0x1a1b/*0x1819*/,2}, {0xfe,0x0b00/*0x1a0d*/,2}, {0xfe,0x0f01/*0x0f07/*0x0102*/,2}, {0xfe,0x02,1}, {LDIC_GMCTRN1_REG,0x0800/*0x010b*/,2}, //Gamma Conctrl 2 {0xfe,0x191c/*0x191d/*0x191c*/,2}, {0xfe,0x1712/*0x1f1a/*0x1b19*/,2}, {0xfe,0x0d0c/*0x1a1b/*0x1819*/,2}, {0xfe,0x0a00/*0x1a0d*/,2}, {0xfe,0x0f01/*0x0f07/*0x0102*/,2}, {0xfe,0x02,1}, //DISPLAY ON SETTING {LDIC_COLMOD_REG,/*0x66*/0x60,1}, //Interface Pixel Format {LDIC_TEON_REG,0x00,1}, //Tearing Effect Line ,Vertial {LDIC_MADCTL_REG,0x00,1}, //MX=0,MY=0,MV=0,ML=0,MH=0,BGR=0 {LDIC_RGBCTR_REG,0x03,1} //RGB signal control#elif defined(LCD_ILI9320DS)//5TODO:WAKEUP DEFINED. {LDIC_PWCTL1_REG,0x17b0,0}, //SAP=1,BT=011,APE=1,AP=011,DSTB=0,SLP=0 {LDIC_PWCTL2_REG,/*0x0007*/0x0037,0}, //DC1=000,DC0=011,VC=111 {0xff,50,0}, //Delay 50ms {LDIC_PWCTL3_REG,/*0x013b*/0x013a,0}, //VCMR=1,PON=1,VRH=1011 {0xff,50,0}, {LDIC_PWCTL4_REG,0x1b00/*0x18000x1500*/,0}, //vdv=11000 {LDIC_DISPCTRL1_REG,0x0173/*0x0133*/,0}, //Display On {0xff,10,0}, {LDIC_RDGRAM_REG,0x0000,1}#elif defined(LCD_LGDP4531) {LDIC_PWCTL1_REG,0x0001,0}, //SLeep Out {LDIC_OSC_REG,0x0001,0}, //Start oscillation {0xff,2,0}, //{LDIC_PWCTL1_REG,0x060c,0}, {LDIC_PWCTL1_REG,0x0628,0}, //Power Control 1 SAP[2:0] set, AP[2:0] set, DK=1 {LDIC_PWCTL3_REG,0x0006,0}, //Power Control 3 PON = 0 MainLCD_Reg(0x0013); MainLCD_Data(0x0A4b); //Power Control 4 VCOMG = 0 {LDIC_PWCTL4_REG,0x0a4b,0}, //Power Control 4 VCOMG = 0 {LDIC_PWCTL2_REG,0x0040,0}, //Power Control 2 DC0[2:0] set, DC1[2:0] set {LDIC_REGUCTRL_REG,0x0050,0}, //Power Control 5 {LDIC_PWCTL3_REG,0x0016,0}, //Power Control 3 PON=1,VRH=0110 {LDIC_PWCTL1_REG,0x1620,0}, //Power Control 1 DK=0 {0xff,10,0}, {LDIC_PWCTL1_REG,0x5660,0}, //sap=101,BT=0110,AP=110,DK=0,DSTB=0,SLP=0 {0xff,10,0}, {LDIC_PWCTL4_REG,0x2b4e/*0x2a4e*/,0}, //VCOMG=1,VDV=01010,VCM=4E //DISPLAY SETTING {LDIC_OUTCTL1_REG,0x0100,0}, //Driver output control 1 SM=0,SS=1 {LDIC_WAVECTRL_REG,0x0300,0}, //LCD Driving Wave Control {LDIC_ENTRYMODE_REG,0x0230,0}, //Entry Mode {LDIC_DISPCTRL2_REG,0x0202,0}, //Display Control 2 {LDIC_DISPCTRL4_REG,0x0008,0}, //Display Control 4 //DISPLAY ON {LDIC_DISPCTRL1_REG,0x0001,0}, //D[1:0] = 1, GON = 0, DTE = 0 {LDIC_DISPCTRL1_REG,0x0021,0}, //D[1:0] = 1, GON = 1, DTE = 0 {LDIC_DISPCTRL1_REG,0x0023,0}, //D[1:0] = 3, GON = 1, DTE = 0 {LDIC_DISPCTRL1_REG,0x0133,0}, //D[1:0] = 3, GON = 1, DTE = 1, basee=1 {0xff,10,0}, {LDIC_GRAMHADD_REG,0x0000,0}, {LDIC_GRAMVADD_REG,0x0000,0}, {LDIC_RDGRAM_REG,0x0000,1} //read from gram#elif defined(LCD_TMT035DNAHCWD)//5TODO:WAKEUP DEFINED.#else#error "ERROR: Unknown project define." __FILE__#endif};#elif defined CONFIG_PXA250/* * PXA LCD DMA descriptor */struct pxafb_dma_descriptor { u_long fdadr; /* Frame descriptor address register */ u_long fsadr; /* Frame source address register */ u_long fidr; /* Frame ID register */ u_long ldcmd; /* Command register */};/* * PXA LCD info */struct pxafb_info { /* Misc registers */ u_long reg_lccr3; u_long reg_lccr2; u_long reg_lccr1; u_long reg_lccr0; u_long fdadr0; u_long fdadr1; /* DMA descriptors */ struct pxafb_dma_descriptor * dmadesc_fblow; struct pxafb_dma_descriptor * dmadesc_fbhigh; struct pxafb_dma_descriptor * dmadesc_palette; u_long screen; /* physical address of frame buffer */ u_long palette; /* physical address of palette memory */ u_int palette_size;};/* * LCD controller stucture for PXA CPU */typedef struct vidinfo { ushort vl_col; /* Number of columns (i.e. 640) */ ushort vl_row; /* Number of rows (i.e. 480) */ ushort vl_width; /* Width of display area in millimeters */ ushort vl_height; /* Height of display area in millimeters */ /* LCD configuration register */ u_char vl_clkp; /* Clock polarity */ u_char vl_oep; /* Output Enable polarity */ u_char vl_hsp; /* Horizontal Sync polarity */ u_char vl_vsp; /* Vertical Sync polarity */ u_char vl_dp; /* Data polarity */ u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */ u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */ //Frenz wang question u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */ u_char vl_clor; /* Color, 0 = mono, 1 = color */ u_char vl_tft; /* 0 = passive, 1 = TFT */ /* Horizontal control register. Timing from data sheet */ ushort vl_hpw; /* Horz sync pulse width */ u_char vl_blw; /* Wait before of line */ u_char vl_elw; /* Wait end of line */ /* Vertical control register. */ u_char vl_vpw; /* Vertical sync pulse width */ u_char vl_bfw; /* Wait before of frame */ u_char vl_efw; /* Wait end of frame */ /* PXA LCD controller params */ struct pxafb_info pxa;} vidinfo_t;extern vidinfo_t panel_info;#elif defined(CONFIG_MCC200)typedef struct vidinfo { ushort vl_col; /* Number of columns (i.e. 160) */ ushort vl_row; /* Number of rows (i.e. 100) */ u_char vl_bpix; /* Bits per pixel, 0 = 1 */} vidinfo_t;#endif /* CONFIG_MPC823, CONFIG_S3C24XX,CONFIG_PXA250 or CONFIG_MCC200 *//* Video functions */#if defined(CONFIG_RBC823)void lcd_disable (void);#endif/* int lcd_init (void *lcdbase); */void lcd_putc (const char c);void lcd_puts (const char *s);void lcd_printf (const char *fmt, ...);/************************************************************************//* ** BITMAP DISPLAY SUPPORT *//************************************************************************/#if (CONFIG_COMMANDS & CFG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)# include <bmp_layout.h># include <asm/byteorder.h>#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) || CONFIG_SPLASH_SCREEN *//* * Information about displays we are using. This is for configuring * the LCD controller and memory allocation. Someone has to know what * is connected, as we can't autodetect anything. */#define CFG_HIGH 0 /* Pins are active high */#define CFG_LOW 1 /* Pins are active low */#define LCD_MONOCHROME 0#define LCD_COLOR2 1#define LCD_COLOR4 2#define LCD_COLOR8 3#define LCD_COLOR16 4/*----------------------------------------------------------------------*/#if defined(CONFIG_LCD_INFO_BELOW_LOGO)# define LCD_INFO_X 0# define LCD_INFO_Y (BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)#elif defined(CONFIG_LCD_LOGO)# define LCD_INFO_X (BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)# define LCD_INFO_Y (VIDEO_FONT_HEIGHT)#else# define LCD_INFO_X (VIDEO_FONT_WIDTH)# define LCD_INFO_Y (VIDEO_FONT_HEIGHT)#endif/* Default to 8bpp if bit depth not specified */#ifndef LCD_BPP# define LCD_BPP LCD_COLOR8#endif#ifndef LCD_DF# define LCD_DF 1#endif/* Calculate nr. of bits per pixel and nr. of colors */#define NBITS(bit_code) (1 << (bit_code))#define NCOLORS(bit_code) (1 << NBITS(bit_code))/************************************************************************//* ** CONSOLE CONSTANTS *//************************************************************************/#if LCD_BPP == LCD_MONOCHROME/* * Simple black/white definitions */# define CONSOLE_COLOR_BLACK 0# define CONSOLE_COLOR_WHITE 1 /* Must remain last / highest */#elif LCD_BPP == LCD_COLOR8/* * 8bpp color definitions */# define CONSOLE_COLOR_BLACK 0# define CONSOLE_COLOR_RED 1# define CONSOLE_COLOR_GREEN 2# define CONSOLE_COLOR_YELLOW 3# define CONSOLE_COLOR_BLUE 4# define CONSOLE_COLOR_MAGENTA 5# define CONSOLE_COLOR_CYAN 6# define CONSOLE_COLOR_GREY 14# define CONSOLE_COLOR_WHITE 15 /* Must remain last / highest */#else/* * 16bpp color definitions */# define CONSOLE_COLOR_BLACK 0x0000# define CONSOLE_COLOR_WHITE 0xffff /* Must remain last / highest */#endif /* color definitions *//************************************************************************/#ifndef PAGE_SIZE# define PAGE_SIZE 4096#endif/************************************************************************//* ** CONSOLE DEFINITIONS & FUNCTIONS *//************************************************************************/#if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)# define CONSOLE_ROWS ((panel_info.vl_row-BMP_LOGO_HEIGHT) \ / VIDEO_FONT_HEIGHT)#else# define CONSOLE_ROWS (panel_info.vl_row / VIDEO_FONT_HEIGHT)#endif#define CONSOLE_COLS (panel_info.vl_col / VIDEO_FONT_WIDTH)#define CONSOLE_ROW_SIZE (VIDEO_FONT_HEIGHT * lcd_line_length)#define CONSOLE_ROW_FIRST (lcd_console_address)#define CONSOLE_ROW_SECOND (lcd_console_address + CONSOLE_ROW_SIZE)#define CONSOLE_ROW_LAST (lcd_console_address + CONSOLE_SIZE \ - CONSOLE_ROW_SIZE)#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * CONSOLE_ROWS)#define CONSOLE_SCROLL_SIZE (CONSOLE_SIZE - CONSOLE_ROW_SIZE)#if LCD_BPP == LCD_MONOCHROME# define COLOR_MASK(c) ((c) | (c) << 1 | (c) << 2 | (c) << 3 | \ (c) << 4 | (c) << 5 | (c) << 6 | (c) << 7)#elif LCD_BPP == LCD_COLOR8# define COLOR_MASK(c) (c)#else# error Unsupported LCD BPP.#endif/************************************************************************/#endif /* _LCD_H_ */
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