syslib.c

powerPC866 系列平台BSP移植开发的参考代码

   	*CISR(vxImmrGet()) = CISR_SCC3;

    }

/*******************************************************************************
*
* sysCpmAttach - attach wrapper
*
*/

STATUS sysCpmAttach
    (
    int         unit,           /* unit number */
    SCC *       pScc,           /* address of SCC parameter RAM */
    SCC_REG *   pSccReg,        /* address of SCC registers */
    VOIDFUNCPTR * ivec,         /* interrupt vector offset */
    SCC_BUF *   txBdBase,       /* transmit buffer descriptor base address */
    SCC_BUF *   rxBdBase,       /* receive buffer descriptor base address */
    int         txBdNum,        /* number of transmit buffer descriptors */
    int         rxBdNum,        /* number of receive buffer descriptors */
    UINT8 *     bufBase         /* address of memory pool; NONE = malloc it */
    )
    {
    EPCFG *cfg  = getEpCfg();


	return(cpmattach(unit, pScc, pSccReg, ivec,
			  txBdBase, rxBdBase, txBdNum, rxBdNum, bufBase));

    }
#endif	/* INCLUDE_CPM */

#ifdef INCLUDE_MOT_FEC
/*******************************************************************************
*
* sysFecAttach - attach wrapper
*
*/

STATUS sysFecAttach
    (
    )
    {
        ipAttach (0, IF_USR_NAME);

        return (OK);
    }

/*******************************************************************************
*
* sysFecEnetEnable - enable the MII interface of the Fast Ethernet controller
*
* This routine is expected to perform any target specific functions required
* to enable the Ethernet device and the MII interface of the Fast Ethernet
* controller. These functions include setting the MII-compliant signals on
* Port D and disabling the IRQ7 signal.
*
* This routine does not enable the 7-wire serial interface.
*
* RETURNS: OK, or ERROR if the Fast Ethernet controller cannot be enabled.
*/

STATUS sysFecEnetEnable
    (
    UINT32	motCpmAddr	/* base address of the on-chip RAM */
    )
    {
    EPCFG *cfg  = getEpCfg();
    int intLevel = intLock();

    /* Set BCSR to enable FEC PHY */
#ifdef INCLUDE_BCSR
   	*BCSR |= EP852_BCSR_FIRQ;		/* Enable IRQ routing on PC12              */
   	*BCSR &= ~EP852_BCSR_MIICTL;	/* Enable MII PHY LED control              */
   	*BCSR |= EP852_BCSR_MIIPOWER;	/* Apply power to MII transceiver          */
   	taskDelay (5); 					/* Allow time for MII transceiver response */
   	*BCSR |= EP852_BCSR_MIIRST;		/* Enable MII transceiver                  */
   	taskDelay(5); 					/* Allow time for MII transceiver response */
#endif
    /* mask IRQ7 off, as it is shared with MII_TX_CLK */
    *SIMASK (motCpmAddr) &= ~SIMASK_IRM7;

    /* also clear any pending interrupt */
    *SIPEND (motCpmAddr) |= SIPEND_IRQ7;

    /*
     * set the arbitration level for the FEC. Do not enable
     * FEC aggressive mode.
    */

    *SDCR (motCpmAddr) |= SDCR_FAID_BR6;

    *PCPAR(motCpmAddr) &= ~0x0001;
    *PCDIR(motCpmAddr) &= ~0x0001;
    *PCSO(motCpmAddr)  &= ~0x0001;
    *PCINT(motCpmAddr) |=  0x0001;

    /* set Port D to use MII signals */

    *PDPAR (motCpmAddr) = 0x1fff;
    *PDDIR (motCpmAddr) = 0x1fff;

    *CISR(motCpmAddr) = CISR_PC12;

    *CIMR(motCpmAddr)|= CIMR_PC12;

    intUnlock (intLevel);

    return (OK);
    }

/*******************************************************************************
*
* sysFecEnetDisable - disable MII interface to the Fast Ethernet controller
*
* This routine is expected to perform any target specific functions required
* to disable the Ethernet device and the MII interface to the Fast Ethernet
* controller.  This involves restoring the default values for all the Port
* D signals.
*
* RETURNS: OK, always.
*/

STATUS sysFecEnetDisable
    (
    UINT32	motCpmAddr	/* base address of the on-chip RAM */
    )
    {
    int intLevel = intLock();

    *CISR(motCpmAddr) = CISR_PC12;

    *CIMR(motCpmAddr) &= ~CIMR_PC12;

    /* configure all Port D pins as general purpose input pins */

    *PDPAR (motCpmAddr) = 0x0;
    *PDDIR (motCpmAddr) = 0x0;
    *PCINT(motCpmAddr) &= ~0x0001;

    intUnlock (intLevel);

    return (OK);
    }

/*******************************************************************************
*
* sysFecEnetAddrGet - get the hardware Ethernet address
*
* This routine provides the six byte Ethernet hardware address that will be
* used by each individual Fast Ethernet device unit.  This routine must copy
* the six byte address to the space provided by <addr>.
*
* RETURNS: OK, or ERROR if the Ethernet address cannot be returned.
*/

STATUS sysFecEnetAddrGet
    (
    UINT32	motCpmAddr,	/* base address of the on-chip RAM */
    UCHAR *	addr		/* where to copy the Ethernet address */
    )
    {
    bcopy ((char *) sysFecEnetAddr, (char *) addr, sizeof (sysFecEnetAddr));

    return (OK);
    }


#endif /* INCLUDE_MOT_FEC */

/*******************************************************************************
*
* bootParamKeySearch - Search for the given record key and return a pointer to
*		       value associated with the key
*
* This routine searches a parameter area for the desired key value. If found it
* returns the value of the key. The key and value are in the form of:
*
*	2 character key value (PV for example) followed by an ASCII equal (=)
*       followed by an ASCII value field.
*
* RETURNS: NULL on failure or pointer the the value of the key requested.
*/

static char *bootParamKeySearch(char *token,char *search_area)
{
    FAST char *cPtr;
    FAST int   i = 0;

    cPtr = search_area;
    while (i < 256)
	{
		if(cPtr[0] == token[0] && cPtr[1] == token[1])
		{
			/* return pointer to data after the = */
			return ((char *)&cPtr[3]);
		}
	    cPtr++;
	    i++;
	}
    return (NULL);
}

/*
 * Create a local copy of the sysNvRamxxxx routines that make use of the PlanetCore
 * parameters for the non volatile memory size.
 */

#ifndef NV_RAM_READ
#   define NV_RAM_READ(x) \
	(*(UCHAR *)((int)NV_RAM_ADRS + ((x) * NV_RAM_INTRVL)))
#endif /*NV_RAM_READ*/

#ifndef NV_RAM_WRITE
#   define NV_RAM_WRITE(x,y) \
	(*(UCHAR *)((int)NV_RAM_ADRS + ((x) * NV_RAM_INTRVL)) = (y))
#endif /*NV_RAM_WRITE*/

/******************************************************************************
*
* sysNvRamGet - get the contents of non-volatile RAM
*
* This routine copies the contents of non-volatile memory into a specified
* string.  The string is terminated with an EOS.
*
* RETURNS: OK, or ERROR if access is outside the non-volatile RAM range.
*
* SEE ALSO: sysNvRamSet()
*/

STATUS sysNvRamGet
    (
    char *string,    /* where to copy non-volatile RAM    */
    int strLen,      /* maximum number of bytes to copy   */
    int offset       /* byte offset into non-volatile RAM */
    )
{
    EPCFG *cfg  = getEpCfg();
    offset     += NV_BOOT_OFFSET;   /* boot line begins at <offset> = 0 */

    if ((offset < 0)
     || (strLen < 0)
     || ((offset + strLen) > cfg->sysNvRamSize))
        return (ERROR);

    while (strLen--)
	{
	*string = NV_RAM_READ (offset);
	string++, offset++;
	}
    *string = EOS;

    return (OK);
}

/*******************************************************************************
*
* sysNvRamSet - write to non-volatile RAM
*
* This routine copies a specified string into non-volatile RAM.
*
* RETURNS: OK, or ERROR if access is outside the non-volatile RAM range.
*
* SEE ALSO: sysNvRamGet()
*/

STATUS sysNvRamSet
    (
    char *string,     /* string to be copied into non-volatile RAM */
    int strLen,       /* maximum number of bytes to copy           */
    int offset        /* byte offset into non-volatile RAM         */
    )
{
    EPCFG *cfg    = getEpCfg();
    STATUS result = OK;

    offset += NV_BOOT_OFFSET;   /* boot line begins at <offset> = 0 */

    if ((offset < 0)
     || (strLen < 0)
     || ((offset + strLen) > cfg->sysNvRamSize))
        return ERROR;

    while (strLen--)
	{
	char data;

	data = *string; /* avoid any macro side effects */

	NV_RAM_WRITE (offset, data);

	/* verify data */
	if (NV_RAM_READ (offset) != (UCHAR)data)
	    {
	    result = ERROR;
	    goto exit;
	    }

	string++, offset++;
	}

exit:

    return result;
}

LOCAL void rpxParamExtract(char *pToken,char *pBuf)
{
int	i;

	for(i = 0; i < (PARAM_MAX_LEN - 1); i++){
		if((*pBuf = *pToken++) == 0x0a)
			break;
		++pBuf;
	}
	*pBuf = EOS;
}

/*******************************************************************************
*
* rpxToVxBootParams - translate the Planet Core boot parameters into a vxWorks
*		      compatible boot line and set the ethernet MAC address.
*
* This routine provides the conversion of the stored Planet Core boot parameters
* that are in DPRAM to compatible vxWorks boot parameters, system parameters and
* hardware MAC address for the ethernet. The address supplied is stored by the
* routine sysInit contained in sysALib.s
*
* RETURNS: None, parameters must have been set via Planet Core prior to running
*          vxWorks.
*/

LOCAL void rpxToVxBootParams(char *params)	/* address in DPRAM of Planet Core params to convert */
{
    EPCFG *cfg = getEpCfg();
    char *tmpPtr, c, val;
    int  i, j;

	/* search for the monitor (console) port baud rate */
	tmpPtr = bootParamKeySearch ("SB", params);
	if(tmpPtr != NULL){	/* retrieve the console baud rate parameter */
		cfg->sysConsoleBaud = atoi(tmpPtr);
	}
	/* search for the size of 60x bus DRAM */
	tmpPtr = bootParamKeySearch ("D1", params);
	if(tmpPtr != NULL){
		/* convert parameter to megabytes */
		cfg->sysMemSize = atoi(tmpPtr) * 0x100000;
	}
	/* search for the size of NVRAM */
	tmpPtr = bootParamKeySearch ("NV", params);
	if(tmpPtr != NULL){
		/* convert parameter to kilobytes */
		cfg->sysNvRamSize = atoi(tmpPtr) * 1024;
	}
	/* search for the XTAL frequency */
	tmpPtr = bootParamKeySearch ("XT", params);
	if(tmpPtr != NULL){
		/* convert parameter to kilobytes */
		cfg->sysXtalFreq = atoi(tmpPtr);
	}
	/* search for the board type parameter */
	tmpPtr = bootParamKeySearch ("BO", params);
	if(tmpPtr != NULL){
		rpxParamExtract(tmpPtr,sysBoardTypeStr);
	}
	/* search for the board revision parameter */
	tmpPtr = bootParamKeySearch ("BR", params);
	if(tmpPtr != NULL){
		rpxParamExtract(tmpPtr,sysBoardRevStr);
	}
	/* search for the processor type parameter */
	tmpPtr = bootParamKeySearch ("PR", params);
	if(tmpPtr != NULL){
		rpxParamExtract(tmpPtr,sysCpuTypeStr);
	}
	/* search for the processor variant parameter */
	tmpPtr = bootParamKeySearch ("PV", params);
	if(tmpPtr != NULL){
		rpxParamExtract(tmpPtr,sysCpuVariantStr);
	}
	/* search for the serial port parameter */
	tmpPtr = bootParamKeySearch ("SP", params);
	if(tmpPtr != NULL){
		rpxParamExtract(tmpPtr,sysSerPortStr);
	}
	/* search for the IP address parameter */
	tmpPtr = bootParamKeySearch ("IP", params);
	if(tmpPtr != NULL){
		rpxParamExtract(tmpPtr,sysIpAddr);
	}
    /* search for the ethernet hardware MAC address */
    tmpPtr = bootParamKeySearch ("EA", params);
	if(tmpPtr != NULL){
        /* de-asciify the MAC address */
		for(i = 0; i < 6; i++){
			for(val = 0,j = 0; j < 2; j++){
				c = *tmpPtr++;
				if(isdigit(c)){
					val = (val << 4) + (c - '0');
				}else if(isxdigit(c)){
					val = (val << 4) + (c + 10 - (islower(c) ? 'a' : 'A'));
				}
            }
#ifdef      INCLUDE_CPM
            sysCpmEnetAddr[i] = val;  /* de-asciif'ied the CPM MAC address by octet */

            if (i == 3)
            {
                /* create unique MAC address for CPM */
                sysCpmEnetAddr [i] &= ~0xC0;    /* Enet controller 1 MAC */
            }
#endif

#ifdef      INCLUDE_MOT_FEC
            sysFecEnetAddr[i] = val;  /* de-asciif'ied the FEC MAC address by octet */

            if (i == 3)
            {
                /* create unique MAC address for FEC */
                sysFecEnetAddr [i] &= ~0x40;     /* Enet controller 2 MAC */
                sysFecEnetAddr [i] |=  0x80;
            }
#endif

        }
	}
}

/*******************************************************************************
* sysNvRamSetup - configure the MMU tables based on PlanetCore param, clear the
*                 NvRam to a known state and set the initial boot line if not
*                 set previously.
*
* RETURNS: void
*/

LOCAL void sysNvRamSetup (void)
{
    EPCFG *cfg = getEpCfg();
	char  tempStr[BOOT_LINE_SIZE];
	char *tmpPtr,ipAddrStr[PARAM_MAX_LEN];
	int   i, bootLineLen;
	BOOT_PARAMS	bootParamStruct;
	int k,j;

	/* set NV size based on pCore info */
    sysPhysMemDesc[1].len = cfg->sysNvRamSize;	/* set NV size based on DPRAM */

    if(cfg->sysNvRamSize != 0){				/* if we have any NVRAM, check if boot line exists */
#ifdef INCLUDE_BCSR
		*(char*)BCSR0 |= COMMON_BCSR_ENNVRAM >> 24;		/* enable nvram */
#endif
		sysNvRamGet(tempStr,6,0);
		if(strncmp(tempStr,BOOT_DEV_NAME,3)){
			strcpy(tempStr,DEFAULT_BOOT_LINE);
	        for(i = 0; i < BOOT_LINE_SIZE+1; i++) /* clear the nvram */
	            NV_RAM_WRITE (i, 0x0);
			sysNvRamSet(tempStr,1 + strlen(tempStr),0);
		}
	    bootLineLen = 1 + strlen((char*)(NV_RAM_ADRS+NV_BOOT_OFFSET));
	    sysNvRamGet(sysBootLine,bootLineLen,0);
		bootStringToStruct(sysBootLine,&bootParamStruct);

		if(strcmp(sysIpAddr,bootParamStruct.ead)){
			strcpy(bootParamStruct.ead,sysIpAddr);
			bootStructToString(sysBootLine,&bootParamStruct);
			sysNvRamSet(sysBootLine,1 + strlen(sysBootLine),0);
		}
	}

    return;
}

/***************************************************************************
 *  Return board configuration data area.
 ***************************************************************************/
EPCFG *getEpCfg(void)
{
	return(&epcfg);
}