📄 bsp_a.s
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;
;********************************************************************************************************
; uC/OS-II
; The Real-Time Kernel
;
; (c) Copyright 2002, Jean J. Labrosse, Weston, FL
; All Rights Reserved
;
;
; PIC24FJ Board Support Package
;
;
; File : bsp_a.s
; By : Eric Shufro
;********************************************************************************************************
;
;
;********************************************************************************************************
; CONSTANTS
;********************************************************************************************************
;
.equ __p24HJ256GP610, 1 ; Inform the p24FJ128GA010 header file that we are using a p24FJ128GA010
;
;********************************************************************************************************
; INCLUDES
;********************************************************************************************************
;
.include "p24HJ256GP610.inc" ; Include assembly equates for various CPU registers and bit masks
;.include "os_cpu_util_a.s" ; Include an assembly utility files with macros for saving and restoring the CPU registers
;
;********************************************************************************************************
; LINKER SPECIFICS
;********************************************************************************************************
;
.text ; Locate this file in the text region of the build
;
;********************************************************************************************************
; GLOBALS
;********************************************************************************************************
;
.global __T2Interrupt
.global __T4Interrupt
;
;********************************************************************************************************
; OS Time Tick ISR Handler
;
; Description : This function services the OS Time Tick Interrupt when configured using Timer #2
;
; Notes : All user interrupts should be defined as follows.
;********************************************************************************************************
;
__T2Interrupt:
push.d w0 ; Push W0 and W1 on to the stack
push.d w2 ; Push W2 and W3 on to the stack
push.d w4 ; Push W4 and W5 on to the stack
push.d w6 ; Push W6 and W7 on to the stack
push.d w8 ; Push W8 and W9 on to the stack
push.d w10 ; Push W10 and W11 on to the stack
push.d w12 ; Push W12 and W13 on to the stack
push w14 ; Push W14 **ONLY** on to the stack
push TBLPAG ; Push the Table Page Register on to the stack
push PSVPAG ; Push the Program Space Visability Register on the stack
push RCOUNT ; Push the Repeat Loop Counter Register on to the stack
push SR ; Push the CPU Status Register on to the stack
push CORCON ; 1) Save processor registers
inc.b _OSIntNesting ; 2) Call OSIntEnter() or increment OSIntNesting
dec.b _OSIntNesting, wreg ; 3) Check OSIntNesting. if OSIntNesting == 1, then save the stack pointer, otherwise jump to T2_Cont
bra nz, T2_Cont
mov _OSTCBCur, w0
mov w15, [w0]
T2_Cont:
BCLR IFS0, #T2IF ; 4) Clear the interrupt source
call _OS_Tick_ISR_Handler ; 5) Call YOUR ISR Handler (May be a C function). In this case, the OS Tick ISR Handler
call _OSIntExit ; 6) Call OSIntExit() or decrement 1 from OSIntNesting
pop CORCON ; Pull the Core Control Register from the stack
pop SR ; Pull the CPU Status Register from the stack
pop RCOUNT ; Pull the Repeat Loop Counter Register from the stack
pop PSVPAG ; Pull the Program Space Visability Register on the stack
pop TBLPAG ; Pull the Table Page Register from the stack
pop w14 ; Pull W14 **ONLY** from the stack
pop.d w12 ; Pull W12 and W13 from the stack
pop.d w10 ; Pull W10 and W11 from the stack
pop.d w8 ; Pull W8 and W9 from the stack
pop.d w6 ; Pull W6 and W7 from the stack
pop.d w4 ; Pull W4 and W5 from the stack
pop.d w2 ; Pull W2 and W3 from the stack
pop.d w0
retfie ; 8) Return from interrupt
;
;********************************************************************************************************
; OS Time Tick ISR Handler
;
; Description : This function services the OS Time Tick Interrupt when configured using Timer #4
;
; Notes : All user interrupts should be defined as follows.
;********************************************************************************************************
;
__T4Interrupt:
push.d w0 ; Push W0 and W1 on to the stack
push.d w2 ; Push W2 and W3 on to the stack
push.d w4 ; Push W4 and W5 on to the stack
push.d w6 ; Push W6 and W7 on to the stack
push.d w8 ; Push W8 and W9 on to the stack
push.d w10 ; Push W10 and W11 on to the stack
push.d w12 ; Push W12 and W13 on to the stack
push w14 ; Push W14 **ONLY** on to the stack
push TBLPAG ; Push the Table Page Register on to the stack
push PSVPAG ; Push the Program Space Visability Register on the stack
push RCOUNT ; Push the Repeat Loop Counter Register on to the stack
push SR ; Push the CPU Status Register on to the stack
push CORCON
; 1) Save processor registers
inc.b _OSIntNesting ; 2) Call OSIntEnter() or increment OSIntNesting
dec.b _OSIntNesting, wreg ; 3) Check OSIntNesting. if OSIntNesting == 1, then save the stack pointer, otherwise jump to T2_Cont
bra nz, T4_Cont
mov _OSTCBCur, w0
mov w15, [w0]
T4_Cont:
BCLR IFS1, #T4IF ; 4) Clear the interrupt source
call _OS_Tick_ISR_Handler ; 5) Call YOUR ISR Handler (May be a C function). In this case, the OS Tick ISR Handler
call _OSIntExit ; 6) Call OSIntExit() or decrement 1 from OSIntNesting
pop CORCON ; Pull the Core Control Register from the stack
pop SR ; Pull the CPU Status Register from the stack
pop RCOUNT ; Pull the Repeat Loop Counter Register from the stack
pop PSVPAG ; Pull the Program Space Visability Register on the stack
pop TBLPAG ; Pull the Table Page Register from the stack
pop w14 ; Pull W14 **ONLY** from the stack
pop.d w12 ; Pull W12 and W13 from the stack
pop.d w10 ; Pull W10 and W11 from the stack
pop.d w8 ; Pull W8 and W9 from the stack
pop.d w6 ; Pull W6 and W7 from the stack
pop.d w4 ; Pull W4 and W5 from the stack
pop.d w2 ; Pull W2 and W3 from the stack
pop.d w0
retfie ; 8) Return from interrupt
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