bono_evb_init.txt

飞思卡尔imx27 wince5.0 bootloader源代码

comment ############################################################################
comment # i.MX27 EVB v0.0 or v1.0 Initialization 
comment ############################################################################

comment ############################################################################
comment # History
comment #
comment # revision 0.0.1 by Sky Hu
comment ############################################################################



comment ############################################################################
comment ###
comment ### AHB-Lite IP Interface
comment ###
comment ############################################################################
setmem 0x10000000 0x20040304 32
setmem 0x10020000 0x07FFC200 32
setmem 0x10000004 0xDFFBFCFB 32
setmem 0x10020004 0xFFFFFFFF 32

comment ### PCCR0 (Disable LCDC by clear PERCLK3_EN bit)
comment setmem 0x10027020 0x31084003 32



comment ############################################################################
comment ###
comment ### EIM
comment ###
comment ############################################################################

comment # CS0 Initialization (Async Mode)     
comment # 32-bit, ?? wait states              
setmem 0xD8002000 0x00000E01 32
setmem 0xD8002004 0x00000E01 32


comment # Setting for Memory Map IO Port
comment # CS1 Initialization (Async Mode)
comment # 16-bit, D0..15, ?? wait states
setmem 0xD8002010 0x00002000 32
setmem 0xD8002014 0x11118501 32



comment # Config MUX for pin PF18->CS1
comment # Clear PTF_GIUSE 
comment setmem 0x10015520 0x00000000 32
comment # Clear PTF_GPR
comment setmem 0x10015538 0x00000000 32

comment # CS3 Initialization (Async Mode) SRAM on EVB Base Board
comment # 32-bit, ?? wait states
comment setmem 0xDF001018 0x00000E00 32
comment setmem 0xDF00101C 0x11110601 32

comment # FMCR Register
comment # Select CS3/CSD0 Pin as CS3 only.
comment ##CSD0

setmem 0x10027814 0xFFFFFFC9 32

comment ##CSD1
comment setmem 0x10027814 0xFFFFFFCA 32


comment ### End of Memory Configuration ##########################################

comment ############################################################################
comment ###
comment ### CrossBar (MAX)
comment ###
comment ############################################################################
comment ### Master Priority Register for Slave Port 3 (EMI)
comment ### LCD - highest priority
comment ### ARM - Lowest prority
setmem 0x1003F300 0x00123056 32

comment ############################################################################
comment ###
comment ### PLL and Clock Setting
comment ###
comment ############################################################################

comment #####################################
comment # CLKO Select
comment #####################################
comment ## CCSR (Set CLKO_SEL = CLK32)
setmem 0x10027028 0x00000300 32
comment ## CCSR (Set CLKO_SEL = FCLK)
comment setmem 0x10027028 0x00000307 32
comment ## CCSR (Set CLKO_SEL = HCLK)
comment setmem 0x10027028 0x00000308 32



comment ###### MPCTL0: (For 32.768KHz Input Frequency)
comment #      MPLL = 266MHz

setmem 0x10027004 0x04C22017 32

comment #### Select the Frequency
comment ### CSCR: FCLK=MPLL/1; HCLK=FCLK/2; #####(If MPLL==266MHz, FCLK=266MHz and HCLK=133MHz)
setmem 0x10027000 0x33F00307 32

comment ### CSCR: FCLK=MPLL/1; HCLK=FCLK/3; #####(If MPLL==266MHz, FCLK=266MHz and HCLK=88MHz)
comment setmem 0x10027000 0x5300050F 32

comment ### CSCR: FCLK=MPLL/1; HCLK=FCLK/4; #####(If MPLL==266MHz, FCLK=266MHz and HCLK=66MHz)
comment setmem 0x10027000 0x5300070F 32

comment ### CSCR: FCLK=MPLL/1; HCLK=FCLK/8; #####(If MPLL==266MHz, FCLK=266MHz and HCLK=33MHz)
comment setmem 0x10027000 0x5300090F 32

comment ############################################################################
comment ###
comment ### ESDRAMC
comment ###
comment ############################################################################

comment ########################################################
comment # CSD0 Initialization (SDRAM)   
comment # LPDDR  32bits
comment ########################################################


comment ## ESD_ESDMISC 29'b0_MDDREN_RST__1'b0 ##
comment ## ESD_ESDMISC 29'b0__1'b1__1'b0_1'b0 ##
comment ## enable DDR mode  ##

setmem 0xD8001010 0x00000008 32

setmem 0x10027828 0x55555555 32

setmem 0x10027830 0x55555555 32

setmem 0x10027834 0x55555555 32

setmem 0x10027838 0x55555555 32

setmem 0x1002783C 0x55555555 32

setmem 0xD8001010 0x00000002 32

setmem 0xD8001010 0x00000004 32

comment ## timming config(infineon): XP__WTR__RP_MRD_WR__RAS_RRD_CL___RCD__RC ###
comment ## ESD_ESDCFG0=          32'b11___0___10__10__1__100__01_11_0_011_1010 ##

setmem 0xD8001004 0x007FEB3A 32
comment setmem 0xD8001004 0x006AC43A 32

comment ## ESD_ESDCTL0  SDE_SMODE_SP_ROW_00_COL_00_DSIZ_SREFR_0_PWDT_0_FP_BL_0__PRCT
comment ## ESD_ESDCTL0 32'b1_001__0__010_00__01_00___00___000_0___00_0__0__0_0_00000
comment ## enable CS0 precharge command ##

setmem 0xD8001000 0x92100000 32

comment ## precharge all dummy write only address matter ##

setmem 0xA0000F00 0x12344321 32

comment ## ESD_ESDCTL0  SDE_SMODE_SP_ROW_00_COL_00_DSIZ_SREFR_0_PWDT_0_FP_BL_0__PRCT ##
comment ## ESD_ESDCTL0 32'b1_010__0__010_00__01_00___00___000_0___00_0__0__0_0_00000 ##
comment ## enable CS0 Auto-Refresh command ##

setmem 0xD8001000 0xA2100000 32

comment ## two refresh command dummy write only address matter ##

setmem 0xA0000000 0x12344321 32
setmem 0xA0000000 0x12344321 32

comment ## ESD_ESDCTL0  SDE_SMODE_SP_ROW_00_COL_00_DSIZ_SREFR_0_PWDT_0_FP_BL_0__PRCT ##
comment ## ESD_ESDCTL0 32'b1_011__0__010_00__01_00___00___000_0___00_0__0__0_0_00000 ##

comment ## enable CS0 Load Mode Register command ######################################

setmem 0xD8001000 0xb2100000 32

comment ## dummy write only address matter ##

setmem 0xA0000033 0xff 8

comment ## dummy write only address matter ##

setmem 0xA1000000 0xff 8

comment ## ESD_ESDCTL0  SDE_SMODE_SP_ROW_00_COL_00_DSIZ_SREFR_0_PWDT_0_FP_BL_0__PRCT ###########
comment ## ESD_ESDCTL0 32'b1_000__0__010_00__10_00___10___011_0___00_0__0__0_0_000000 ##########
comment ## normal mode row=010//col=10//dzize=10//self ref=011//PWDT =00//BL =0//prct =000000 ##

setmem 0xD8001000 0x82224405 32

comment ## disable precharge timer  ##########################

comment setmem 0xA0000000 0xDEADBEEF 32