wenshidu.lst

avr基础程序大全

Interrupt Vectors
    00000 940C 0072 JMP	__start|__text_start

Program Code (text area)
__start|__text_start:
    00072 EFCF      LDI	R28,0xFF
    00073 E2D1      LDI	R29,0x21
    00074 BFCD      OUT	0x3D,R28
    00075 BFDE      OUT	0x3E,R29
    00076 51CE      SUBI	R28,0x1E
    00077 40D0      SBCI	R29,0
    00078 EA0A      LDI	R16,0xAA
    00079 8308      ST	Y,R16
    0007A 2400      CLR	R0
    0007B E0E0      LDI	R30,0
    0007C E0F2      LDI	R31,2
    0007D E012      LDI	R17,2
    0007E 31E4      CPI	R30,0x14
    0007F 07F1      CPC	R31,R17
    00080 F011      BEQ	0x0083
    00081 9201      ST	Z+,R0
    00082 CFFB      RJMP	0x007E
    00083 8300      ST	Z,R16
    00084 EEE4      LDI	R30,0xE4
    00085 E0F0      LDI	R31,0
    00086 E0A0      LDI	R26,0
    00087 E0B2      LDI	R27,2
    00088 E010      LDI	R17,0
    00089 E000      LDI	R16,0
    0008A BF0B      OUT	0x3B,R16
    0008B 3EE4      CPI	R30,0xE4
    0008C 07F1      CPC	R31,R17
    0008D F021      BEQ	0x0092
    0008E 95C8      LPM
    0008F 9631      ADIW	R30,1
    00090 920D      ST	X+,R0
    00091 CFF9      RJMP	0x008B
    00092 940E 02C6 CALL	_main
_exit:
    00094 CFFF      RJMP	_exit
FILE: E:\AVR自编程序\11avr实验板\21温湿~1\12864.h
(0001) #include <iom16v.h>
(0002) #include <macros.h>
(0003) #define  uchar unsigned char
(0004) #define  uint  unsigned int
(0005) 
(0006) #define clk 7
(0007) #define set_clk PORTC |= BIT(clk)	  
(0008) #define clr_clk PORTC &= ~BIT(clk)   
(0009) 
(0010) #define sid 6
(0011) #define clr_sid PORTC &= ~BIT(sid)  
(0012) #define set_sid PORTC |= BIT(sid)     
(0013) 
(0014) void delay()
(0015) {
(0016) 	NOP();
_delay:
    00095 0000      NOP
(0017) 	NOP();
    00096 0000      NOP
    00097 9508      RET
(0018) }
(0019) void delay_us(uint i)
(0020) {
(0021) 	while(i--)
_delay_us:
  i                    --> R16
    00098 0118      MOVW	R2,R16
    00099 5001      SUBI	R16,1
    0009A 4010      SBCI	R17,0
    0009B 2022      TST	R2
    0009C F7D9      BNE	0x0098
    0009D 2033      TST	R3
    0009E F7C9      BNE	0x0098
    0009F 9508      RET
_delay_ms:
  a                    --> R20
  i                    --> R16
    000A0 934A      ST	-Y,R20
    000A1 935A      ST	-Y,R21
(0022) 	 {;}
(0023) }
(0024) void delay_ms(uint i)
(0025) {
(0026) 	uint a;
(0027) 	for(;i;i--)
    000A2 C00B      RJMP	0x00AE
(0028) 		{
(0029) 		for(a=0;a<672;a++);
    000A3 2744      CLR	R20
    000A4 2755      CLR	R21
    000A5 C002      RJMP	0x00A8
    000A6 5F4F      SUBI	R20,0xFF
    000A7 4F5F      SBCI	R21,0xFF
    000A8 3A40      CPI	R20,0xA0
    000A9 E0E2      LDI	R30,2
    000AA 075E      CPC	R21,R30
    000AB F3D0      BCS	0x00A6
    000AC 5001      SUBI	R16,1
    000AD 4010      SBCI	R17,0
    000AE 3000      CPI	R16,0
    000AF 0701      CPC	R16,R17
    000B0 F791      BNE	0x00A3
    000B1 9159      LD	R21,Y+
    000B2 9149      LD	R20,Y+
    000B3 9508      RET
_wr_bit:
  data                 --> R10
  n                    --> R12
    000B4 92AA      ST	-Y,R10
    000B5 92CA      ST	-Y,R12
    000B6 2EA2      MOV	R10,R18
    000B7 2EC0      MOV	R12,R16
(0030) 		}
(0031) }
(0032) void wr_bit(uchar n,uchar data)
(0033) {
(0034) 	for(;n;n--)	  		  	   		//写入位数
    000B8 C00B      RJMP	0x00C4
(0035) 		{
(0036) 		if(data&0x80)				 
    000B9 FEA7      SBRS	R10,7
    000BA C002      RJMP	0x00BD
(0037) 			{set_sid;}
    000BB 9AAE      SBI	0x15,6
    000BC C001      RJMP	0x00BE
(0038) 		else
(0039) 			{clr_sid;}
    000BD 98AE      CBI	0x15,6
(0040) 		data=data<<1;	  			 
    000BE 0CAA      LSL	R10
(0041) 		delay();
    000BF DFD5      RCALL	_delay
(0042) 		set_clk;				 
    000C0 9AAF      SBI	0x15,7
(0043) 		delay();
    000C1 DFD3      RCALL	_delay
(0044) 		clr_clk;
    000C2 98AF      CBI	0x15,7
    000C3 94CA      DEC	R12
    000C4 20CC      TST	R12
    000C5 F799      BNE	0x00B9
    000C6 90C9      LD	R12,Y+
    000C7 90A9      LD	R10,Y+
    000C8 9508      RET
_write_shuju:
  b                    --> R20
  a                    --> R10
    000C9 92AA      ST	-Y,R10
    000CA 934A      ST	-Y,R20
    000CB 2F42      MOV	R20,R18
    000CC 2EA0      MOV	R10,R16
(0045) 		}
(0046) }
(0047) void write_shuju(uchar a,uchar b)
(0048) {
(0049) 	clr_clk;
    000CD 98AF      CBI	0x15,7
(0050) 
(0051) 	wr_bit(5,0xFF);			  		 
    000CE EF2F      LDI	R18,0xFF
    000CF E005      LDI	R16,5
    000D0 DFE3      RCALL	_wr_bit
(0052) 
(0053) 	wr_bit(1,0x00);	 				 
    000D1 2722      CLR	R18
    000D2 E001      LDI	R16,1
    000D3 DFE0      RCALL	_wr_bit
(0054) 	
(0055) 	if(a==0)	 					 
    000D4 20AA      TST	R10
    000D5 F421      BNE	0x00DA
(0056) 		wr_bit(1,0x00);				 
    000D6 2722      CLR	R18
    000D7 E001      LDI	R16,1
    000D8 DFDB      RCALL	_wr_bit
    000D9 C003      RJMP	0x00DD
(0057) 	else
(0058) 		wr_bit(1,0x80);				 
    000DA E820      LDI	R18,0x80
    000DB E001      LDI	R16,1
    000DC DFD7      RCALL	_wr_bit
(0059) 
(0060) 	wr_bit(1,0x00);	 				//写入一个0
    000DD 2722      CLR	R18
    000DE E001      LDI	R16,1
    000DF DFD4      RCALL	_wr_bit
(0061) 	
(0062) 	wr_bit(4,b);					//写入数据的高4位
    000E0 2F24      MOV	R18,R20
    000E1 E004      LDI	R16,4
    000E2 DFD1      RCALL	_wr_bit
(0063) 	
(0064) 	wr_bit(4,0x00);					//写入4个0
    000E3 2722      CLR	R18
    000E4 E004      LDI	R16,4
    000E5 DFCE      RCALL	_wr_bit
(0065) 	
(0066) 	wr_bit(4,(b<<4));				//写入数据的低4位
    000E6 2F24      MOV	R18,R20
    000E7 702F      ANDI	R18,0xF
    000E8 9522      SWAP	R18
    000E9 E004      LDI	R16,4
    000EA DFC9      RCALL	_wr_bit
(0067) 	
(0068) 	wr_bit(4,0x00);					//写入4个0
    000EB 2722      CLR	R18
    000EC E004      LDI	R16,4
    000ED DFC6      RCALL	_wr_bit
(0069) 
(0070) 	set_sid;					  
    000EE 9AAE      SBI	0x15,6
    000EF 9149      LD	R20,Y+
    000F0 90A9      LD	R10,Y+
    000F1 9508      RET
(0071) }
(0072) void lcd12864_init()
(0073) {
(0074) 	write_shuju(0,0x30);			//设置数据方式：8位
_lcd12864_init:
    000F2 E320      LDI	R18,0x30
    000F3 2700      CLR	R16
    000F4 DFD4      RCALL	_write_shuju
(0075) 	delay_us(200);
    000F5 EC08      LDI	R16,0xC8
    000F6 E010      LDI	R17,0
    000F7 DFA0      RCALL	_delay_us
(0076) 	write_shuju(0,0x30);			//设置数据方式：8位
    000F8 E320      LDI	R18,0x30
    000F9 2700      CLR	R16
    000FA DFCE      RCALL	_write_shuju
(0077) 	delay_us(80);
    000FB E500      LDI	R16,0x50
    000FC E010      LDI	R17,0
    000FD DF9A      RCALL	_delay_us
(0078) 	write_shuju(0,0x0C);			//开显示
    000FE E02C      LDI	R18,0xC
    000FF 2700      CLR	R16
    00100 DFC8      RCALL	_write_shuju
(0079) 	delay_us(80);
    00101 E500      LDI	R16,0x50
    00102 E010      LDI	R17,0
    00103 DF94      RCALL	_delay_us
(0080) 	write_shuju(0,0x40);			//开显示
    00104 E420      LDI	R18,0x40
    00105 2700      CLR	R16
    00106 DFC2      RCALL	_write_shuju
(0081) 	delay_us(200);
    00107 EC08      LDI	R16,0xC8
    00108 E010      LDI	R17,0
    00109 DF8E      RCALL	_delay_us
(0082) 	write_shuju(0,0x01);			//清屏
    0010A E021      LDI	R18,1
    0010B 2700      CLR	R16
    0010C DFBC      RCALL	_write_shuju
(0083) 	delay_ms(100);
    0010D E604      LDI	R16,0x64
    0010E E010      LDI	R17,0
    0010F CF90      RJMP	_delay_ms
_write_hz:
  s                    --> R20
    00110 934A      ST	-Y,R20
    00111 935A      ST	-Y,R21
    00112 01A8      MOVW	R20,R16
(0084) 
(0085) }
(0086) void write_hz(char *s)
(0087)    {
    00113 C006      RJMP	0x011A
(0088) 	while(*s)
(0089) 	    {
(0090) 		write_shuju(1,*s);
    00114 01FA      MOVW	R30,R20
    00115 8120      LD	R18,Z
    00116 E001      LDI	R16,1
    00117 DFB1      RCALL	_write_shuju
(0091) 		s++;
    00118 5F4F      SUBI	R20,0xFF
    00119 4F5F      SBCI	R21,0xFF
    0011A 01FA      MOVW	R30,R20
    0011B 8020      LD	R2,Z
    0011C 2022      TST	R2
    0011D F7B1      BNE	0x0114
    0011E 9159      LD	R21,Y+
    0011F 9149      LD	R20,Y+
    00120 9508      RET
_locate:
  y                    --> R20
  x                    --> R10
    00121 940E 02EF CALL	push_xgsetF00C
    00123 2F42      MOV	R20,R18
    00124 2EA0      MOV	R10,R16
(0092) 		}
(0093) }
(0094) void locate(uchar x,uchar y)
(0095) {
(0096) 	switch(x)
    00125 2D6A      MOV	R22,R10
    00126 2777      CLR	R23
    00127 3061      CPI	R22,1
    00128 E0E0      LDI	R30,0
    00129 077E      CPC	R23,R30
    0012A F069      BEQ	0x0138
    0012B 3062      CPI	R22,2
    0012C E0E0      LDI	R30,0
    0012D 077E      CPC	R23,R30
    0012E F079      BEQ	0x013E
    0012F 3063      CPI	R22,3
    00130 E0E0      LDI	R30,0
    00131 077E      CPC	R23,R30
    00132 F089      BEQ	0x0144
    00133 3064      CPI	R22,4
    00134 E0E0      LDI	R30,0
    00135 077E      CPC	R23,R30
    00136 F099      BEQ	0x014A
    00137 C017      RJMP	0x014F
(0097) 		{
(0098) 		case 1:write_shuju(0,(0x80+y-1)); break;
    00138 2F24      MOV	R18,R20
    00139 5820      SUBI	R18,0x80
    0013A 5021      SUBI	R18,1
    0013B 2700      CLR	R16
    0013C DF8C      RCALL	_write_shuju
    0013D C011      RJMP	0x014F
(0099) 		case 2:write_shuju(0,(0x90+y-1));break;
    0013E 2F24      MOV	R18,R20
    0013F 5720      SUBI	R18,0x70
    00140 5021      SUBI	R18,1
    00141 2700      CLR	R16
    00142 DF86      RCALL	_write_shuju
    00143 C00B      RJMP	0x014F
(0100) 		case 3:write_shuju(0,(0x88+y-1));break;	
    00144 2F24      MOV	R18,R20
    00145 5728      SUBI	R18,0x78
    00146 5021      SUBI	R18,1
    00147 2700      CLR	R16
    00148 DF80      RCALL	_write_shuju
    00149 C005      RJMP	0x014F
(0101) 		case 4:write_shuju(0,(0x98+y-1));break;
    0014A 2F24      MOV	R18,R20
    0014B 5628      SUBI	R18,0x68
    0014C 5021      SUBI	R18,1
    0014D 2700      CLR	R16
    0014E DF7A      RCALL	_write_shuju
(0102) 		default:break;		 
    0014F 940C 02F6 JMP	pop_xgsetF00C
(0103) 		}
(0104) }
(0105) void cls()
(0106) {
(0107) 	delay_us(200);
_cls:
    00151 EC08      LDI	R16,0xC8
    00152 E010      LDI	R17,0
    00153 DF44      RCALL	_delay_us