uart.lst

avr基础程序大全

Interrupt Vectors
    00000 940C 002B JMP	__text_start|__start
    00016 940C 0097 JMP	_uart_rx

Program Code (text area)
__text_start|__start:
    0002B E5CF      LDI	R28,0x5F
    0002C E0D4      LDI	R29,4
    0002D BFCD      OUT	0x3D,R28
    0002E BFDE      OUT	0x3E,R29
    0002F 51CE      SUBI	R28,0x1E
    00030 40D0      SBCI	R29,0
    00031 EA0A      LDI	R16,0xAA
    00032 8308      ST	Y,R16
    00033 2400      CLR	R0
    00034 E6E1      LDI	R30,0x61
    00035 E0F0      LDI	R31,0
    00036 E010      LDI	R17,0
    00037 36E2      CPI	R30,0x62
    00038 07F1      CPC	R31,R17
    00039 F011      BEQ	0x003C
    0003A 9201      ST	Z+,R0
    0003B CFFB      RJMP	0x0037
    0003C 8300      ST	Z,R16
    0003D E5E4      LDI	R30,0x54
    0003E E0F0      LDI	R31,0
    0003F E6A0      LDI	R26,0x60
    00040 E0B0      LDI	R27,0
    00041 E010      LDI	R17,0
    00042 E000      LDI	R16,0
    00043 BF0B      OUT	0x3B,R16
    00044 35E5      CPI	R30,0x55
    00045 07F1      CPC	R31,R17
    00046 F021      BEQ	0x004B
    00047 95C8      LPM
    00048 9631      ADIW	R30,1
    00049 920D      ST	X+,R0
    0004A CFF9      RJMP	0x0044
    0004B 940E 00A8 CALL	_main
_exit:
    0004D CFFF      RJMP	_exit
_delay:
  i                    --> R20
  j                    --> R22
  ms                   --> R16
    0004E 940E 0122 CALL	push_xgsetF000
FILE: E:\AVR自编程序\11实验板\16串口通信\UART.c
(0001) #include <iom16v.h>
(0002) #include <macros.h>
(0003) #define  uchar unsigned char
(0004) #define  uint  unsigned int
(0005) 
(0006) #define  mclk   8000000
(0007) #pragma interrupt_handler uart_rx:12
(0008) uchar rdata,flag=0;
(0009) void delay(uint ms)
(0010) {
(0011)         uint i,j;
(0012) 	for(i=0;i<ms;i++)
    00050 2744      CLR	R20
    00051 2755      CLR	R21
    00052 C00B      RJMP	0x005E
(0013) 	   {
(0014) 	   for(j=0;j<1141;j++);
    00053 2766      CLR	R22
    00054 2777      CLR	R23
    00055 C002      RJMP	0x0058
    00056 5F6F      SUBI	R22,0xFF
    00057 4F7F      SBCI	R23,0xFF
    00058 3765      CPI	R22,0x75
    00059 E0E4      LDI	R30,4
    0005A 077E      CPC	R23,R30
    0005B F3D0      BCS	0x0056
    0005C 5F4F      SUBI	R20,0xFF
    0005D 4F5F      SBCI	R21,0xFF
    0005E 1740      CP	R20,R16
    0005F 0751      CPC	R21,R17
    00060 F390      BCS	0x0053
    00061 940C 0127 JMP	pop_xgsetF000
_uart_init:
  baud                 --> R10
    00063 940E 012C CALL	push_xgsetF00C
    00065 0158      MOVW	R10,R16
(0015)        }
(0016) }
(0017) 
(0018) void uart_init(uint baud)
(0019) {
(0020)     UCSRB=0x00; 
    00066 2422      CLR	R2
    00067 B82A      OUT	0x0A,R2
(0021)    UCSRA=0x00; 		    //控制寄存器清零
    00068 B82B      OUT	0x0B,R2
(0022)    UCSRC=(1<<URSEL)|(0<<UPM0)|(3<<UCSZ0);   
    00069 E886      LDI	R24,0x86
    0006A BD80      OUT	0x20,R24
(0023)                                                         //选择UCSRC，异步模式，禁止                        
(0024)                                                      //   校验，1位停止位，8位数据位
(0025)    baud=mclk/16/baud-1	;   //波特率最大为65K
    0006B 0115      MOVW	R2,R10
    0006C 2444      CLR	R4
    0006D 2455      CLR	R5
    0006E E240      LDI	R20,0x20
    0006F EA51      LDI	R21,0xA1
    00070 E067      LDI	R22,7
    00071 E070      LDI	R23,0
    00072 925A      ST	-Y,R5
    00073 924A      ST	-Y,R4
    00074 923A      ST	-Y,R3
    00075 922A      ST	-Y,R2
    00076 018A      MOVW	R16,R20
    00077 019B      MOVW	R18,R22
    00078 940E 00BE CALL	div32s
    0007A E041      LDI	R20,1
    0007B E050      LDI	R21,0
    0007C E060      LDI	R22,0
    0007D E070      LDI	R23,0
    0007E 0118      MOVW	R2,R16
    0007F 0129      MOVW	R4,R18
    00080 1A24      SUB	R2,R20
    00081 0A35      SBC	R3,R21
    00082 0A46      SBC	R4,R22
    00083 0A57      SBC	R5,R23
    00084 0151      MOVW	R10,R2
(0026)    UBRRL=baud; 					     	  
    00085 B829      OUT	0x09,R2
(0027)    UBRRH=baud>>8; 		   //设置波特率
    00086 2C23      MOV	R2,R3
    00087 2433      CLR	R3
    00088 BC20      OUT	0x20,R2
(0028)    UCSRB=(1<<TXEN)|(1<<RXEN)|(1<<RXCIE); 
    00089 E988      LDI	R24,0x98
    0008A B98A      OUT	0x0A,R24
(0029)                                                        //接收、发送使能，接收中断使能
(0030)    SREG=BIT(7);	                //全局中断开放
    0008B E880      LDI	R24,0x80
    0008C BF8F      OUT	0x3F,R24
(0031)    DDRD|=0X02;	                //配置TX为输出（很重要）
    0008D 9A89      SBI	0x11,1
    0008E 940C 0133 JMP	pop_xgsetF00C
(0032) 
(0033) }
(0034) void uart_sendB(uchar data)
(0035) {
(0036)    while(!(UCSRA&(BIT(UDRE)))) ;
_uart_sendB:
  data                 --> R16
    00090 9B5D      SBIS	0x0B,5
    00091 CFFE      RJMP	_uart_sendB
(0037)    UDR=data;
    00092 B90C      OUT	0x0C,R16
(0038)    while(!(UCSRA&(BIT(TXC))));
    00093 9B5E      SBIS	0x0B,6
    00094 CFFE      RJMP	0x0093
(0039)    UCSRA|=BIT(TXC);
    00095 9A5E      SBI	0x0B,6
    00096 9508      RET
_uart_rx:
    00097 922A      ST	-Y,R2
    00098 938A      ST	-Y,R24
    00099 B62F      IN	R2,0x3F
    0009A 922A      ST	-Y,R2
(0040) }
(0041) void uart_rx()
(0042) {
(0043)     UCSRB&=~BIT(RXCIE);
    0009B 9857      CBI	0x0A,7
(0044) 	rdata=UDR;
    0009C B02C      IN	R2,0x0C
    0009D 9220 0061 STS	rdata,R2
(0045) 	flag=1;
    0009F E081      LDI	R24,1
    000A0 9380 0060 STS	flag,R24
(0046) 	UCSRB|=BIT(RXCIE);
    000A2 9A57      SBI	0x0A,7
    000A3 9029      LD	R2,Y+
    000A4 BE2F      OUT	0x3F,R2
    000A5 9189      LD	R24,Y+
    000A6 9029      LD	R2,Y+
    000A7 9518      RETI
(0047) }
(0048) void main()
(0049) {
(0050)     //uchar i=4;
(0051) 	//uchar j='a';
(0052)     uart_init(19200);
_main:
    000A8 E000      LDI	R16,0
    000A9 E41B      LDI	R17,0x4B
    000AA DFB8      RCALL	_uart_init
    000AB C00A      RJMP	0x00B6
(0053) 	while(1)
(0054) 	{
(0055) 	   if(flag)
    000AC 9020 0060 LDS	R2,flag
    000AE 2022      TST	R2
    000AF F031      BEQ	0x00B6
(0056) 	   {
(0057) 	      uart_sendB(rdata);
    000B0 9100 0061 LDS	R16,rdata
    000B2 DFDD      RCALL	_uart_sendB
(0058) 		  flag=0;
FILE: <library>
    000B3 2422      CLR	R2
    000B4 9220 0060 STS	flag,R2
    000B6 CFF5      RJMP	0x00AC
    000B7 9508      RET
div32u:
    000B8 94E8      BCLR	6
    000B9 C001      RJMP	0x00BB
mod32u:
    000BA 9468      BSET	6
    000BB D030      RCALL	long_div_prolog
    000BC 24CC      CLR	R12
    000BD C009      RJMP	0x00C7
div32s:
    000BE 94E8      BCLR	6
    000BF C001      RJMP	0x00C1
mod32s:
    000C0 9468      BSET	6
    000C1 D02A      RCALL	long_div_prolog
    000C2 FD37      SBRC	R19,7
    000C3 940E 013A CALL	neg32
    000C5 FDB7      SBRC	R27,7
    000C6 D052      RCALL	neg_R24_R27
    000C7 2477      CLR	R7
    000C8 2488      CLR	R8
    000C9 2499      CLR	R9
    000CA 24AA      CLR	R10
    000CB 24BB      CLR	R11
    000CC D042      RCALL	tst_R16_R19
    000CD F0C1      BEQ	0x00E6
    000CE D045      RCALL	tst_R24_R27
    000CF F0B1      BEQ	0x00E6
    000D0 E2E8      LDI	R30,0x28
    000D1 0F00      LSL	R16
    000D2 1F11      ROL	R17
    000D3 1F22      ROL	R18
    000D4 1F33      ROL	R19
    000D5 1C77      ROL	R7
    000D6 1C88      ROL	R8
    000D7 1C99      ROL	R9
    000D8 1CAA      ROL	R10
    000D9 1CBB      ROL	R11
    000DA 1688      CP	R8,R24
    000DB 0699      CPC	R9,R25
    000DC 06AA      CPC	R10,R26
    000DD 06BB      CPC	R11,R27
    000DE F028      BCS	0x00E4
    000DF 1A88      SUB	R8,R24
    000E0 0A99      SBC	R9,R25
    000E1 0AAA      SBC	R10,R26
    000E2 0ABB      SBC	R11,R27
    000E3 9503      INC	R16
    000E4 95EA      DEC	R30
    000E5 F759      BNE	0x00D1
    000E6 F426      BRTC	0x00EB
    000E7 2D08      MOV	R16,R8
    000E8 2D19      MOV	R17,R9
    000E9 2D2A      MOV	R18,R10
    000EA 2D3B      MOV	R19,R11
    000EB C013      RJMP	long_div_epilog
long_div_prolog:
    000EC 927A      ST	-Y,R7
    000ED 928A      ST	-Y,R8
    000EE 929A      ST	-Y,R9
    000EF 92AA      ST	-Y,R10
    000F0 92BA      ST	-Y,R11
    000F1 92CA      ST	-Y,R12
    000F2 93EA      ST	-Y,R30
    000F3 938A      ST	-Y,R24
    000F4 939A      ST	-Y,R25
    000F5 93AA      ST	-Y,R26
    000F6 93BA      ST	-Y,R27
    000F7 858B      LDD	R24,Y+11
    000F8 859C      LDD	R25,Y+12
    000F9 85AD      LDD	R26,Y+13
    000FA 85BE      LDD	R27,Y+14
    000FB 2EC3      MOV	R12,R19
    000FC F00E      BRTS	0x00FE
    000FD 26CB      EOR	R12,R27
    000FE 9508      RET
long_div_epilog:
    000FF FCC7      SBRC	R12,7
    00100 940E 013A CALL	neg32
    00102 91B9      LD	R27,Y+
    00103 91A9      LD	R26,Y+
    00104 9199      LD	R25,Y+
    00105 9189      LD	R24,Y+
    00106 91E9      LD	R30,Y+
    00107 90C9      LD	R12,Y+
    00108 90B9      LD	R11,Y+
    00109 90A9      LD	R10,Y+
    0010A 9099      LD	R9,Y+
    0010B 9089      LD	R8,Y+
    0010C 9079      LD	R7,Y+
    0010D 9624      ADIW	R28,4
    0010E 9508      RET
tst_R16_R19:
    0010F 2FE0      MOV	R30,R16
    00110 2BE1      OR	R30,R17
    00111 2BE2      OR	R30,R18
    00112 2BE3      OR	R30,R19
    00113 9508      RET
tst_R24_R27:
    00114 2FE8      MOV	R30,R24
    00115 2BE9      OR	R30,R25
    00116 2BEA      OR	R30,R26
    00117 2BEB      OR	R30,R27
    00118 9508      RET
neg_R24_R27:
    00119 9580      COM	R24
    0011A 9590      COM	R25
    0011B 95A0      COM	R26
    0011C 95B0      COM	R27
    0011D 5F8F      SUBI	R24,0xFF
    0011E 4F9F      SBCI	R25,0xFF
    0011F 4FAF      SBCI	R26,0xFF
    00120 4FBF      SBCI	R27,0xFF
    00121 9508      RET
push_xgsetF000:
    00122 937A      ST	-Y,R23
    00123 936A      ST	-Y,R22
    00124 935A      ST	-Y,R21
    00125 934A      ST	-Y,R20
    00126 9508      RET
pop_xgsetF000:
    00127 9149      LD	R20,Y+
    00128 9159      LD	R21,Y+
    00129 9169      LD	R22,Y+
    0012A 9179      LD	R23,Y+
    0012B 9508      RET
push_xgsetF00C:
    0012C 937A      ST	-Y,R23
    0012D 936A      ST	-Y,R22
    0012E 935A      ST	-Y,R21
    0012F 934A      ST	-Y,R20
    00130 92BA      ST	-Y,R11
    00131 92AA      ST	-Y,R10
    00132 9508      RET
pop_xgsetF00C:
    00133 90A9      LD	R10,Y+
    00134 90B9      LD	R11,Y+
    00135 9149      LD	R20,Y+
    00136 9159      LD	R21,Y+
    00137 9169      LD	R22,Y+
    00138 9179      LD	R23,Y+
    00139 9508      RET
neg32:
    0013A 9500      COM	R16
    0013B 9510      COM	R17
    0013C 9520      COM	R18
    0013D 9530      COM	R19
    0013E 5F0F      SUBI	R16,0xFF
    0013F 4F1F      SBCI	R17,0xFF
    00140 4F2F      SBCI	R18,0xFF
    00141 4F3F      SBCI	R19,0xFF
    00142 9508      RET