📄 uart.lis
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06AE 9598 cbi 0x12,5
06B0 ; itmp = (addr&0x7f) <<1 ;
06B0 8A2D mov R24,R10
06B2 8F77 andi R24,127
06B4 C82E mov R12,R24
06B6 CC0C lsl R12
06B8 88E0 ldi R24,8
06BA A82E mov R10,R24
06BC 15C0 rjmp L141
06BE L138:
06BE ; for(tmp=8;tmp>0;tmp--){
06BE ; Pclk_0;
06BE C198 cbi 0x18,1
06C0 ; if((itmp&0x80) == 0x80) PData_1;
06C0 8C2D mov R24,R12
06C2 8078 andi R24,128
06C4 8038 cpi R24,128
06C6 11F4 brne L142
06C8 C09A sbi 0x18,0
06CA 01C0 rjmp L143
06CC L142:
06CC ; else PData_0;
06CC C098 cbi 0x18,0
06CE L143:
06CE 0AE0 ldi R16,10
06D0 10E0 ldi R17,0
06D2 20E0 ldi R18,0
06D4 30E0 ldi R19,0
06D6 EFDD rcall _delay
06D8 C19A sbi 0x18,1
06DA 0AE0 ldi R16,10
06DC 10E0 ldi R17,0
06DE 20E0 ldi R18,0
06E0 30E0 ldi R19,0
06E2 E9DD rcall _delay
06E4 CC0C lsl R12
06E6 L139:
06E6 AA94 dec R10
06E8 L141:
06E8 2224 clr R2
06EA 2A14 cp R2,R10
06EC 40F3 brlo L138
06EE ; delay(10);
06EE ; Pclk_1;
06EE ; delay(10);
06EE ; itmp = itmp<<1;
06EE ; }
06EE ; itmp = 0;
06EE CC24 clr R12
06F0 ; // P2MDOUT = 0xA0;
06F0 ;
06F0 ; PData_1;
06F0 C09A sbi 0x18,0
06F2 ; DDRB = 0X02;
06F2 82E0 ldi R24,2
06F4 87BB out 0x17,R24
06F6 88E0 ldi R24,8
06F8 A82E mov R10,R24
06FA 14C0 rjmp L147
06FC L144:
06FC ; for(tmp=8;tmp>0;tmp--){
06FC ; itmp =itmp <<1;
06FC CC0C lsl R12
06FE ; Pclk_0;
06FE C198 cbi 0x18,1
0700 ; delay(10);
0700 0AE0 ldi R16,10
0702 10E0 ldi R17,0
0704 20E0 ldi R18,0
0706 30E0 ldi R19,0
0708 D6DD rcall _delay
070A ; if(PData == 1) itmp= itmp+1;
070A 88B3 in R24,0x18
070C 8170 andi R24,1
070E 88BB out 0x18,R24
0710 8130 cpi R24,1
0712 09F4 brne L148
0714 C394 inc R12
0716 L148:
0716 C19A sbi 0x18,1
0718 0AE0 ldi R16,10
071A 10E0 ldi R17,0
071C 20E0 ldi R18,0
071E 30E0 ldi R19,0
0720 CADD rcall _delay
0722 L145:
0722 AA94 dec R10
0724 L147:
0724 2224 clr R2
0726 2A14 cp R2,R10
0728 48F3 brlo L144
072A ; Pclk_1;
072A ; delay(10);
072A ; }
072A ; Pclk_0;
072A C198 cbi 0x18,1
072C ; PSEL_1;
072C 959A sbi 0x12,5
072E ; // P2MDOUT = 0xA0;
072E ; DDRD = 0x30;
072E 80E3 ldi R24,48
0730 81BB out 0x11,R24
0732 ; DDRB = 0X03;
0732 83E0 ldi R24,3
0734 87BB out 0x17,R24
0736 ; return(itmp);
0736 0C2D mov R16,R12
0738 L137:
0738 00D0 rcall pop_gset4
073A .dbline 0 ; func end
073A 0895 ret
073C ; tmp -> R10
073C ; itmp -> R12
073C ; value -> R14
073C ; addr -> y+10
.even
073C _WriteToCC1020Register::
073C 00D0 rcall push_arg4
073E 00D0 rcall push_gset5
0740 E22E mov R14,R18
0742 ; }
0742 ;
0742 ;
0742 ; /****************************************************************************/
0742 ; /* This routine writes to a single CC1020 register */
0742 ; /****************************************************************************/
0742 ; void WriteToCC1020Register(unsigned char addr, unsigned char value)
0742 ; {
0742 ; unsigned char itmp = 0;
0742 CC24 clr R12
0744 ; unsigned char tmp=0;;
0744 AA24 clr R10
0746 ; // P2MDOUT = 0xE0;
0746 ; DDRD = 0x30;
0746 80E3 ldi R24,48
0748 81BB out 0x11,R24
074A ; DDRB = 0X03;
074A 83E0 ldi R24,3
074C 87BB out 0x17,R24
074E ; delay(10);
074E 0AE0 ldi R16,10
0750 10E0 ldi R17,0
0752 20E0 ldi R18,0
0754 30E0 ldi R19,0
0756 AFDD rcall _delay
0758 ; PSEL_0;
0758 9598 cbi 0x12,5
075A ; itmp = (addr&0x7f) <<1;
075A 8A85 ldd R24,y+10
075C 8F77 andi R24,127
075E C82E mov R12,R24
0760 CC0C lsl R12
0762 ; itmp = itmp+1;
0762 C394 inc R12
0764 88E0 ldi R24,8
0766 A82E mov R10,R24
0768 15C0 rjmp L154
076A L151:
076A ; for(tmp=8;tmp>0;tmp--){
076A ; Pclk_0;
076A C198 cbi 0x18,1
076C ; if((itmp&0x80) == 0x80) PData_1;
076C 8C2D mov R24,R12
076E 8078 andi R24,128
0770 8038 cpi R24,128
0772 11F4 brne L155
0774 C09A sbi 0x18,0
0776 01C0 rjmp L156
0778 L155:
0778 ; else PData_0;
0778 C098 cbi 0x18,0
077A L156:
077A 0AE0 ldi R16,10
077C 10E0 ldi R17,0
077E 20E0 ldi R18,0
0780 30E0 ldi R19,0
0782 99DD rcall _delay
0784 C19A sbi 0x18,1
0786 0AE0 ldi R16,10
0788 10E0 ldi R17,0
078A 20E0 ldi R18,0
078C 30E0 ldi R19,0
078E 93DD rcall _delay
0790 CC0C lsl R12
0792 L152:
0792 AA94 dec R10
0794 L154:
0794 2224 clr R2
0796 2A14 cp R2,R10
0798 40F3 brlo L151
079A ; delay(10);
079A ; Pclk_1;
079A ; delay(10);
079A ; itmp = itmp<<1;
079A ; }
079A ;
079A ; itmp = value;
079A CE2C mov R12,R14
079C 88E0 ldi R24,8
079E A82E mov R10,R24
07A0 15C0 rjmp L160
07A2 L157:
07A2 ; for(tmp=8;tmp>0;tmp--){
07A2 ; Pclk_0;
07A2 C198 cbi 0x18,1
07A4 ; if((itmp&0x80) == 0x80) PData_1;
07A4 8C2D mov R24,R12
07A6 8078 andi R24,128
07A8 8038 cpi R24,128
07AA 11F4 brne L161
07AC C09A sbi 0x18,0
07AE 01C0 rjmp L162
07B0 L161:
07B0 ; else PData_0;
07B0 C098 cbi 0x18,0
07B2 L162:
07B2 0AE0 ldi R16,10
07B4 10E0 ldi R17,0
07B6 20E0 ldi R18,0
07B8 30E0 ldi R19,0
07BA 7DDD rcall _delay
07BC C19A sbi 0x18,1
07BE 0AE0 ldi R16,10
07C0 10E0 ldi R17,0
07C2 20E0 ldi R18,0
07C4 30E0 ldi R19,0
07C6 77DD rcall _delay
07C8 CC0C lsl R12
07CA L158:
07CA AA94 dec R10
07CC L160:
07CC 2224 clr R2
07CE 2A14 cp R2,R10
07D0 40F3 brlo L157
07D2 ; delay(10);
07D2 ; Pclk_1;
07D2 ; delay(10);
07D2 ; itmp = itmp<<1;
07D2 ; }
07D2 ; Pclk_0;
07D2 C198 cbi 0x18,1
07D4 ; PSEL_1;
07D4 959A sbi 0x12,5
07D6 ; // P2MDOUT = 0xA0;
07D6 ; DDRD = 0x30;
07D6 80E3 ldi R24,48
07D8 81BB out 0x11,R24
07DA ; DDRB = 0X03;
07DA 83E0 ldi R24,3
07DC 87BB out 0x17,R24
07DE L150:
07DE 00D0 rcall pop_gset5
07E0 2496 adiw R28,4
07E2 .dbline 0 ; func end
07E2 0895 ret
.even
07E4 _SetupAGC::
07E4 ; }
07E4 ;
07E4 ; void SetupAGC(void)
07E4 ; {
07E4 ; // int RSSI1,RSSI2;
07E4 ; // unsigned char vga;
07E4 ; WriteToCC1020Register(CC1020_VGA2,0xbf); //disable agc LNA2gain maximun
07E4 2FEB ldi R18,191
07E6 02E1 ldi R16,18
07E8 A9DF rcall _WriteToCC1020Register
07EA ; WriteToCC1020Register(CC1020_VGA3,0x20); //vga_setting=0
07EA 20E2 ldi R18,32
07EC 03E1 ldi R16,19
07EE A6DF rcall _WriteToCC1020Register
07F0 ;
07F0 ; //test rssi
07F0 ; /* for(int i=0x0300;i>0;i--);
07F0 ; RSSI1=ReadRSSIlevelCC1020()*4;
07F0 ; for( vga=0;vga<31;vga++)
07F0 ; {
07F0 ; //WriteToCC1020Register(CC1020_VGA3,(0x20+vga)); //vga_setting=vga
07F0 ; RSSI2=ReadRSSIlevelCC1020();
07F0 ; if(RSSI2>RSSI1) break;
07F0 ; } */
07F0 ;
07F0 ; //vga_setting=vga
07F0 ; WriteToCC1020Register(CC1020_VGA3,(0x20+15));
07F0 2FE2 ldi R18,47
07F2 03E1 ldi R16,19
07F4 A3DF rcall _WriteToCC1020Register
07F6 ; //enable agc
07F6 ; WriteToCC1020Register(CC1020_VGA2,0x55);
07F6 25E5 ldi R18,85
07F8 02E1 ldi R16,18
07FA A0DF rcall _WriteToCC1020Register
07FC ; //set cs_level
07FC ; WriteToCC1020Register(CC1020_VGA4,0x20+25);
07FC 29E3 ldi R18,57
07FE 04E1 ldi R16,20
0800 9DDF rcall _WriteToCC1020Register
0802 L163:
0802 .dbline 0 ; func end
0802 0895 ret
0804 ; i -> y+0
0804 ; RXANALOG -> R20
.even
0804 _WakeUpCC1020ToRX::
0804 00D0 rcall push_gset1
0806 402F mov R20,R16
0808 2297 sbiw R28,2
080A ; // _NOP();
080A ; }
080A ;
080A ; /****************************************************************************/
080A ; /* This routine wakes the CC1020 up from PD mode to RX mode */
080A ; /****************************************************************************/
080A ;
080A ; void WakeUpCC1020ToRX(unsigned char RXANALOG)
080A ; {
080A ; volatile int i;
080A ;
080A ; // Turn on xtal oscillator core
080A ; WriteToCC1020Register(CC1020_MAIN,0x1B);
080A 2BE1 ldi R18,27
080C 0027 clr R16
080E 96DF rcall _WriteToCC1020Register
0810 ;
0810 ; // Setup bias current adjustment
0810 ; WriteToCC1020Register(CC1020_ANALOG,RXANALOG);
0810 242F mov R18,R20
0812 07E1 ldi R16,23
0814 93DF rcall _WriteToCC1020Register
0816 80E6 ldi R24,16992
0818 92E4 ldi R25,66
081A 9983 std y+1,R25
081C 8883 std y+0,R24
081E L165:
081E L166:
081E ;
081E ; // Insert wait routine here, must wait for xtal oscillator to stabilise,
081E ; // typically takes 2-5ms.
081E ; for (i=0x4260; i > 0; i--);
081E 8881 ⌨️ 快捷键说明
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