i2c-pxa.c

linux I2C driver for pxa cpu, ov9640 camera. Also include a doc about linux I2C driver

			break;
		}
	}

	ICR &= ~ICR_SCLE;
}

static void i2c_pxa_slave_stop(struct pxa_i2c *i2c)
{
	if (i2c_debug > 2)
		dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop)\n");

	if (i2c->slave != NULL)
		i2c->slave->event(i2c->slave->data, I2C_SLAVE_EVENT_STOP);

	if (i2c_debug > 2)
		dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop) acked\n");

	/*
	 * If we have a master-mode message waiting,
	 * kick it off now that the slave has completed.
	 */
	if (i2c->msg)
		i2c_pxa_master_complete(i2c, I2C_RETRY);
}
#else
static void i2c_pxa_slave_txempty(struct pxa_i2c *i2c, u32 isr)
{
//	show_state(i2c);
	if (isr & ISR_BED) {
		/* what should we do here? */
	} else {
		IDBR = 0;
		ICR |= ICR_TB;
	}
	//show_state(i2c);
}

static void i2c_pxa_slave_rxfull(struct pxa_i2c *i2c, u32 isr)
{
	//show_state(i2c);
	ICR |= ICR_TB | ICR_ACKNAK;
	//show_state(i2c);
}

static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr)
{
	int timeout;
//show_state(i2c);
	/*
	 * slave could interrupt in the middle of us generating a
	 * start condition... if this happens, we'd better back off
	 * and stop holding the poor thing up
	 */
	ICR &= ~(ICR_START|ICR_STOP);
	ICR |= ICR_TB | ICR_ACKNAK;

	timeout = 0x10000;

	while (1) {
		if ((IBMR & 2) == 2)
			break;

		timeout--;

		if (timeout <= 0) {
			dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n");
			break;
		}
	}

	ICR &= ~ICR_SCLE;
	//show_state(i2c);
}

static void i2c_pxa_slave_stop(struct pxa_i2c *i2c)
{
	//show_state(i2c);
	if (i2c->msg)
		i2c_pxa_master_complete(i2c, I2C_RETRY);
	//show_state(i2c);
}
#endif

/*
 * PXA I2C Master mode
 */

static inline unsigned int i2c_pxa_addr_byte(struct i2c_msg *msg)
{

	unsigned int addr = (msg->addr & 0x7f) << 1;

//    printk(KERN_INFO"msg->addr=0x%02x,addr=0x%02x\n",msg->addr,addr);
	if (msg->flags & I2C_M_RD)
		addr |= 1;
	return addr;
}

static inline void i2c_pxa_start_message(struct pxa_i2c *i2c)
{
	u32 icr;
//show_state(i2c);
	/*
	 * Step 1: target slave address into IDBR
	 *///printk(KERN_INFO"i2c_pxa_start_message IDBR=0x%08x\n",IDBR);
	IDBR = i2c_pxa_addr_byte(i2c->msg);//printk(KERN_INFO"i2c_pxa_start_message IDBR=0x%08x\n",IDBR);
//	printk(KERN_INFO"i2c_pxa_start_message=0x%02x,%d,%d,%d\n",i2c->msg->addr,i2c->msg->buf,i2c->msg->flags,i2c->msg->len);
//    printk(KERN_INFO"i2c_pxa_start_message i2c->msg_idx=%d\n",i2c->msg_idx);
	/*
	 * Step 2: initiate the write.
	 */
	icr = ICR & ~(ICR_STOP | ICR_ALDIE);
	ICR = icr | ICR_START | ICR_TB;
//	printk(KERN_INFO"2 i2c_pxa_start_message i2c->msg_idx=%d\n",i2c->msg_idx);
//show_state(i2c);
}

/*
 * We are protected by the adapter bus mutex.
 */
static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
{
	long timeout;
	int ret;
//show_state(i2c);
	/*
	 * Wait for the bus to become free.
	 */
//    printk(KERN_INFO"i2c_pxa_do_xfer\n");
	ret = i2c_pxa_wait_bus_not_busy(i2c);
	if (ret) {
		dev_info(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
		goto out;
	}
//printk(KERN_INFO"111 i2c_pxa_do_xfer\n");
	/*
	 * Set master mode.
	 */
	ret = i2c_pxa_set_master(i2c);
	if (ret) {
		dev_info(&i2c->adap.dev, "i2c_pxa_set_master: error %d\n", ret);
		goto out;
	}
//printk(KERN_INFO"222 i2c_pxa_do_xfer\n");
	spin_lock_irq(&i2c->lock);

	i2c->msg = msg;
	i2c->msg_num = num;
	i2c->msg_idx = 0;
	i2c->msg_ptr = 0;
	i2c->irqlogidx = 0;
//printk(KERN_INFO"333 i2c_pxa_do_xfer i2c->msg_idx=%d\n",i2c->msg_idx);
	i2c_pxa_start_message(i2c);
//printk(KERN_INFO"444 i2c_pxa_do_xfer i2c->msg_idx=%d\n",i2c->msg_idx);
	spin_unlock_irq(&i2c->lock);
//printk(KERN_INFO"555 i2c_pxa_do_xfer i2c->msg_idx=%d\n",i2c->msg_idx);


	/*
	 * The rest of the processing occurs in the interrupt handler.
	 */
	timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 50000);
//printk(KERN_INFO"666 i2c_pxa_do_xfer timeout=%d,i2c->msg_idx=%d\n",timeout,i2c->msg_idx);
	/*
	 * We place the return code in i2c->msg_idx.
	 */
	ret = i2c->msg_idx;
//printk(KERN_INFO"777 i2c_pxa_do_xfer timeout=%d,i2c->msg_idx=%d\n",timeout,i2c->msg_idx);
	if (timeout == 0)
		i2c_pxa_scream_blue_murder(i2c, "timeout");
//show_state(i2c);
 out:
	 show_state(i2c);
	return ret;
}

/*
 * i2c_pxa_master_complete - complete the message and wake up.
 */
static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret)
{
	//show_state(i2c);
	i2c->msg_ptr = 0;
	i2c->msg = NULL;
	i2c->msg_idx ++;
	i2c->msg_num = 0;
	if (ret)
		i2c->msg_idx = ret;
	wake_up(&i2c->wait);
	//show_state(i2c);
}

static void i2c_pxa_irq_txempty(struct pxa_i2c *i2c, u32 isr)
{
	u32 icr = ICR & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);
//printk(KERN_INFO"748 i2c->msg_idx=%d,i2c->msg_ptr=%d,i2c->msg_irglogidx=%d,i2c->msg_num=%d\n",
//	   i2c->msg_idx,i2c->msg_ptr,i2c->irqlogidx,i2c->msg_num);
	show_state(i2c);

 again:
	/*
	 * If ISR_ALD is set, we lost arbitration.
	 */
	if (isr & ISR_ALD) {
		/*
		 * Do we need to do anything here?  The PXA docs
		 * are vague about what happens.
		 */
		printk(KERN_INFO"isr & ISR_ALD\n");
		i2c_pxa_scream_blue_murder(i2c, "ALD set");

		/*
		 * We ignore this error.  We seem to see spurious ALDs
		 * for seemingly no reason.  If we handle them as I think
		 * they should, we end up causing an I2C error, which
		 * is painful for some systems.
		 */
		return; /* ignore */
	}

	if (isr & ISR_BED) {
		int ret = BUS_ERROR;
        printk(KERN_INFO"isr & ISR_BED\n");
		/*
		 * I2C bus error - either the device NAK'd us, or
		 * something more serious happened.  If we were NAK'd
		 * on the initial address phase, we can retry.
		 */
		if (isr & ISR_ACKNAK) {
			if (i2c->msg_ptr == 0 && i2c->msg_idx == 0)
				ret = I2C_RETRY;
			else
				ret = XFER_NAKED;
		}
		i2c_pxa_master_complete(i2c, ret);
	} else if (isr & ISR_RWM) {
		/*
		 * Read mode.  We have just sent the address byte, and
		 * now we must initiate the transfer.
		 */
		 printk(KERN_INFO"isr & ISR_RWM\n");
		if (i2c->msg_ptr == i2c->msg->len - 1 &&
		    i2c->msg_idx == i2c->msg_num - 1)
			icr |= ICR_STOP | ICR_ACKNAK;

		icr |= ICR_ALDIE | ICR_TB;
	} else if (i2c->msg_ptr < i2c->msg->len) {
		/*
		 * Write mode.  Write the next data byte.
		 */
	//	 printk(KERN_INFO"i2c->msg_ptr < i2c->msg->len\n");
		IDBR = i2c->msg->buf[i2c->msg_ptr++];

		icr |= ICR_ALDIE | ICR_TB;

		/*
		 * If this is the last byte of the last message, send
		 * a STOP.
		 */
		if (i2c->msg_ptr == i2c->msg->len &&
		    i2c->msg_idx == i2c->msg_num - 1)
			icr |= ICR_STOP;
	} else if (i2c->msg_idx < i2c->msg_num - 1) {
		/*
		 * Next segment of the message.
		 */
//		 printk(KERN_INFO"i2c->msg_idx < i2c->msg_num - 1\n");
		i2c->msg_ptr = 0;
		i2c->msg_idx ++;
		i2c->msg++;

		/*
		 * If we aren't doing a repeated start and address,
		 * go back and try to send the next byte.  Note that
		 * we do not support switching the R/W direction here.
		 */
		if (i2c->msg->flags & I2C_M_NOSTART)
			goto again;

		/*
		 * Write the next address.
		 */
		IDBR = i2c_pxa_addr_byte(i2c->msg);

		/*
		 * And trigger a repeated start, and send the byte.
		 */
		icr &= ~ICR_ALDIE;
		icr |= ICR_START | ICR_TB;
	} else {
		if (i2c->msg->len == 0) {
			/*
			 * Device probes have a message length of zero
			 * and need the bus to be reset before it can
			 * be used again.
			 */
	//		 printk(KERN_INFO"i2c->msg->len == 0\n");
			i2c_pxa_reset(i2c);
		}
		printk(KERN_INFO"after i2c->msg->len == 0\n");
		i2c_pxa_master_complete(i2c, 0);
	}

//	show_state(i2c);

	i2c->icrlog[i2c->irqlogidx-1] = icr;

	ICR = icr;
	show_state(i2c);
//	printk(KERN_INFO"852 i2c->msg_idx=%d,i2c->msg_ptr=%d,i2c->msg_irglogidx=%d,i2c->msg_num=%d\n",
	//   i2c->msg_idx,i2c->msg_ptr,i2c->irqlogidx,i2c->msg_num);
}

static void i2c_pxa_irq_rxfull(struct pxa_i2c *i2c, u32 isr)
{
	u32 icr = ICR & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);
    printk(KERN_INFO"i2c_pxa_irq_rxfull\n");
	/*
	 * Read the byte.
	 */
	i2c->msg->buf[i2c->msg_ptr++] = IDBR;

	if (i2c->msg_ptr < i2c->msg->len) {
		/*
		 * If this is the last byte of the last
		 * message, send a STOP.
		 */
		if (i2c->msg_ptr == i2c->msg->len - 1)
			icr |= ICR_STOP | ICR_ACKNAK;

		icr |= ICR_ALDIE | ICR_TB;
//	show_state(i2c);

	} else {
		i2c_pxa_master_complete(i2c, 0);
	}

	i2c->icrlog[i2c->irqlogidx-1] = icr;

	ICR = icr;
	show_state(i2c);
}

static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id, struct pt_regs *regs)
{
	struct pxa_i2c *i2c = dev_id;
	u32 isr = ISR;
//show_state(i2c);
	if (i2c_debug > 2 && 0) {
		dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n",
			__func__, isr, ICR, IBMR);
		decode_ISR(isr);
	}

	if (i2c->irqlogidx < ARRAY_SIZE(i2c->isrlog))
		i2c->isrlog[i2c->irqlogidx++] = isr;

//	show_state(i2c);
//printk(KERN_INFO"896 i2c->msg_idx=%d,i2c->msg_ptr=%d,i2c->msg_irglogidx=%d,i2c->msg_num=%d\n",
//	   i2c->msg_idx,i2c->msg_ptr,i2c->irqlogidx,i2c->msg_num);
	/*
	 * Always clear all pending IRQs.
	 */
	ISR = isr & (ISR_SSD|ISR_ALD|ISR_ITE|ISR_IRF|ISR_SAD|ISR_BED);

	if (isr & ISR_SAD)
		i2c_pxa_slave_start(i2c, isr);
	if (isr & ISR_SSD)
		i2c_pxa_slave_stop(i2c);

	if (i2c_pxa_is_slavemode(i2c)) {
		if (isr & ISR_ITE)
			i2c_pxa_slave_txempty(i2c, isr);
		if (isr & ISR_IRF)
			i2c_pxa_slave_rxfull(i2c, isr);
	} else if (i2c->msg) {
		if (isr & ISR_ITE)
			i2c_pxa_irq_txempty(i2c, isr);
		if (isr & ISR_IRF)
			i2c_pxa_irq_rxfull(i2c, isr);
	} else {
		i2c_pxa_scream_blue_murder(i2c, "spurious irq");
	}
//show_state(i2c);
	return IRQ_HANDLED;
}


static int i2c_pxa_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
{
	struct pxa_i2c *i2c = adap->algo_data;
	int ret, i;
//show_state(i2c);
	/* If the I2C controller is disabled we need to reset it (probably due
 	   to a suspend/resume destroying state). We do this here as we can then
 	   avoid worrying about resuming the controller before its users. */
//	printk(KERN_INFO"i2c_pxa_xferICR:%08x\n",ICR);
	if (!(ICR & ICR_IUE))
	{
//		printk(KERN_INFO"enter reset function\n");
		i2c_pxa_reset(i2c);
	}
//	printk(KERN_INFO"in the function i2c_pxa_xfer\n");
//    printk(KERN_INFO"the retries is %d\n",adap->retries);
//	printk(KERN_INFO"the name is %s\n",adap->name);
	for (i = adap->retries; i >= 0; i--) {
		ret = i2c_pxa_do_xfer(i2c, msgs, num);
		if (ret != I2C_RETRY)
			goto out;

		if (i2c_debug)
			dev_info(&adap->dev, "Retrying transmission\n");
		udelay(100);
	}
	i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
	ret = -EREMOTEIO;
//	show_state(i2c);
 out:
	 show_state(i2c);
	i2c_pxa_set_slave(i2c, ret);
	return ret;
}

static u32 i2c_pxa_functionality(struct i2c_adapter *adap)
{

	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;

}

static struct i2c_algorithm i2c_pxa_algorithm = {
	.master_xfer	= i2c_pxa_xfer,
	.functionality	= i2c_pxa_functionality,
};

static struct pxa_i2c i2c_pxa = {
	.lock	= SPIN_LOCK_UNLOCKED,
	.wait	= __WAIT_QUEUE_HEAD_INITIALIZER(i2c_pxa.wait),
	.adap	= {
		.owner		= THIS_MODULE,
		.algo		= &i2c_pxa_algorithm,
		.name		= "pxa2xx-i2c",
		.retries	= 5,
	},
};

static int i2c_pxa_probe(struct platform_device *dev)
{
	struct pxa_i2c *i2c = &i2c_pxa;
//	show_state(i2c);
#ifdef CONFIG_I2C_PXA_SLAVE
	struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
#endif
	int ret;

#ifdef CONFIG_PXA27x
    printk(KERN_INFO"CONFIG_PXA27x\n");
	pxa_gpio_mode(GPIO117_I2CSCL_MD);
	pxa_gpio_mode(GPIO118_I2CSDA_MD);
	udelay(100);
#endif

	i2c->slave_addr = I2C_PXA_SLAVE_ADDR;

#ifdef CONFIG_I2C_PXA_SLAVE
	i2c->slave = &eeprom_client;
//	printk(KERN_INFO"CONFIG_I2C_PXA_SLAVE\n");
	if (plat) {
		i2c->slave_addr = plat->slave_addr;
		if (plat->slave)
			i2c->slave = plat->slave;
	}
#endif

	pxa_set_cken(CKEN14_I2C, 1);
	ret = request_irq(IRQ_I2C, i2c_pxa_handler, SA_INTERRUPT,
			  "pxa2xx-i2c", i2c);
	if (ret)
		goto out;

	i2c_pxa_reset(i2c);

	i2c->adap.algo_data = i2c;
	i2c->adap.dev.parent = &dev->dev;

	ret = i2c_add_adapter(&i2c->adap);
	if (ret < 0) {
		printk(KERN_INFO "I2C: Failed to add bus\n");
		goto err_irq;
	}

	platform_set_drvdata(dev, i2c);

#ifdef CONFIG_I2C_PXA_SLAVE
	printk(KERN_INFO "I2C: %s: PXA I2C adapter, slave address %d\n",
	       i2c->adap.dev.bus_id, i2c->slave_addr);
#else
	printk(KERN_INFO "I2C: %s: PXA I2C adapter\n",
	       i2c->adap.dev.bus_id);
#endif
//show_state(i2c);
	return 0;

 err_irq:
	free_irq(IRQ_I2C, i2c);
 out:
	 show_state(i2c);
	return ret;
}

static int i2c_pxa_remove(struct platform_device *dev)
{

	struct pxa_i2c *i2c = platform_get_drvdata(dev);
//	show_state(i2c);
	platform_set_drvdata(dev, NULL);

	i2c_del_adapter(&i2c->adap);
	free_irq(IRQ_I2C, i2c);
	pxa_set_cken(CKEN14_I2C, 0);
//show_state(i2c);
	return 0;
}

static struct platform_driver i2c_pxa_driver = {
	.probe		= i2c_pxa_probe,
	.remove		= i2c_pxa_remove,
	.driver		= {
		.name	= "pxa2xx-i2c",
	},
};

static int __init i2c_adap_pxa_init(void)
{
//	printk(KERN_INFO"i2c_adap_pxa_init\n");
	return platform_driver_register(&i2c_pxa_driver);
}

static void i2c_adap_pxa_exit(void)
{
	return platform_driver_unregister(&i2c_pxa_driver);
}

MODULE_LICENSE("GPL");

module_init(i2c_adap_pxa_init);
module_exit(i2c_adap_pxa_exit);