📄 run_sender.c
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//run_sender.c
//
// Project Red 2002: High Performance OFDM Modem
// Against Channel Imperfections
// Auther: Linus Falk
#include "ofdm.h"
#include "get_data.h"
#include "mod.h"
#include "compcomp.h"
#include "cyclpref.h"
float frame1[FRAME_LENGTH];
float frame2[FRAME_LENGTH];
#pragma DATA_SECTION(BitLoadBuffer1, ".edata");
volatile bitload_struct BitLoadBuffer1;
#pragma DATA_SECTION(BitLoadBuffer2, ".edata");
volatile bitload_struct BitLoadBuffer2;
volatile bitload_struct *CurrentBitLoadBuffer;
volatile bitload_struct *NextBitLoadBuffer;
unsigned int frame_number = 0;
float *current_frame;
void build_frame(void);
void print_frame(float frame[FRAME_LENGTH]);
void run_sender(void){
wait_for_host();
//build the 2 initial frames
current_frame = frame1;
memset(current_frame, 0,FRAME_LENGTH*sizeof(float));
build_frame();
current_frame = frame2;
memset(current_frame, 0,FRAME_LENGTH*sizeof(float));
build_frame();
/* Start DMA Ch2 Transfer */
DMA_AUTO_START(DMA_CH2);
//DMA_START(DMA_CH2);
//run forever
while(TRUE){
}
}
void build_frame(void){
unsigned int i,t;
unsigned char data;
const unsigned char training[] = {1,0,3,1,2,2,3,2,0,1,1,1,1,3,1,3};
unsigned char modulation;
//increase frame number, 1..1024
frame_number = frame_number%1024;
frame_number++;
//update bitloading
/*if(NextBitLoadBuffer->use_from_frame == frame_number){ //time to change bitload buffer
if(CurrentBitLoadBuffer == &BitLoadBuffer1){
NextBitLoadBuffer = CurrentBitLoadBuffer;
CurrentBitLoadBuffer = &BitLoadBuffer2;
//pci_message_send(FILL_BITLOADBUFFER1_MM);
}else{
NextBitLoadBuffer = CurrentBitLoadBuffer;
CurrentBitLoadBuffer = &BitLoadBuffer1;
//send mail to host to fill buffer2
//pci_message_send(FILL_BITLOADBUFFER2_MM);
}
}*/
//build frame
for(i=0,t=0; i< NR_OF_CHANNELS; i++){
if((i-3)%8 == 0){
//training data always 2bit
data = training[t++];
//modulate, always use 4QAM on training bits
mod(data, (char)2, current_frame+(i*2+2+PREFIX_LENGTH)); //+2 Depending on the fact that the 2 first will be set to 0;
}else if(i<3 || i>=124){ //don't send on lowest and highest channels
current_frame[i*2 +2 +PREFIX_LENGTH] = 0;
current_frame[i*2 +3 +PREFIX_LENGTH] = 0;
}else{
modulation = CurrentBitLoadBuffer->channel_modulation[i];
get_data(modulation,&data); //get data from Host
//modulate
mod(data, (char)modulation, current_frame+(i*2+2+PREFIX_LENGTH)); //+2 Depending on the fact that the 2 first will be set to 0;
}
}
//complex complete
compcomp(current_frame+PREFIX_LENGTH);
//do ifft
ifft(current_frame+PREFIX_LENGTH);
//Remove Im part, and add cyclic prefix
addCyclPref(current_frame);
//puts("block ready");
}
interrupt void isr_build_frame(void) // ISR for DMA channel 2
{
unsigned int sec_ctrl;
// Read memory-mapped register
sec_ctrl = REG_READ(DMA2_SECONDARY_CTRL_ADDR);
// Get BLOCK COND bit
if (GET_BIT(&sec_ctrl, BLOCK_COND))
RESET_BIT(&sec_ctrl, BLOCK_COND); // Reset/clear bit
// Write to memory-mapped register
REG_WRITE(DMA2_SECONDARY_CTRL_ADDR, sec_ctrl);
DMA_GADDR_B = (unsigned int) current_frame;
// Performs signal processing on current block
build_frame();
//switch frame
if(current_frame == frame1){
current_frame = frame2;
}else{
current_frame = frame1;
}
}
void init_bitload(void){
int i;
BitLoadBuffer1.use_from_frame = 1;
BitLoadBuffer2.use_from_frame = 512;
for(i=0; i< 127; i++){
BitLoadBuffer1.channel_modulation[i] = 4;
BitLoadBuffer2.channel_modulation[i] = 4;
}
CurrentBitLoadBuffer = &BitLoadBuffer1;
NextBitLoadBuffer = &BitLoadBuffer2;
}
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