📄 t101_util.c
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0xB2 , DISP_DFLT_VDENS, //V Start //DWVS_L_REG
0xB3 ,(DISP_DFLT_VDENS>>8), //25 //DWVS_H_REG
0xB4 ,(H_Size&0xFF), //H Width //DWHSZ_L_REG
0xB5 ,(H_Size>>8), //DWHSZ_H_REG
0xB6 ,(V_Size&0xFF), //DWVSZ_L_REG
0xB7 ,(V_Size>>8), //DWVSZ_H_REG
0xB8 , DISP_DFLT_HTOTAL, //H Total //30 //PH_TOT_L_REG
0xB9 ,(DISP_DFLT_HTOTAL>>8), //PH_TOT_H_REG
0xBA , DISP_DFLT_VTOTAL, //V Total //PV_TOT_L_REG
0xBB ,(DISP_DFLT_VTOTAL>>8), //PV_TOT_H_REG
0xBC , DISP_DFLT_HSWIDTH, //HSYNC Width //PH_PW_L_REG
0xBD ,(DISP_DFLT_HSWIDTH>>8), //35 //PH_PW_H_REG
0xBE , DISP_DFLT_VSWIDTH, //VSYNC Width //PV_PW_L_REG
0xBF ,(DISP_DFLT_VSWIDTH>>8), //PV_PW_H_REG
//Scaling
0x72 , 0x33, //H Scale //SC_HOR_H1
0x73 , 0x73, //SC_HOR_H2
0x74 , 0x00, //V Scale //40 //SC_VER_V1
0x75 , 0x40, //SC_VER_V2
//LineBuffer Prefill
0xe2 , 0x11,
0x84 , 0x00, //LINE_BUF_L_REG
0x85 , 0x10, //LINE_BUF_H_REG
0xE1 , 0xa0, //OPIN_CFG_REG
0x50 , 0x10, //45 //VSYNC_TIME_MEA_REG
0x38 , 0x50, //HSYNC_MISSCNT_L_REG
0x39 , 0x00, //HSYNC_MISSCNT_H_REG
0x3A , 0x20, //VSYNC_DLT_REG
0x3B , 0x03, //HSYNC_DLT_REG
#ifdef TCON
0xE0 , (0x91 | CPH1 | CPH2 |CPH3), //PW_MGRCTRL_REG, Bruce, 2006/01/09 for flexibility
#ifdef T100
0xE1 , 0xf4, //OPIN_CFG_REG
#else
0xe1 , 0xe0,
#ifdef _160_234
0xe0 , 0xbf,
#endif
#endif
#else
0xE0 , (0x91 | CPH1 | CPH2 |CPH3), //PW_MGRCTRL_REG
0xE1 , 0x00, //OPIN_CFG_REG
#endif
0x9C , 0x02, //DITHERING
0x90 , 0x04,//0x04, //IMG_FUNCTRL_REG
//De-Interlace enable
0x30 , 0x00,//(I1CReadByte(TW101, 0x30)|0x01)//DITLC_VSHDW_REG
#ifdef OUT_PIN_CONF
0xE1 , OUT_PIN_CONF, //OPIN_CFG_REG
#endif
#ifdef Enable_HelfSample
#ifdef T100A
0x79 , 0x20,
#else
0x78 , 0xa3,
#endif
#endif
#ifdef EnableDither
0x90 , ENCSC | ENDITHER,
0x9c , OutputBit,
#else
0x90 , ENCSC,
#endif
#ifdef T101A
0x90 , 0x07,
0x9c , 0x02,
#endif
#if (defined T112)|(defined T118)
0xea , 0x11,
#endif
#ifdef T116
0xe3 , 0x00,
//0xe4 , 0xe0,
//0xe5 , 0x00,
0xe7 , 0x06,
0xe6 , 0x17, //CCFL 0x27 LED 0x17 change wcj
0xe8 , 0x10,
0xfe , 0xa8,
#endif
0xff , 0x00// End of register settings, bruce, 2006/01/09
};
REGADRVAL code stInitT10xP2[]={
//adr , value
0x3f , 0x00, //ADC_ROFF // Change by Sherman 06'01'10
0x24 , 0xe9, //0 //0x24
0x25 , 0x0F, //0x25
//Video Register Page Setted
0x2E , 0x82, //HACT_START_REG
0x2F , 0x30, //HACT_WIDTH_REG
0x3F , 0x00, //SOFT_RESET_REG
0xc0 , 0x14, //5 //0xc0
0xe0 , 0x10, //0xe0
0x0C , 0xcc,//8a, //CHROMA_AGC_REG
0x18 , 0x21, //CHROMA_DTO0_REG
0x19 , 0xf0, //CHROMA_DTO1_REG
0x1A , 0x7c, //10 //CHROMA_DTO2_REG
0x1B , 0x0f, //CHROMA_DTO3_REG
0x30 , 0x24, //VACT_START_REG
0x31 , 0x61, //VACT_HEIGHT_REG
0x82 , 0x42, //COMB_FILTERCFG_REG
#ifdef T100
0x04 , 0xD8, //15 //HAGC_REG // Change by Sherman for Gamma Adjustment 05'12'19
0x10 , 0x27, //AGC_PKNO_REG
0x00 , 0x00, //SRCSEL_COMBF_REG
0x03 , 0x00, //COMB_FILTERMODE_REG
0x02 , 0x4B, //YC_AGC_REG
0x11 , 0xb9, //20 //AGC_PKGT_CTRL_REG
#else
0x04 , 0xDD,//d8 // Change by Sherman for Gamma Adjustment 05'12'19
0x10 , 0x27,
0x02 , 0xcb,//4B,
0x11 , 0xb9,//FF,
#endif
//Color
0x01 , 0x00,//(I1CReadByte(TW101+4, 0x01)|0x01), //BW_CTRL_REG
#ifdef T100
0x80 , 0x05,//For char clear //LUMINANCE_PKCTRL_REG
0x07 , 0x01,//For color bar clear //YC_OPCTRL_REG
0x08 , 0x70, //CONTRAST_REG // Change by Sherman for Gamma Adjustment 05'12'19
0x0A , 0x58, //25 //SAT_REG
0x09 , 0x18, //BRIGHT_REG
#else
0x08 , 0x70, // Change by Sherman for Gamma Adjustment 05'12'19
0x09 , 0x28,
0x80 , 0x05,
#endif
//0x2c , 0x30,
0x2d , 0x48,//60, // Add by Sherman 06'01'10s
0x3f , 0x01, //ADC_ROFF // Change by Sherman 06'01'10
0xff , 0x00, // End of register settings, bruce, 2006/01/09
};
static uCHAR cSVideo=0;
static uCHAR cYPbPr=0; // add by Sherman 06'01'12
/****************************************************************************
* Public Global Variable *
****************************************************************************/
uDWORD m_dwTemp[2];
uWORD m_wDWHSZ=DWHSZ;
uCHAR NoSignal=0;
uCHAR SignalDefine=0x00|SS_NTSC|SS_PAL|SS_SECAM|SS_NTSC_4|SS_PAL_M|SS_PAL_CN;
#ifdef ROTATE
#if (defined T101A)|(defined T101)
uCHAR Dis_Mode=BOTTOM_RIGHT;
#else
uCHAR Dis_Mode=TOP_LEFT;
#endif
#endif
/****************************************************************************
* Public Function *
****************************************************************************/
void InitT10x(void)
{
uCHAR RegIndex,RegAdr;
RegIndex=0;
RegAdr=stInitT10xP0[0].ucRegAdr;
while (RegAdr != 0xFF) // bruce, 2006/01/09
{
if(RegAdr==0x30){
I2CWriteByte(TW101,RegAdr,(I2CReadByte(TW101,0x30)|0x01)); // enable Shadow
I2CWriteByte(TW101,RegAdr,(I2CReadByte(TW101,0x30)&(~0x02))| DEINTERLACE); //Bruce, 2006/01/10
}
else{
I2CWriteByte(TW101,RegAdr,stInitT10xP0[RegIndex].ucRegVal);
}
RegAdr=stInitT10xP0[++RegIndex].ucRegAdr;
}
#ifdef T116
I2CWriteByte(TW101, 0xE0, 0xA9); //kenny, 20060301
#endif
RegIndex=0;
RegAdr=stInitT10xP2[0].ucRegAdr;
while (RegAdr != 0xFF) // bruce, 2006/01/09
{
if(RegAdr==0x01)
I2CWriteByte(TW101+4,RegAdr,(I2CReadByte(TW101+4,0x01)|0x01));// enable black level correction for 10 blank-to-black pedestal
else
I2CWriteByte(TW101+4,RegAdr,stInitT10xP2[RegIndex].ucRegVal);
RegAdr=stInitT10xP2[++RegIndex].ucRegAdr;
}
//=========================================================================
// Panel specified register settings
//=========================================================================
//#if (EMPTY_ARRAY)
for(RegIndex=0;RegIndex < PanelSpecP0Cnt;RegIndex++)
{
I2CWriteByte(TW101,ucaPanelSpecAdrP0[RegIndex],ucaPanelSpecDataP0[RegIndex]);
}
//#endif
for(RegIndex=0;RegIndex < PanelSpecP2Cnt;RegIndex++)
{
I2CWriteByte(TW101+4,ucaPanelSpecAdrP2[RegIndex],ucaPanelSpecDataP2[RegIndex]);
}
#ifdef ROTATE
SET_Dismod();
#endif
}
#ifdef TCON
void TconInit(void)
{
uCHAR TconIndex;
for(TconIndex=0;TconIndex < P1TconCnt;TconIndex++)
I2CWriteByte(TW101+2, TconAddress+TconIndex, TconP1Data[TconIndex]);
}
#endif
#ifdef ROTATE
void SET_Dismod(void)
{
switch (Dis_Mode){
case TOP_LEFT: //Start from top-left
#ifdef ANALOG_PANEL
I2CWriteByte(TW101,0xE1, ScanMode[0]);
#else
UP_DOWN = DigiPanlScanMode[0]>>1;
LEFT_RIGHT = DigiPanlScanMode[0]&0x01;
I2CWriteByte(TW101,0xE1, ScanMode[0]&0xF0);
#endif
break;
case TOP_RIGHT: //Start from top-right
#ifdef ANALOG_PANEL
I2CWriteByte(TW101,0xE1, ScanMode[1]);
#else
UP_DOWN = DigiPanlScanMode[1]>>1;
LEFT_RIGHT = DigiPanlScanMode[1]&0x01;
I2CWriteByte(TW101,0xE1, ScanMode[1]&0xF0);
#endif
break;
case BOTTOM_RIGHT: //Start from bottom-right
#ifdef ANALOG_PANEL
I2CWriteByte(TW101,0xE1, ScanMode[2]);
#else
UP_DOWN = DigiPanlScanMode[2]>>1;
LEFT_RIGHT = DigiPanlScanMode[2]&0x01;
I2CWriteByte(TW101,0xE1, ScanMode[2]&0xF0);
#endif
break;
case BOTTOM_LEFT: //Start from bottom-left
#ifdef ANALOG_PANEL
I2CWriteByte(TW101,0xE1, ScanMode[3]);
#else
UP_DOWN = DigiPanlScanMode[3]>>1;
LEFT_RIGHT = DigiPanlScanMode[3]&0x01;
I2CWriteByte(TW101,0xE1, ScanMode[3]&0xF0);
#endif
break;
}
#ifdef OUT_PIN_CONF
I2CWriteByte(TW101,0xE1, OUT_PIN_CONF);
#endif
return;
}
#endif
void SourceSelect(void)
{
//sm061019
/*I2CWriteByte(TW101, 0xC2, I2CReadByte(TW101, 0xC2)|(PSYNC_STR|IGNORE_VSYNC));
I2CWriteByte(TW101, 0x9d, 0x10);
I2CWriteByte(TW101, 0x9e, 0xff);
I2CWriteByte(TW101, 0x9f, 0x40);
I2CWriteByte(TW101, PATTERN_CTRL, 0x87);
*/
I2CWriteByte(TW101,0x0f,0x70); //2005-03030 for position shift
I2CWriteByte(TW101,0x0f,0x00); //2005-03030 for position shift
I2CWriteByte(TW101,0x31,0x00);
I2CWriteByte(TW101,0x1a, 0x87);
I2CWriteByte(TW101,0x18, uiaSrcMux[(m_cSource&0x0F)*2]>>8); // cMux1);
I2CWriteByte(TW101,0x19, uiaSrcMux[(m_cSource&0x0F)*2]&0xFF); // cMux2);
if(uiaSrcMux[(m_cSource&0x0F)*2+1]==itypeSVIDEO)
{
#ifdef T112
I2CWriteByte(TW101,0x11, 0x22);
#elif (defined T118)
I2CWriteByte(TW101,0x11, 0x0d);
#else
I2CWriteByte(TW101,0x11, 0x05);
#endif
I2CWriteByte(TW101+4,0x07, 0x24);//0x05|0x22);
I2CWriteByte(TW101+4,0x00, I2CReadByte(TW101+4,0x00)|0x01);
I2CWriteByte(TW101+4,0x01, I2CReadByte(TW101+4,0x01)&~ENYPbPr);
I2CWriteByte(TW101+4,0x03, I2CReadByte(TW101+4,0x03)|0x03);
}
else if (uiaSrcMux[(m_cSource&0x0F)*2+1]==itypeCVBS)
{
#ifdef T118
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