📄 isrs.s
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; File: isrs.s
.equ ASSEMBLY_LANGUAGE, 1
.include "memmap.inc"
; TIMER0 ISR.
.global timer0_count
.section .data
timer0_count: .word 0xFFFF ;65.536ms overflow
.section .text
timer0_int:
push [CPU_FLAGS_REG]
int PUSHALL_INT ; save R0-R14 to stack.
mov [TMR0_REG], [timer0_count]
call timer0_isr ; Call the C level ISR.
int POPALL_INT ; restore R0-R14 from stack.
pop [CPU_FLAGS_REG]
sti
ret
.section .data
timer1_count: .word 0xC350 ;50ms overflow
.section .text
timer1_int:
push [CPU_FLAGS_REG]
int PUSHALL_INT ; save R0-R14 to stack.
mov [TMR1_REG], [timer1_count]
call timer1_isr ; Call the C level ISR.
int POPALL_INT ; restore R0-R14 from stack.
pop [CPU_FLAGS_REG]
sti
ret
.global set_timer0_count
set_timer0_count:
mov [timer0_count], r0 ; store the new value in timer0_count
and [IRQ_EN_REG], ~TMR0_IRQ_EN ; disable timer0 interrupt.
mov [TMR0_REG], r0
or [IRQ_EN_REG], TMR0_IRQ_EN ; enable timer0 interrupt.
ret
;extern interrupt isr
gpio24_irq0:
;cli
;mov [UART_TX_REG],0xf5 ;test line.......................
;push [CPU_FLAGS_REG]
;int PUSHALL_INT ; save R0-R14 to stack.
mov b[irq0_flag],0x01
mov b[spi_ack_flag],0x01
;mov [UART_TX_REG],0xf9 ;test line.......................
;call gpio24_interrupt_isr ; Call the C level ISR.
;int POPALL_INT ; restore R0-R14 from stack.
;pop [CPU_FLAGS_REG]
sti
ret
;spi interrupt isr
spi_tx_int:
push [CPU_FLAGS_REG]
int PUSHALL_INT ; save R0-R14 to stack.
call spi_tx_isr ; Call the C level ISR.
int POPALL_INT ; restore R0-R14 from stack.
pop [CPU_FLAGS_REG]
sti
ret
spi_rx_int:
push [CPU_FLAGS_REG]
int PUSHALL_INT ; save R0-R14 to stack.
call spi_rx_isr ; Call the C level ISR.
int POPALL_INT ; restore R0-R14 from stack.
pop [CPU_FLAGS_REG]
sti
ret
spi_dma_done_int:
push [CPU_FLAGS_REG]
int PUSHALL_INT ; save R0-R14 to stack.
mov [SPI_IRQ_CLR_REG],0x01
call spi_dma_done_isr ; Call the C level ISR.
int POPALL_INT ; restore R0-R14 from stack.
pop [CPU_FLAGS_REG]
sti
ret
;spi interrupt isr end
.section .data
old_sie1_done_int: .short 0
.section .text
sie1_host_done_int:
; Clear the interrupt
; or [HOST1_STAT_REG], bmHOST_INT_XFERDONE;
push [CPU_FLAGS_REG]
int PUSHALL_INT ; save R0-R14 to stack.
call sie1_host_done_isr ; Call the C level ISR.
int POPALL_INT ; restore R0-R14 from stack.
pop [CPU_FLAGS_REG]
call [old_sie1_done_int] ; Call the bios handler.
.section .data
old_husb1_sof_int: .short 0
.section .text
sie1_host_sof_int:
; Clear the interrupt.
; or [HOST1_STAT_REG], bmHOST_INT_SOFINTR;
push [CPU_FLAGS_REG]
int PUSHALL_INT ; save R0-R14 to stack.
call sie1_host_sof_isr ; Call the C level ISR.
int POPALL_INT ; restore R0-R14 from stack.
pop [CPU_FLAGS_REG]
call [old_husb1_sof_int]
.section .data
status1_reg_copy: .short 0
.section .text
sie1_host_ins_rem_int:
push [CPU_FLAGS_REG]
int PUSHALL_INT ; save R0-R14 to stack.
; Save a copy of the status register
;mov [UART_TX_REG],[HOST1_STAT_REG] ;test line........................
mov [status1_reg_copy], [HOST1_STAT_REG]
push r8
mov r8, [status1_reg_copy]
and r8, A_CHG_IRQ_FLG
cmp r8, 0
jz 0f
; Clear the interrupt.
or [HOST1_STAT_REG], A_CHG_IRQ_EN
0: mov r8, [status1_reg_copy]
and r8, B_CHG_IRQ_FLG
cmp r8, 0
jz 0f
; Clear the interrupt.
or [HOST1_STAT_REG], B_CHG_IRQ_EN
0: pop r8
; Put the original contents of the status register into R0
mov r0, [status1_reg_copy]
; Call the C level ISR.
;mov [UART_TX_REG],r0 ;test line......................
call sie1_host_ins_rem_isr
; Restore all of the original registers.
int POPALL_INT ; restore R0-R14 from stack.
pop [CPU_FLAGS_REG]
sti
ret
.global isr_init_in_asm
isr_init_in_asm: ; initialization all used interrupt
push [CPU_FLAGS_REG] ; save CPU status register
int PUSHALL_INT ; save R0-R14 to stack.
AND [XMEM_CTL_REG],0b0011100011111000
and [IRQ_EN_REG],0b0001101111110111 ; disable UART interrupt
mov [UART_CTL_REG],0x0d ; UART 9.6K bit test line.....................
;mov [UART_TX_REG],0x88 ; send 0x88 as test UART port
mov [TIMER0_VEC], timer0_int ; set timer0 vector
mov [TMR0_REG], timer0_count ; set timer0 counter register
or [IRQ_EN_REG], TMR0_IRQ_EN ; enable timer0 interrupt
mov [TIMER1_VEC], timer1_int ; set timer0 vector
mov [TMR1_REG], timer1_count ; set timer0 counter register
or [IRQ_EN_REG], TMR1_IRQ_EN ; enable timer0 interrupt
mov [SPI_TX_VEC], spi_tx_int ; set spi tx vector
mov [SPI_RX_VEC], spi_rx_int ; set spi rx vector
mov [SPI_DMA_DONE_VEC], spi_dma_done_int ; set spi DMA done vector
or [IRQ_EN_REG], SPI_IRQ_EN ; enable SPI interrupt
;mov [old_sie1_done_int], [SIE1_HOST_DONE_VEC]
;mov [SIE1_HOST_DONE_VEC], sie1_host_done_int
;mov [old_husb1_sof_int], [SIE1_HOST_SOF_VEC]
;mov [SIE1_HOST_SOF_VEC], sie1_host_sof_int
;mov [HUSB_RESET_INT],husb_reset_port1a
mov [SIE1_HOST_INS_REM_VEC], sie1_host_ins_rem_int ; set sie1 insert and remove interrupt vector
or [HOST1_IRQ_EN_REG], A_CHG_IRQ_EN ; enable SIE1 PORTA change interrupt
mov [GP_IRQ0_VEC],gpio24_irq0
or [GPIO_CTL_REG],0x01 ;enable irq0
or [IRQ_EN_REG],GPIO_IRQ_EN
or [IRQ_EN_REG], HOST1_IRQ_EN ; enable all interrupt of HOST1
mov [WDT_REG],0x00
mov [0xC00A],0x00
int POPALL_INT ; restore R0-R14 from stack.
pop [CPU_FLAGS_REG]
sti
ret ; End of isr_init.
; End of file: isrs.s
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