dds.map.qmsg

文件夹里面有两个文件

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.1 Build 176 10/26/2005 SJ Full Version " "Info: Version 5.1 Build 176 10/26/2005 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Jan 09 08:02:44 2008 " "Info: Processing started: Wed Jan 09 08:02:44 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off dds -c dds " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off dds -c dds" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "kbscan.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file kbscan.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 kbscan-behave " "Info: Found design unit 1: kbscan-behave" {  } { { "kbscan.vhd" "" { Text "F:/dds/kbscan.vhd" 14 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 kbscan " "Info: Found entity 1: kbscan" {  } { { "kbscan.vhd" "" { Text "F:/dds/kbscan.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "boxing.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file boxing.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 boxing " "Info: Found entity 1: boxing" {  } { { "boxing.bdf" "" { Schematic "F:/dds/boxing.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "selec.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file selec.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 selec-xuanze " "Info: Found design unit 1: selec-xuanze" {  } { { "selec.vhd" "" { Text "F:/dds/selec.vhd" 13 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 selec " "Info: Found entity 1: selec" {  } { { "selec.vhd" "" { Text "F:/dds/selec.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "pin.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file pin.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 pin-pinlv " "Info: Found design unit 1: pin-pinlv" {  } { { "pin.vhd" "" { Text "F:/dds/pin.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 pin " "Info: Found entity 1: pin" {  } { { "pin.vhd" "" { Text "F:/dds/pin.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "out.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file out.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 out " "Info: Found entity 1: out" {  } { { "out.bdf" "" { Schematic "F:/dds/out.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "pass.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file pass.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 pass-behave " "Info: Found design unit 1: pass-behave" {  } { { "pass.vhd" "" { Text "F:/dds/pass.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 pass " "Info: Found entity 1: pass" {  } { { "pass.vhd" "" { Text "F:/dds/pass.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "boxing " "Info: Elaborating entity \"boxing\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "kbscan kbscan:inst6 " "Info: Elaborating entity \"kbscan\" for hierarchy \"kbscan:inst6\"" {  } { { "boxing.bdf" "inst6" { Schematic "F:/dds/boxing.bdf" { { -144 264 408 -48 "inst6" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "row kbscan.vhd(32) " "Warning (10492): VHDL Process Statement warning at kbscan.vhd(32): signal \"row\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "kbscan.vhd" "" { Text "F:/dds/kbscan.vhd" 32 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "row kbscan.vhd(41) " "Warning (10492): VHDL Process Statement warning at kbscan.vhd(41): signal \"row\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "kbscan.vhd" "" { Text "F:/dds/kbscan.vhd" 41 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "row kbscan.vhd(50) " "Warning (10492): VHDL Process Statement warning at kbscan.vhd(50): signal \"row\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "kbscan.vhd" "" { Text "F:/dds/kbscan.vhd" 50 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "row kbscan.vhd(59) " "Warning (10492): VHDL Process Statement warning at kbscan.vhd(59): signal \"row\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "kbscan.vhd" "" { Text "F:/dds/kbscan.vhd" 59 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "selec selec:inst8 " "Info: Elaborating entity \"selec\" for hierarchy \"selec:inst8\"" {  } { { "boxing.bdf" "inst8" { Schematic "F:/dds/boxing.bdf" { { 48 616 808 176 "inst8" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "lpm_rom3.vhd 2 1 " "Warning: Using design file lpm_rom3.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 lpm_rom3-SYN " "Info: Found design unit 1: lpm_rom3-SYN" {  } { { "lpm_rom3.vhd" "" { Text "F:/dds/lpm_rom3.vhd" 49 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 lpm_rom3 " "Info: Found entity 1: lpm_rom3" {  } { { "lpm_rom3.vhd" "" { Text "F:/dds/lpm_rom3.vhd" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_rom3 lpm_rom3:inst4 " "Info: Elaborating entity \"lpm_rom3\" for hierarchy \"lpm_rom3:inst4\"" {  } { { "boxing.bdf" "inst4" { Schematic "F:/dds/boxing.bdf" { { 280 256 416 360 "inst4" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus51/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus51/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/altsyncram.tdf" 425 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram lpm_rom3:inst4\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"lpm_rom3:inst4\|altsyncram:altsyncram_component\"" {  } { { "lpm_rom3.vhd" "altsyncram_component" { Text "F:/dds/lpm_rom3.vhd" 80 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}