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📄 dds.tan.rpt

📁 文件夹里面有两个文件
💻 RPT
📖 第 1 页 / 共 5 页
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+------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                             ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                ; Setting            ; From ; To ; Entity Name ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                           ; EPF10K10LC84-4     ;      ;    ;             ;
; Timing Models                                         ; Final              ;      ;    ;             ;
; Number of source nodes to report per destination node ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                 ; 10                 ;      ;    ;             ;
; Number of paths to report                             ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                          ; Off                ;      ;    ;             ;
; Use Fast Timing Models                                ; Off                ;      ;    ;             ;
; Report IO Paths Separately                            ; Off                ;      ;    ;             ;
; Default hold multicycle                               ; Same As Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                      ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                 ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements               ; On                 ;      ;    ;             ;
; Enable Recovery/Removal analysis                      ; Off                ;      ;    ;             ;
; Enable Clock Latency                                  ; Off                ;      ;    ;             ;
+-------------------------------------------------------+--------------------+------+----+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                             ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; clk             ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
; start           ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk'                                                                                                                                                                                                                                                                                          ;
+-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------+------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                   ; To                     ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------+------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 41.15 MHz ( period = 24.300 ns )                    ; lpm_rom3:inst4|altsyncram:altsyncram_component|altrom:rom|q[1]~reg_ra0 ; selec:inst8|bo_xing[1] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.15 MHz ( period = 24.300 ns )                    ; lpm_rom3:inst4|altsyncram:altsyncram_component|altrom:rom|q[1]~reg_ra1 ; selec:inst8|bo_xing[1] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.15 MHz ( period = 24.300 ns )                    ; lpm_rom3:inst4|altsyncram:altsyncram_component|altrom:rom|q[1]~reg_ra2 ; selec:inst8|bo_xing[1] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.15 MHz ( period = 24.300 ns )                    ; lpm_rom3:inst4|altsyncram:altsyncram_component|altrom:rom|q[1]~reg_ra3 ; selec:inst8|bo_xing[1] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.15 MHz ( period = 24.300 ns )                    ; lpm_rom3:inst4|altsyncram:altsyncram_component|altrom:rom|q[1]~reg_ra4 ; selec:inst8|bo_xing[1] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.15 MHz ( period = 24.300 ns )                    ; lpm_rom3:inst4|altsyncram:altsyncram_component|altrom:rom|q[1]~reg_ra5 ; selec:inst8|bo_xing[1] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.15 MHz ( period = 24.300 ns )                    ; lpm_rom3:inst4|altsyncram:altsyncram_component|altrom:rom|q[1]~reg_ra6 ; selec:inst8|bo_xing[1] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.15 MHz ( period = 24.300 ns )                    ; lpm_rom3:inst4|altsyncram:altsyncram_component|altrom:rom|q[1]~reg_ra7 ; selec:inst8|bo_xing[1] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.67 MHz ( period = 24.000 ns )                    ; lpm_rom1:inst3|altsyncram:altsyncram_component|altrom:rom|q[2]~reg_ra0 ; selec:inst8|bo_xing[2] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.67 MHz ( period = 24.000 ns )                    ; lpm_rom1:inst3|altsyncram:altsyncram_component|altrom:rom|q[2]~reg_ra1 ; selec:inst8|bo_xing[2] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.67 MHz ( period = 24.000 ns )                    ; lpm_rom1:inst3|altsyncram:altsyncram_component|altrom:rom|q[2]~reg_ra2 ; selec:inst8|bo_xing[2] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.67 MHz ( period = 24.000 ns )                    ; lpm_rom1:inst3|altsyncram:altsyncram_component|altrom:rom|q[2]~reg_ra3 ; selec:inst8|bo_xing[2] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.67 MHz ( period = 24.000 ns )                    ; lpm_rom1:inst3|altsyncram:altsyncram_component|altrom:rom|q[2]~reg_ra4 ; selec:inst8|bo_xing[2] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.67 MHz ( period = 24.000 ns )                    ; lpm_rom1:inst3|altsyncram:altsyncram_component|altrom:rom|q[2]~reg_ra5 ; selec:inst8|bo_xing[2] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.67 MHz ( period = 24.000 ns )                    ; lpm_rom1:inst3|altsyncram:altsyncram_component|altrom:rom|q[2]~reg_ra6 ; selec:inst8|bo_xing[2] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;
; N/A                                     ; 41.67 MHz ( period = 24.000 ns )                    ; lpm_rom1:inst3|altsyncram:altsyncram_component|altrom:rom|q[2]~reg_ra7 ; selec:inst8|bo_xing[2] ; clk        ; clk      ; None                        ; None                      ; 20.400 ns               ;

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