dds.fit.eqn

文件夹里面有两个文件

K3_q[2]_write_address = WR_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K3_q[2]_read_address = RD_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K3_q[2] = MEMORY_SEGMENT(, , K3_q[2]_clock_0, , , , , , K3_q[2]_write_address, K3_q[2]_read_address);


--H1L23 is selec:inst8|bo_xing~66 at LC4_B19
--operation mode is normal

H1L23 = bo_select[1] & (bo_select[0]) # !bo_select[1] & (bo_select[0] & K2_q[2] # !bo_select[0] & (K3_q[2]));

--H1L31 is selec:inst8|bo_xing~85 at LC4_B19
--operation mode is normal

H1L31 = bo_select[1] & (bo_select[0]) # !bo_select[1] & (bo_select[0] & K2_q[2] # !bo_select[0] & (K3_q[2]));


--K2_q[1] is lpm_rom1:inst3|altsyncram:altsyncram_component|altrom:rom|q[1] at EC7_C
K2_q[1]_clock_0 = clk;
K2_q[1]_write_address = WR_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K2_q[1]_read_address = RD_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K2_q[1] = MEMORY_SEGMENT(, , K2_q[1]_clock_0, , , , , , K2_q[1]_write_address, K2_q[1]_read_address);


--K1_q[1] is lpm_rom3:inst4|altsyncram:altsyncram_component|altrom:rom|q[1] at EC1_C
K1_q[1]_clock_0 = clk;
K1_q[1]_write_address = WR_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K1_q[1]_read_address = RD_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K1_q[1] = MEMORY_SEGMENT(, , K1_q[1]_clock_0, , , , , , K1_q[1]_write_address, K1_q[1]_read_address);


--K3_q[1] is lpm_rom0:inst|altsyncram:altsyncram_component|altrom:rom|q[1] at EC4_C
K3_q[1]_clock_0 = clk;
K3_q[1]_write_address = WR_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K3_q[1]_read_address = RD_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K3_q[1] = MEMORY_SEGMENT(, , K3_q[1]_clock_0, , , , , , K3_q[1]_write_address, K3_q[1]_read_address);


--H1L24 is selec:inst8|bo_xing~68 at LC2_C21
--operation mode is normal

H1L24 = bo_select[0] & (bo_select[1]) # !bo_select[0] & (bo_select[1] & K1_q[1] # !bo_select[1] & (K3_q[1]));

--H1L32 is selec:inst8|bo_xing~86 at LC2_C21
--operation mode is normal

H1L32 = bo_select[0] & (bo_select[1]) # !bo_select[0] & (bo_select[1] & K1_q[1] # !bo_select[1] & (K3_q[1]));


--K1_q[0] is lpm_rom3:inst4|altsyncram:altsyncram_component|altrom:rom|q[0] at EC8_C
K1_q[0]_clock_0 = clk;
K1_q[0]_write_address = WR_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K1_q[0]_read_address = RD_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K1_q[0] = MEMORY_SEGMENT(, , K1_q[0]_clock_0, , , , , , K1_q[0]_write_address, K1_q[0]_read_address);


--K2_q[0] is lpm_rom1:inst3|altsyncram:altsyncram_component|altrom:rom|q[0] at EC1_A
K2_q[0]_clock_0 = clk;
K2_q[0]_write_address = WR_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K2_q[0]_read_address = RD_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K2_q[0] = MEMORY_SEGMENT(, , K2_q[0]_clock_0, , , , , , K2_q[0]_write_address, K2_q[0]_read_address);


--K3_q[0] is lpm_rom0:inst|altsyncram:altsyncram_component|altrom:rom|q[0] at EC4_A
K3_q[0]_clock_0 = clk;
K3_q[0]_write_address = WR_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K3_q[0]_read_address = RD_ADDR(C1_address[0], C1_address[1], C1_address[2], C1_address[3], C1_address[4], C1_address[5], C1_address[6], C1_address[7]);
K3_q[0] = MEMORY_SEGMENT(, , K3_q[0]_clock_0, , , , , , K3_q[0]_write_address, K3_q[0]_read_address);


--H1L25 is selec:inst8|bo_xing~70 at LC3_C21
--operation mode is normal

H1L25 = bo_select[1] & (bo_select[0]) # !bo_select[1] & (bo_select[0] & K2_q[0] # !bo_select[0] & (K3_q[0]));

--H1L33 is selec:inst8|bo_xing~87 at LC3_C21
--operation mode is normal

H1L33 = bo_select[1] & (bo_select[0]) # !bo_select[1] & (bo_select[0] & K2_q[0] # !bo_select[0] & (K3_q[0]));


--A1L42 is rtl~20 at LC2_C12
--operation mode is normal

A1L42 = row[0] & row[1] & row[2] & row[3];

--A1L43 is rtl~21 at LC2_C12
--operation mode is normal

A1L43 = row[0] & row[1] & row[2] & row[3];


--G1L1 is kbscan:inst6|add~14 at LC2_C7
--operation mode is normal

G1L1 = G1_cnt[0] $ G1_cnt[1];

--G1L2 is kbscan:inst6|add~16 at LC2_C7
--operation mode is normal

G1L2 = G1_cnt[0] $ G1_cnt[1];


--G1L18 is kbscan:inst6|Mux~664 at LC5_C2
--operation mode is normal

G1L18 = row[0] & row[1] & (row[2] # G1L1);

--G1L26 is kbscan:inst6|Mux~672 at LC5_C2
--operation mode is normal

G1L26 = row[0] & row[1] & (row[2] # G1L1);


--G1L19 is kbscan:inst6|Mux~665 at LC2_C2
--operation mode is normal

G1L19 = G1L18 # G1_cnt[0] & G1_cnt[1] & row[0];

--G1L27 is kbscan:inst6|Mux~673 at LC2_C2
--operation mode is normal

G1L27 = G1L18 # G1_cnt[0] & G1_cnt[1] & row[0];


--G1L20 is kbscan:inst6|Mux~666 at LC6_C2
--operation mode is normal

G1L20 = G1_cnt[1] & (G1_cnt[0]) # !G1_cnt[1] & (!row[2] & !G1_cnt[0] # !row[1]);

--G1L28 is kbscan:inst6|Mux~674 at LC6_C2
--operation mode is normal

G1L28 = G1_cnt[1] & (G1_cnt[0]) # !G1_cnt[1] & (!row[2] & !G1_cnt[0] # !row[1]);


--G1L21 is kbscan:inst6|Mux~667 at LC3_C2
--operation mode is normal

G1L21 = G1_cnt[1] & row[0] & (row[2] # G1L20) # !G1_cnt[1] & (G1L20);

--G1L29 is kbscan:inst6|Mux~675 at LC3_C2
--operation mode is normal

G1L29 = G1_cnt[1] & row[0] & (row[2] # G1L20) # !G1_cnt[1] & (G1L20);


--G1L22 is kbscan:inst6|Mux~668 at LC7_C2
--operation mode is normal

G1L22 = G1_cnt[0] & (!row[2]) # !G1_cnt[0] & !row[0] # !row[1];

--G1L30 is kbscan:inst6|Mux~676 at LC7_C2
--operation mode is normal

G1L30 = G1_cnt[0] & (!row[2]) # !G1_cnt[0] & !row[0] # !row[1];


--G1L23 is kbscan:inst6|Mux~669 at LC8_C2
--operation mode is normal

G1L23 = G1_cnt[0] & row[2] # !G1_cnt[0] & (row[0]);

--G1L31 is kbscan:inst6|Mux~677 at LC8_C2
--operation mode is normal

G1L31 = G1_cnt[0] & row[2] # !G1_cnt[0] & (row[0]);


--G1L24 is kbscan:inst6|Mux~670 at LC4_C2
--operation mode is normal

G1L24 = G1_cnt[1] & G1L22 # !G1_cnt[1] & (row[1] & G1L23);

--G1L32 is kbscan:inst6|Mux~678 at LC4_C2
--operation mode is normal

G1L32 = G1_cnt[1] & G1L22 # !G1_cnt[1] & (row[1] & G1L23);


--G1L25 is kbscan:inst6|Mux~671 at LC1_C2
--operation mode is normal

G1L25 = G1_cnt[0] $ (!row[2] # !row[0]);

--G1L33 is kbscan:inst6|Mux~679 at LC1_C2
--operation mode is normal

G1L33 = G1_cnt[0] $ (!row[2] # !row[0]);


--C1_address[0] is pin:inst1|address[0] at LC2_A10
--operation mode is normal

C1_address[0]_lut_out = P2_cs_buffer[0];
C1_address[0] = DFFEA(C1_address[0]_lut_out, clk, , , , , );

--C1L3Q is pin:inst1|address[0]~30 at LC2_A10
--operation mode is normal

C1L3Q = C1_address[0];


--C1_address[1] is pin:inst1|address[1] at LC1_A2
--operation mode is normal

C1_address[1]_lut_out = P2_cs_buffer[1];
C1_address[1] = DFFEA(C1_address[1]_lut_out, clk, , , , , );

--C1L5Q is pin:inst1|address[1]~31 at LC1_A2
--operation mode is normal

C1L5Q = C1_address[1];


--C1_address[2] is pin:inst1|address[2] at LC1_C17
--operation mode is normal

C1_address[2]_lut_out = P2_cs_buffer[2];
C1_address[2] = DFFEA(C1_address[2]_lut_out, clk, , , , , );

--C1L7Q is pin:inst1|address[2]~32 at LC1_C17
--operation mode is normal

C1L7Q = C1_address[2];


--C1_address[3] is pin:inst1|address[3] at LC1_C8
--operation mode is normal

C1_address[3]_lut_out = P2_cs_buffer[3];
C1_address[3] = DFFEA(C1_address[3]_lut_out, clk, , , , , );

--C1L9Q is pin:inst1|address[3]~33 at LC1_C8
--operation mode is normal

C1L9Q = C1_address[3];


--C1_address[4] is pin:inst1|address[4] at LC4_C17
--operation mode is normal

C1_address[4]_lut_out = P2_cs_buffer[4];
C1_address[4] = DFFEA(C1_address[4]_lut_out, clk, , , , , );

--C1L11Q is pin:inst1|address[4]~34 at LC4_C17
--operation mode is normal

C1L11Q = C1_address[4];


--C1_address[5] is pin:inst1|address[5] at LC1_C9
--operation mode is normal

C1_address[5]_lut_out = P2_cs_buffer[5];
C1_address[5] = DFFEA(C1_address[5]_lut_out, clk, , , , , );

--C1L13Q is pin:inst1|address[5]~35 at LC1_C9
--operation mode is normal

C1L13Q = C1_address[5];


--C1_address[6] is pin:inst1|address[6] at LC4_A15
--operation mode is normal

C1_address[6]_lut_out = P2_cs_buffer[6];
C1_address[6] = DFFEA(C1_address[6]_lut_out, clk, , , , , );

--C1L15Q is pin:inst1|address[6]~36 at LC4_A15
--operation mode is normal

C1L15Q = C1_address[6];


--C1_address[7] is pin:inst1|address[7] at LC6_C17
--operation mode is normal

C1_address[7]_lut_out = M1_unreg_res_node[7];
C1_address[7] = DFFEA(C1_address[7]_lut_out, clk, , , , , );

--C1L17Q is pin:inst1|address[7]~37 at LC6_C17
--operation mode is normal

C1L17Q = C1_address[7];


--P2_cs_buffer[0] is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[0] at LC1_C15
--operation mode is arithmetic

P2_cs_buffer[0] = C1_address[0] $ D1_freq_out[0];

--P2L11 is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~136 at LC1_C15
--operation mode is arithmetic

P2L11 = C1_address[0] $ D1_freq_out[0];

--P2_cout[0] is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[0] at LC1_C15
--operation mode is arithmetic

P2_cout[0] = CARRY(C1_address[0] & D1_freq_out[0]);


--P2_cs_buffer[1] is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC2_C15
--operation mode is arithmetic

P2_cs_buffer[1] = D1_freq_out[1] $ C1_address[1] $ P2_cout[0];

--P2L13 is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~137 at LC2_C15
--operation mode is arithmetic

P2L13 = D1_freq_out[1] $ C1_address[1] $ P2_cout[0];

--P2_cout[1] is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[1] at LC2_C15
--operation mode is arithmetic

P2_cout[1] = CARRY(D1_freq_out[1] & (C1_address[1] # P2_cout[0]) # !D1_freq_out[1] & C1_address[1] & P2_cout[0]);


--P2_cs_buffer[2] is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC3_C15
--operation mode is arithmetic

P2_cs_buffer[2] = D1_freq_out[2] $ C1_address[2] $ P2_cout[1];

--P2L15 is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~138 at LC3_C15
--operation mode is arithmetic

P2L15 = D1_freq_out[2] $ C1_address[2] $ P2_cout[1];

--P2_cout[2] is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2] at LC3_C15
--operation mode is arithmetic

P2_cout[2] = CARRY(D1_freq_out[2] & (C1_address[2] # P2_cout[1]) # !D1_freq_out[2] & C1_address[2] & P2_cout[1]);


--P2_cs_buffer[3] is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC4_C15
--operation mode is arithmetic

P2_cs_buffer[3] = D1_freq_out[3] $ C1_address[3] $ P2_cout[2];

--P2L17 is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~139 at LC4_C15
--operation mode is arithmetic

P2L17 = D1_freq_out[3] $ C1_address[3] $ P2_cout[2];

--P2_cout[3] is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] at LC4_C15
--operation mode is arithmetic

P2_cout[3] = CARRY(D1_freq_out[3] & (C1_address[3] # P2_cout[2]) # !D1_freq_out[3] & C1_address[3] & P2_cout[2]);


--P2_cs_buffer[4] is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC5_C15
--operation mode is arithmetic

P2_cs_buffer[4] = D1_freq_out[4] $ C1_address[4] $ P2_cout[3];

--P2L19 is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~140 at LC5_C15
--operation mode is arithmetic

P2L19 = D1_freq_out[4] $ C1_address[4] $ P2_cout[3];

--P2_cout[4] is pin:inst1|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] at LC5_C15
--operation mode is arithmetic

P2_cout[4] = CARRY(D1_freq_out[4] & (C1_address[4] # P2_cout[3]) # !D1_freq_out[4] & C1_address[4] & P2_cout[3]);