nec--iic0.txt

NEC--IIC0试验程序

(原创)NEC--24C02硬件IIC0驱动 
phton 发表于 2007-5-11 13:34:00 

/*24c02.h*/
/**
IIC control register 0 (IICC0)
IIC flag register 0 (IICF0)
IIC status register 0 (IICS0)
IIC clock selection register 0 (IICCL0)
IIC function expansion register 0 (IICX0)
Port mode register 6 (PM6)
Port register 6 (P6)
Address: FFA6H After reset: 00H R/W
Symbol <7>  <6> <5>   <4>     <3>    <2>   <1>   <0>
IICC0 IICE0 LREL0 WREL0 SPIE0 WTIM0 ACKE0 STT0 SPT0
Address: FFABH After reset: 00H R/WNote
Symbol  <7>  <6>  <5>  <4>  <3>  <2>    <1>  <0>
IICF0  STCF   0    0    0    0  IICBSY STCEN IICRSV
Address: FFAAH After reset: 00H R
Symbol  <7>  <6> <5>  <4>  <3> <2>  <1> <0>
IICS0  MSTS0 ALD0 EXC0 COI0 TRC0 ACKD0 STD0 SPD0
**/
#ifndef   24CXX_H
#define   24CXX_H
void IIC0_Init(void);
uint8 IIC0_CheckACK(void);
uint8 eeprom_read_string( uint8 addr,uint8 len ,uint8 *buffer);
uint8 eeprom_read_byte(unsigned addr,uint8 data);
uint8 eeprom_write_page(uint8 addr,uint8 *buffer);
uint16 eeprom_write_string( uint16 addr,uint16 len ,uint8 *buffer);
void Clock_Init(void);
void systeminit(void);
#endif

 
 
 
/*24c02.c*/
#pragma sfr
#pragma di
#pragma ei
#pragma NOP
＃i nclude "24CXX.h"
#define ok      0x0
#define no_ack       0x9
#define ClrIORBit(Reg, ClrBitMap) Reg &= ~ClrBitMap
#define SetIORBit(Reg, SetBitMap) Reg |= SetBitMap
#define MEMORY_IMS_SET     0xCC
#define MEMORY_IXS_SET     0x00

typedef unsigned char uint8
typedef unsigned int  uint16
#define IIC_WAIT   100
#define eeprom_read_addr   0xA0
#define eeprom_write_addr  0xA1
#define eeprom_page     256 //256 byte every page
#define eeprom_pagesize  1 //24c02 only 1 page,but 24c64 maybe 32 pages

#define   IIC0_Stop      {SPT0=1;}
#define  IIC0_Start     {IICE0 = 1;STT0=1;}
#define  IIC0_AckStop    {ACKE0=0;}
#define  IIC0_CheckAck    {while( (IICS0 & 0x40) && (IIC_WAIT--) ); \
                if(0 == IIC_WAIT) return no_ack;}

void IIC0_Init(void)
{ 
 IICE0 = 0;//stop IIC0 Transfer
 PM6.0 = 0, P6.0 = 0;
 PM6.1 = 0, P6.1 = 0; 
 SetIORBit(IICF0, 0x02); // start-condition doesn't need stop-condition 
 SetIORBit(IICF0, 0x01); // comunication reserve - disable 
 SetIORBit(IICC0, 0x10); // stop-condition interrupt - enable 
 ClrIORBit(IICC0, 0x08); // interrupt control - 8 clock falling edge 
 // transfer clock  fprs/88 
 ClrIORBit(IICCL0, 0x08);  // normal mode 
 ClrIORBit(IICCL0, 0x3);  // CL00 = 0 CL01 = 0  
 ClrIORBit(IICX0, 0x1);   // disable extension    
 SetIORBit(PR1H, 0x1);   //interrupt priority low
 ClrIORBit(MK1H, 0x1);   //enable interrupt
}

uint8 eeprom_read_string( uint8 addr,uint8 len ,uint8 *buffer)
{
 uint8 i; 
    
 IIC0_Start;     
 IIC0 = eeprom_write_addr; 
 IIC0_CheckAck;
 
 IIC0 = (uint8)((addr>>8) & 0x00ff);
 IIC0_CheckAck; 
 IIC0 = (uint8)(addr & 0x00ff);
 IIC0_CheckAck;
    
 IIC0_Start;     
 IIC0 = eeprom_read_addr;
 IIC0_CheckAck;
 
 ACKE0 = 1;   //enable ack
 for (i = 0; i < len; i++)
 {  
  WREL0 = 1; // write WREL0 = 1 OR IIC0 = 0xff for send 9 clock   
  while((IICIF0 == 1)&& (wait--));//while( !((IICS0 | 0xF7) == 0xF7)); //  is receive status
  *buffer++ = IIC0;
 }
 
 IIC0_AckStop;
  IIC0_Stop;
  return ok;
}

uint8 eeprom_write_byte(uint16 addr,uint8 data)
{  
  IIC0_Start;     
 WTIM0 = 1;//INT request is generated at the ninth clock's falling edge
 
  IIC0 = eeprom_write_addr; 
 IIC0_CheckAck;
 
 IIC0 = (uint8)((addr>>8) & 0x00ff);
 IIC0_CheckAck; 
 IIC0 = (uint8)(addr & 0x00ff);
  IIC0_CheckAck;
 
 IIC0 = data;
 IIC0_CheckAck;
 
  IIC0_Stop; 
 return ok;
}

uint8 eeprom_write_page(uint8 addr,uint8 *buffer)
{
 uint8 i;  
 IIC0_Start; 
 
 IIC0 = eeprom_write_addr; 
 IIC0_CheckAck;
 
 IIC0 = (uint8)((addr>>8) & 0x00ff);
 IIC0_CheckAck; 
 IIC0 = (uint8)(addr & 0x00ff);
  IIC0_CheckAck;  
 for( i = 0; i < eeprom_pagesize; i++)
 {
   while(buffer)
   {
    IIC0 = *buffer++;
    IIC0_CheckAck;
   }   
 } 
  IIC0_Stop;
 return ok;
}


uint16 eeprom_write_string( uint16 addr,uint16 len ,uint8 *buffer)
{
 uint16 i;  
 IIC0_Start; 
 
 IIC0 = eeprom_write_addr; 
 IIC0_CheckAck;
 
 IIC0 = (uint8)((addr>>8) & 0x00ff);
 IIC0_CheckAck; 
 IIC0 = (uint8)(addr & 0x00ff);
 IIC0_CheckAck;
 
 IIC0_Start;    
 //IIC0 = eeprom_read_addr;
 //IIC0_CheckAck; 
 
 for (i = 0; i < len; i++)
 {  
  //WREL0 = 1; // start receive ,WREL0 = 1 OR IIC0 = 0xff for send 9 clock )   
  IIC0 = *buffer++;
  IIC0_CheckAck;
 }  
  IIC0_Stop;
  return ok;
 
} 
void Clock_Init(void)
{  
 SetIORBit(MCM, 0x03);  
 ClrIORBit(OSCCTL, 0x10);
 SetIORBit(MOC, 0x80);  
 PCC = 0
}
void systeminit(void)
{
  Clock_Init();
  IIC0_Init();
}
void mian()
{
 const uint16 start_addr = 0x00;
 const uint16 end_addr = 0xff;
 uint16 temp,addr,data;
 DI();
 systeminit();
 EI();
 while(1)
 {
  for(temp = start_addr;temp < end_addr; temp++)
  {
   addr = temp;
   data = temp;
   eeprom_write_byte(addr,data);
  }
  addr = 0x00;  
  while(addr++ < end_addr)
  {
   //eeprom_read_string(addr,0xff ,*buffer[ff]);
  }
 }
}