speed.h

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/*
 * (C) Copyright 2001-2002
 * Wolfgang Denk, DENX Software Engineering, [e-mail].
 *
 * (C) Copyright 2002
 * David Mueller, ELSOFT AG, [e-mail]
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/* This code should work for both the S3C2400 and the S3C2410
 * as they seem to have the same PLL and clock machinery inside.
 * The different address mapping is handled by the s3c24xx.h files below.
 */
 
#include "s3c2410.h"

#define CONFIG_PLL_INPUT_FREQ	12000000 /* SMDK2400 has 12 MHz input clock */
#define MPLL 0
#define UPLL 1

/* ------------------------------------------------------------------------- */
/* NOTE: This describes the proper use of this file.
 *
 * CONFIG_PLL_INPUT_FREQ should be defined as the input frequency of the PLL.
 *
 * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of 
 * the specified bus in HZ.
 */
/* ------------------------------------------------------------------------- */

unsigned long get_PLLCLK(int pllreg)
{
    unsigned long r, m, p, s;

    if (pllreg == MPLL)
	r = rMPLLCON;
    else if (pllreg == UPLL)
	r = rUPLLCON;
 //   else
 //	hang();
	
    m = ((r & 0xFF000) >> 12) + 8;
    p = ((r & 0x003F0) >> 4) + 2;
    s = r & 0x3;
    
    return((CONFIG_PLL_INPUT_FREQ * m) / (p << s));
}
 
/* return FCLK frequency */
unsigned long get_FCLK(void)
{
    return(get_PLLCLK(MPLL));    
}

/* return HCLK frequency */
unsigned long get_HCLK(void)
{
    unsigned long clkdiv = rCLKDIVN;
    
    return((clkdiv & 0x2) ? get_FCLK()/2 : get_FCLK());
}

/* return PCLK frequency */
unsigned long get_PCLK(void)
{
    unsigned long clkdiv = rCLKDIVN;
    
    return((clkdiv & 0x1) ? get_HCLK()/2 : get_HCLK());    
}

/* return UCLK frequency */
unsigned long get_UCLK(void)
{
    return(get_PLLCLK(UPLL));    
}