reg_m55800.h

AN-1155.zip ucos在AT91M5800上的一直 编译器为IAR

//*-----------------------------------------------------------------------------
//*      ATMEL Microcontroller Software Support  -  ROUSSET  -
//*-----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*-----------------------------------------------------------------------------
//* File Name           : reg_m55800.h
//* Object              : AT91M55800 Registers Definition File
//*
//* 1.0 11/07/00  PFi   : Creation
//* 2.0 10/12/01  PFi   : Data Pointer/Counter Registers has been removed.
//*                     : The RevA of the M558000 does not features DAC PDC.
//*-----------------------------------------------------------------------------

#ifndef reg_m55800_h
#define reg_m55800_h

#include    <m55800.h>

/*----------------------------------*/
/* External Bus Interface Registers */
/*----------------------------------*/

#define EBI_CSR0        (EBI_BASE->EBI_CSR[0])
#define EBI_CSR1        (EBI_BASE->EBI_CSR[1])
#define EBI_CSR2        (EBI_BASE->EBI_CSR[2])
#define EBI_CSR3        (EBI_BASE->EBI_CSR[3])
#define EBI_CSR4        (EBI_BASE->EBI_CSR[4])
#define EBI_CSR5        (EBI_BASE->EBI_CSR[5])
#define EBI_CSR6        (EBI_BASE->EBI_CSR[6])
#define EBI_CSR7        (EBI_BASE->EBI_CSR[7])
#define EBI_RCR         (EBI_BASE->EBI_RCR)
#define EBI_MCR         (EBI_BASE->EBI_MCR)

/*------------------------------------------------*/
/* Advanced Power Management Controller Registers */
/*------------------------------------------------*/

#define APMC_SCER       (APMC_BASE->APMC_SCER)
#define APMC_SCDR       (APMC_BASE->APMC_SCDR)
#define APMC_SCSR       (APMC_BASE->APMC_SCSR)
#define APMC_PCER       (APMC_BASE->APMC_PCER)
#define APMC_PCDR       (APMC_BASE->APMC_PCDR)
#define APMC_PCSR       (APMC_BASE->APMC_PCSR)
#define APMC_CGMR       (APMC_BASE->APMC_CGMR)
#define APMC_PCR        (APMC_BASE->APMC_PCR)
#define APMC_PMR        (APMC_BASE->APMC_PMR)
#define APMC_SR         (APMC_BASE->APMC_SR)
#define APMC_IER        (APMC_BASE->APMC_IER)
#define APMC_IDR        (APMC_BASE->APMC_IDR)
#define APMC_IMR        (APMC_BASE->APMC_IMR)


/*-----------------------------------------*/
/* Advanced Interrupt Controller Registers */
/*-----------------------------------------*/

#define AIC_SMR0        (AIC_BASE->AIC_SMR[0])
#define AIC_SMR1        (AIC_BASE->AIC_SMR[1])
#define AIC_SMR2        (AIC_BASE->AIC_SMR[2])
#define AIC_SMR3        (AIC_BASE->AIC_SMR[3])
#define AIC_SMR4        (AIC_BASE->AIC_SMR[4])
#define AIC_SMR5        (AIC_BASE->AIC_SMR[5])
#define AIC_SMR6        (AIC_BASE->AIC_SMR[6])
#define AIC_SMR7        (AIC_BASE->AIC_SMR[7])
#define AIC_SMR8        (AIC_BASE->AIC_SMR[8])
#define AIC_SMR9        (AIC_BASE->AIC_SMR[9])
#define AIC_SMR10       (AIC_BASE->AIC_SMR[10])
#define AIC_SMR11       (AIC_BASE->AIC_SMR[11])
#define AIC_SMR12       (AIC_BASE->AIC_SMR[12])
#define AIC_SMR13       (AIC_BASE->AIC_SMR[13])
#define AIC_SMR14       (AIC_BASE->AIC_SMR[14])
#define AIC_SMR15       (AIC_BASE->AIC_SMR[15])
#define AIC_SMR16       (AIC_BASE->AIC_SMR[16])
#define AIC_SMR17       (AIC_BASE->AIC_SMR[17])
#define AIC_SMR18       (AIC_BASE->AIC_SMR[18])
#define AIC_SMR19       (AIC_BASE->AIC_SMR[19])
#define AIC_SMR20       (AIC_BASE->AIC_SMR[20])
#define AIC_SMR21       (AIC_BASE->AIC_SMR[21])
#define AIC_SMR22       (AIC_BASE->AIC_SMR[22])
#define AIC_SMR23       (AIC_BASE->AIC_SMR[23])
#define AIC_SMR24       (AIC_BASE->AIC_SMR[24])
#define AIC_SMR25       (AIC_BASE->AIC_SMR[25])
#define AIC_SMR26       (AIC_BASE->AIC_SMR[26])
#define AIC_SMR27       (AIC_BASE->AIC_SMR[27])
#define AIC_SMR28       (AIC_BASE->AIC_SMR[28])
#define AIC_SMR29       (AIC_BASE->AIC_SMR[29])
#define AIC_SMR30       (AIC_BASE->AIC_SMR[30])
#define AIC_SMR31       (AIC_BASE->AIC_SMR[31])

#define AIC_SVR0        (AIC_BASE->AIC_SVR[0])
#define AIC_SVR1        (AIC_BASE->AIC_SVR[1])
#define AIC_SVR2        (AIC_BASE->AIC_SVR[2])
#define AIC_SVR3        (AIC_BASE->AIC_SVR[3])
#define AIC_SVR4        (AIC_BASE->AIC_SVR[4])
#define AIC_SVR5        (AIC_BASE->AIC_SVR[5])
#define AIC_SVR6        (AIC_BASE->AIC_SVR[6])
#define AIC_SVR7        (AIC_BASE->AIC_SVR[7])
#define AIC_SVR8        (AIC_BASE->AIC_SVR[8])
#define AIC_SVR9        (AIC_BASE->AIC_SVR[9])
#define AIC_SVR10       (AIC_BASE->AIC_SVR[10])
#define AIC_SVR11       (AIC_BASE->AIC_SVR[11])
#define AIC_SVR12       (AIC_BASE->AIC_SVR[12])
#define AIC_SVR13       (AIC_BASE->AIC_SVR[13])
#define AIC_SVR14       (AIC_BASE->AIC_SVR[14])
#define AIC_SVR15       (AIC_BASE->AIC_SVR[15])
#define AIC_SVR16       (AIC_BASE->AIC_SVR[16])
#define AIC_SVR17       (AIC_BASE->AIC_SVR[17])
#define AIC_SVR18       (AIC_BASE->AIC_SVR[18])
#define AIC_SVR19       (AIC_BASE->AIC_SVR[19])
#define AIC_SVR20       (AIC_BASE->AIC_SVR[20])
#define AIC_SVR21       (AIC_BASE->AIC_SVR[21])
#define AIC_SVR22       (AIC_BASE->AIC_SVR[22])
#define AIC_SVR23       (AIC_BASE->AIC_SVR[23])
#define AIC_SVR24       (AIC_BASE->AIC_SVR[24])
#define AIC_SVR25       (AIC_BASE->AIC_SVR[25])
#define AIC_SVR26       (AIC_BASE->AIC_SVR[26])
#define AIC_SVR27       (AIC_BASE->AIC_SVR[27])
#define AIC_SVR28       (AIC_BASE->AIC_SVR[28])
#define AIC_SVR29       (AIC_BASE->AIC_SVR[29])
#define AIC_SVR30       (AIC_BASE->AIC_SVR[30])
#define AIC_SVR31       (AIC_BASE->AIC_SVR[31])


#define AIC_IVR         (AIC_BASE->AIC_IVR)
#define AIC_FVR         (AIC_BASE->AIC_FVR)
#define AIC_ISR         (AIC_BASE->AIC_ISR)
#define AIC_IPR         (AIC_BASE->AIC_IPR)
#define AIC_IMR         (AIC_BASE->AIC_IMR)
#define AIC_CISR        (AIC_BASE->AIC_CISR)
#define AIC_IECR        (AIC_BASE->AIC_IECR)
#define AIC_IDCR        (AIC_BASE->AIC_IDCR)
#define AIC_ICCR        (AIC_BASE->AIC_ICCR)
#define AIC_ISCR        (AIC_BASE->AIC_ISCR)
#define AIC_EOICR       (AIC_BASE->AIC_EOICR)
#define AIC_SPU         (AIC_BASE->AIC_SPU)


/*----------------------------------*/
/* Parallel IO Controller Registers */
/*----------------------------------*/
/* PIOA */
#define PIOA_PER     (PIOA_BASE->PIO_PER)
#define PIOA_PDR     (PIOA_BASE->PIO_PDR)
#define PIOA_PSR     (PIOA_BASE->PIO_PSR)

#define PIOA_OER     (PIOA_BASE->PIO_OER)
#define PIOA_ODR     (PIOA_BASE->PIO_ODR)
#define PIOA_OSR     (PIOA_BASE->PIO_OSR)

#define PIOA_IFER    (PIOA_BASE->PIO_IFER)
#define PIOA_IFDR    (PIOA_BASE->PIO_IFDR)
#define PIOA_IFSR    (PIOA_BASE->PIO_IFSR)

#define PIOA_SODR    (PIOA_BASE->PIO_SODR)
#define PIOA_CODR    (PIOA_BASE->PIO_CODR)
#define PIOA_ODSR    (PIOA_BASE->PIO_ODSR)
#define PIOA_PDSR    (PIOA_BASE->PIO_PDSR)

#define PIOA_IER     (PIOA_BASE->PIO_IER)
#define PIOA_IDR     (PIOA_BASE->PIO_IDR)
#define PIOA_IMR     (PIOA_BASE->PIO_IMR)
#define PIOA_ISR     (PIOA_BASE->PIO_ISR)

#define PIOA_MDER    (PIOA_BASE->PIO_MDER)
#define PIOA_MDDR    (PIOA_BASE->PIO_MDDR)
#define PIOA_MDSR    (PIOA_BASE->PIO_MDSR)

/* PIOB */
#define PIOB_PER     (PIOB_BASE->PIO_PER)
#define PIOB_PDR     (PIOB_BASE->PIO_PDR)
#define PIOB_PSR     (PIOB_BASE->PIO_PSR)

#define PIOB_OER     (PIOB_BASE->PIO_OER)
#define PIOB_ODR     (PIOB_BASE->PIO_ODR)
#define PIOB_OSR     (PIOB_BASE->PIO_OSR)

#define PIOB_IFER    (PIOB_BASE->PIO_IFER)
#define PIOB_IFDR    (PIOB_BASE->PIO_IFDR)
#define PIOB_IFSR    (PIOB_BASE->PIO_IFSR)

#define PIOB_SODR    (PIOB_BASE->PIO_SODR)
#define PIOB_CODR    (PIOB_BASE->PIO_CODR)
#define PIOB_ODSR    (PIOB_BASE->PIO_ODSR)
#define PIOB_PDSR    (PIOB_BASE->PIO_PDSR)

#define PIOB_IER     (PIOB_BASE->PIO_IER)
#define PIOB_IDR     (PIOB_BASE->PIO_IDR)
#define PIOB_IMR     (PIOB_BASE->PIO_IMR)
#define PIOB_ISR     (PIOB_BASE->PIO_ISR)

#define PIOB_MDER    (PIOB_BASE->PIO_MDER)
#define PIOB_MDDR    (PIOB_BASE->PIO_MDDR)
#define PIOB_MDSR    (PIOB_BASE->PIO_MDSR)


/*-------------------------------*/
/* USART 0, 1 and 2 Registers    */
/*-------------------------------*/

#define US0_CR      (USART0_BASE->US_CR)
#define US1_CR      (USART1_BASE->US_CR)
#define US2_CR      (USART2_BASE->US_CR)

#define US0_MR      (USART0_BASE->US_MR)
#define US1_MR      (USART1_BASE->US_MR)
#define US2_MR      (USART2_BASE->US_MR)

#define US0_IER     (USART0_BASE->US_IER)
#define US1_IER     (USART1_BASE->US_IER)
#define US2_IER     (USART2_BASE->US_IER)

#define US0_IDR     (USART0_BASE->US_IDR)
#define US1_IDR     (USART1_BASE->US_IDR)
#define US2_IDR     (USART2_BASE->US_IDR)

#define US0_IMR     (USART0_BASE->US_IMR)
#define US1_IMR     (USART1_BASE->US_IMR)
#define US2_IMR     (USART2_BASE->US_IMR)

#define US0_CSR     (USART0_BASE->US_CSR)
#define US1_CSR     (USART1_BASE->US_CSR)
#define US2_CSR     (USART2_BASE->US_CSR)

#define US0_RHR     (USART0_BASE->US_RHR)
#define US1_RHR     (USART1_BASE->US_RHR)
#define US2_RHR     (USART2_BASE->US_RHR)

#define US0_THR     (USART0_BASE->US_THR)
#define US1_THR     (USART1_BASE->US_THR)
#define US2_THR     (USART2_BASE->US_THR)

#define US0_BRGR    (USART0_BASE->US_BRGR)
#define US1_BRGR    (USART1_BASE->US_BRGR)
#define US2_BRGR    (USART2_BASE->US_BRGR)