master1.lst

ADuC7020/26是ADI模拟公司开发的ARM7TDMI内核

ARM COMPILER V2.42,  master1                                                               09/01/06  14:43:44  PAGE 1   


ARM COMPILER V2.42, COMPILATION OF MODULE master1
OBJECT MODULE PLACED IN master1.OBJ
COMPILER INVOKED BY: C:\Keil\ARM\BIN\CA.exe master1.c THUMB DEBUG TABS(4) 

stmt  level    source

    1          /*********************************************************************
    2          
    3           Author        : ADI - Apps            www.analog.com/MicroConverter
    4          
    5           Date          : Dec. 2005
    6          
    7           File          : master1.c
    8          
    9           Hardware      : Applicable to ADuC702x rev H or I silicon
   10                           Currently targetting ADuC7026.
   11          
   12           Description   : SPI master to demonstrate with slave.c or slave1.c
   13                  
   14          *********************************************************************/
   15          
   16          
   17          #include<ADuC7026.h>
   18          
   19          void IRQ_Handler(void) __irq;           //  IRQ Funtion Prototype 
   20          int i = 0;
   21          
   22          int main(void) {
   23   1          GP4DAT = 0x04000000;            // P4.2 configured as an output. LED is turned on   
   24   1          IRQEN = SPI_MASTER_BIT;
   25   1          GP1CON = 0x22220000;                // configure SPI on SPM
   26   1          SPIDIV = 0xCC;                      // set SPI clock 40960000/(2x(1+SPIDIV))
   27   1                                              // 0xCC = 100kHz
   28   1          SPICON = 0x104B;                    // enable SPI master in continuous transfer mode 
   29   1                                              // slave select will stay low during the all transmission
   30   1      while (1){
   31   2          }               
   32   1      }
   33          
   34          
   35          /********************************************************************/
   36          /*                                                                  */
   37          /*      Interrupt Service Rountine                                  */
   38          /*                                                                  */
   39          /********************************************************************/
   40          
   41          void IRQ_Handler() __irq {
   42   1          GP4DAT ^= 0x00040000;       // Complement P4.2
   43   1          if ((IRQSTA & SPI_MASTER_BIT) != 0) {
   44   2              SPITX = i;
   45   2              i++;
   46   2              if (i==30) IRQCLR = SPI_MASTER_BIT;
   47   2          }
   48   1          return ;
   49   1      }
   50          
   51          
   52          
ARM COMPILER V2.42,  master1                                                               09/01/06  14:43:44  PAGE 2   

ASSEMBLY LISTING OF GENERATED OBJECT CODE



*** EXTERNALS:
 EXTERN NUMBER (__startup)



*** PUBLICS:
 PUBLIC         IRQ_Handler?A
 PUBLIC         main
 PUBLIC         i



*** DATA SEGMENT '?DT0?master1':
 00000000          i:
 00000000           BEGIN_INIT
 00000000  00000000  DD          0x0
 00000004           END_INIT



*** CODE SEGMENT '?PR?main?master1':
   22: int main(void) {
 00000000  B500      PUSH        {LR}
   23:     GP4DAT = 0x04000000;            // P4.2 configured as an output. LED is turned on   
 00000002  4800      LDR         R1,=0x4000000
 00000004  4800      LDR         R0,=0xFFFFF460
 00000006  6001      STR         R1,[R0,#0x0]
   24:     IRQEN = SPI_MASTER_BIT;
 00000008  4800      LDR         R1,=0x2000
 0000000A  4800      LDR         R0,=0xFFFF0008
 0000000C  6001      STR         R1,[R0,#0x0]
   25:     GP1CON = 0x22220000;                // configure SPI on SPM
 0000000E  4800      LDR         R1,=0x22220000
 00000010  4800      LDR         R0,=0xFFFFF404
 00000012  6001      STR         R1,[R0,#0x0]
   26:     SPIDIV = 0xCC;                      // set SPI clock 40960000/(2x(1+SPIDIV))
 00000014  21CC      MOV         R1,#0xCC
 00000016  4800      LDR         R0,=0xFFFF0A0C
 00000018  6001      STR         R1,[R0,#0x0]
   28:     SPICON = 0x104B;                    // enable SPI master in continuous transfer mode 
 0000001A  4800      LDR         R1,=0x104B
 0000001C  4800      LDR         R0,=0xFFFF0A10
 0000001E  6001      STR         R1,[R0,#0x0]
   31:     }                
 00000020          L_1:
 00000020  E7FE      B           L_1  ; T=0x00000020
   32: }
 00000022  BC08      POP         {R3}
 00000024  4718      BX          R3
 00000026          ENDP ; 'main'


*** CODE SEGMENT '?PR?IRQ_Handler?A?master1':
   41: void IRQ_Handler() __irq {
 00000000  E92D0007  STMDB       R13!,{R0-R2}
   42:     GP4DAT ^= 0x00040000;       // Complement P4.2
 00000004  E5100000  LDR         R0,=0xFFFFF460
 00000008  E5901000  LDR         R1,[R0,#0x0]
 0000000C  E2211701  EOR         R1,R1,#0x40000
 00000010  E5801000  STR         R1,[R0,#0x0]
   43:     if ((IRQSTA & SPI_MASTER_BIT) != 0) {
 00000014  E5100000  LDR         R0,=0xFFFF0000
 00000018  E5900000  LDR         R0,[R0,#0x0]
 0000001C  E3100A02  TST         R0,#0x2000
 00000020  0A00000E  BEQ         L_5  ; Targ=0x60
   44:         SPITX = i;
 00000024  E5100000  LDR         R0,=i ; i
 00000028  E5901000  LDR         R1,[R0,#0x0] ; i
 0000002C  E1A02001  MOV         R2,R1
 00000030  E5100000  LDR         R0,=0xFFFF0A08
 00000034  E5802000  STR         R2,[R0,#0x0]
ARM COMPILER V2.42,  master1                                                               09/01/06  14:43:44  PAGE 3   

   45:         i++;
 00000038  E5100000  LDR         R0,=i ; i
 0000003C  E2811001  ADD         R1,R1,#0x0001
 00000040  E5801000  STR         R1,[R0,#0x0] ; i
   46:         if (i==30) IRQCLR = SPI_MASTER_BIT;
 00000044  E5100000  LDR         R0,=i ; i
 00000048  E5900000  LDR         R0,[R0,#0x0] ; i
 0000004C  E350001E  CMP         R0,#0x001E
 00000050  1A000002  BNE         L_5  ; Targ=0x60
 00000054  E3A01A02  MOV         R1,#0x2000
 00000058  E5100000  LDR         R0,=0xFFFF000C
 0000005C  E5801000  STR         R1,[R0,#0x0]
   47:     }
 00000060          L_5:
   49: }
 00000060  E8BD0007  LDMIA       R13!,{R0-R2}
 00000064  E25EF004  SUBS        R15,R14,#0x0004
 00000068          ENDP ; 'IRQ_Handler?A'



Module Information          Static
----------------------------------
  code size            =    ------
  data size            =         4
  const size           =    ------
End of Module Information.


ARM COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)