master.lst

ADuC7020/26是ADI模拟公司开发的ARM7TDMI内核

ARM COMPILER V2.40c,  master                                                               07/12/05  12:15:24  PAGE 1   


ARM COMPILER V2.40c, COMPILATION OF MODULE master
OBJECT MODULE PLACED IN master.OBJ
COMPILER INVOKED BY: C:\Keil\ARM\BIN\CA.exe master.c THUMB DEBUG TABS(4) 

stmt  level    source

    1          /*********************************************************************
    2          
    3           Author        : ADI - Apps            www.analog.com/MicroConverter
    4          
    5           Date          : Dec. 2005
    6          
    7           File          : master.c
    8          
    9           Hardware      : Applicable to ADuC702x rev H or I silicon
   10                           Currently targetting ADuC7026.
   11          
   12           Description   : SPI master to demonstrate with slave.c or slave1.c
   13                  
   14          *********************************************************************/
   15          
   16          
   17          #include<ADuC7026.h>
   18          
   19          unsigned char results[30] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06,
   20              0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
   21              0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x20,
   22              0x21, 0x22, 0x23, 0x24};
   23          
   24          int main(void) {
   25   1          int i = 0;
   26   1      
   27   1          GP1CON = 0x22220000;                // configure SPI on SPM
   28   1          SPIDIV = 0xCC;                      // set SPI clock 40960000/(2x(1+SPIDIV))
   29   1                                              // 0xCC = 100kHz
   30   1          SPICON = 0x104B;                    // enable SPI master in continuous transfer mode 
   31   1                                              // slave select will stay low during the all transmission
   32   1          for (i=0;i<30;i++)
   33   1          {
   34   2              SPITX = results[i];               // transmit command or any dummy data
   35   2              while ((SPISTA & 0x02) != 0x02) ; // wait for data received status bit
   36   2          }   
   37   1      while (1){}
   38   1      }
ARM COMPILER V2.40c,  master                                                               07/12/05  12:15:24  PAGE 2   

ASSEMBLY LISTING OF GENERATED OBJECT CODE



*** EXTERNALS:
 EXTERN NUMBER (__startup)



*** PUBLICS:
 PUBLIC         main
 PUBLIC         results



*** DATA SEGMENT '?DT0?master':
 00000000          results:
 00000000           BEGIN_INIT
 00000000  01        DB          0x1
 00000001  02        DB          0x2
 00000002  03        DB          0x3
 00000003  04        DB          0x4
 00000004  05        DB          0x5
 00000005  06        DB          0x6
 00000006  07        DB          0x7
 00000007  08        DB          0x8
 00000008  09        DB          0x9
 00000009  0A        DB          0xA
 0000000A  0B        DB          0xB
 0000000B  0C        DB          0xC
 0000000C  0D        DB          0xD
 0000000D  0E        DB          0xE
 0000000E  0F        DB          0xF
 0000000F  10        DB          0x10
 00000010  11        DB          0x11
 00000011  12        DB          0x12
 00000012  13        DB          0x13
 00000013  14        DB          0x14
 00000014  15        DB          0x15
 00000015  16        DB          0x16
 00000016  17        DB          0x17
 00000017  18        DB          0x18
 00000018  19        DB          0x19
 00000019  20        DB          0x20
 0000001A  21        DB          0x21
 0000001B  22        DB          0x22
 0000001C  23        DB          0x23
 0000001D  24        DB          0x24
 0000001E           END_INIT



*** CODE SEGMENT '?PR?main?master':
   24: int main(void) {
 00000000  B500      PUSH        {LR}
 00000002            ; SCOPE-START
   25:     int i = 0;
 00000002  2100      MOV         R1,#0x0
 00000004  1C08      MOV         R0,R1 ; i
 00000006  ---- Variable 'i' assigned to Register 'R0' ----
   27:     GP1CON = 0x22220000;                // configure SPI on SPM
 00000006  4800      LDR         R2,=0x22220000
 00000008  4800      LDR         R0,=0xFFFFF404
 0000000A  6002      STR         R2,[R0,#0x0]
   28:     SPIDIV = 0xCC;                      // set SPI clock 40960000/(2x(1+SPIDIV))
 0000000C  22CC      MOV         R2,#0xCC
 0000000E  4800      LDR         R0,=0xFFFF0A0C
 00000010  6002      STR         R2,[R0,#0x0]
   30:     SPICON = 0x104B;                    // enable SPI master in continuous transfer mode 
 00000012  4800      LDR         R2,=0x104B
 00000014  4800      LDR         R0,=0xFFFF0A10
 00000016  6002      STR         R2,[R0,#0x0]
   32:     for (i=0;i<30;i++)
ARM COMPILER V2.40c,  master                                                               07/12/05  12:15:24  PAGE 3   

 00000018  1C08      MOV         R0,R1 ; i
 0000001A          L_4:
   34:         SPITX = results[i];               // transmit command or any dummy data
 0000001A  1C02      MOV         R2,R0 ; i
 0000001C  4800      LDR         R1,=results ; results
 0000001E  5C89      LDRB        R1,[R1,R2]
 00000020  1C0A      MOV         R2,R1
 00000022  4800      LDR         R1,=0xFFFF0A08
 00000024  600A      STR         R2,[R1,#0x0]
   35:          while ((SPISTA & 0x02) != 0x02) ; // wait for data received status bit
 00000026          L_6:
 00000026  4800      LDR         R1,=0xFFFF0A00
 00000028  6809      LDR         R1,[R1,#0x0]
 0000002A  2202      MOV         R2,#0x2
 0000002C  4211      TST         R1,R2
 0000002E  D0FA      BEQ         L_6  ; T=0x00000026
   36:     }   
 00000030  3001      ADD         R0,#0x1
 00000032  1C01      MOV         R1,R0 ; i
 00000034  291E      CMP         R1,#0x1E ; i
 00000036  DBF0      BLT         L_4  ; T=0x0000001A
   37: while (1){}
 00000038          L_10:
 00000038  E7FE      B           L_10  ; T=0x00000038
 0000003A            ; SCOPE-END
   38: }
 0000003A  BC08      POP         {R3}
 0000003C  4718      BX          R3
 0000003E          ENDP ; 'main'



Module Information          Static
----------------------------------
  code size            =    ------
  data size            =        30
  const size           =    ------
End of Module Information.


ARM COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)