slave.lst

ADuC7020/26是ADI模拟公司开发的ARM7TDMI内核

ARM COMPILER V2.42,  slave                                                                 09/01/06  14:43:49  PAGE 1   


ARM COMPILER V2.42, COMPILATION OF MODULE slave
OBJECT MODULE PLACED IN slave.OBJ
COMPILER INVOKED BY: C:\Keil\ARM\BIN\CA.exe slave.c ARM OPTIMIZE(SIZE) DEBUG TABS(4) 

stmt  level    source

    1          /*********************************************************************
    2          
    3           Author        : ADI - Apps            www.analog.com/MicroConverter
    4          
    5           Date          : Dec. 2005
    6          
    7           File          : slave.c
    8          
    9           Hardware      : Applicable to ADuC702x rev H or I silicon
   10                           Currently targetting ADuC7026.
   11          
   12           Description   : SPI slave is to use with master.c or master1.c
   13                           the slaves receives values from the master and
   14                           keeps transmitting '0' as it is the default value at reset.
   15                  
   16          *********************************************************************/
   17          
   18          
   19          
   20          #include<ADuC7026.h>
   21          
   22          
   23          int main(void) {
   24   1      char i; 
   25   1      char received_data[30];
   26   1      
   27   1          GP1CON = 0x22220000;                // configure SPI on SPM
   28   1          SPICON = 0x1409;                    // enable SPI slave mode
   29   1          
   30   1      
   31   1      for (i=0; i <30; i++) {
   32   2          while (!(SPISTA & 0x08)) ;          // wait for data in the RX MMR
   33   2          received_data[i] = SPIRX;           // read data and clear bit 4 of SPISTA
   34   2          }
   35   1      while (1) {
   36   2      
   37   2          }           
   38   1      }
ARM COMPILER V2.42,  slave                                                                 09/01/06  14:43:49  PAGE 2   

ASSEMBLY LISTING OF GENERATED OBJECT CODE



*** EXTERNALS:
 EXTERN NUMBER (__startup)



*** PUBLICS:
 PUBLIC         main



*** CODE SEGMENT '?PR?main?slave':
   23: int main(void) {
 00000000  E92D4000  STMDB       R13!,{LR}
 00000004  E24DD020  SUB         R13,R13,#0x0020
 00000008            ; SCOPE-START
   27:     GP1CON = 0x22220000;                // configure SPI on SPM
 00000008  E5101000  LDR         R1,=0x22220000
 0000000C  E5100000  LDR         R0,=0xFFFFF404
 00000010  E5801000  STR         R1,[R0,#0x0]
   28:     SPICON = 0x1409;                    // enable SPI slave mode
 00000014  E5101000  LDR         R1,=0x1409
 00000018  E5100000  LDR         R0,=0xFFFF0A10
 0000001C  E5801000  STR         R1,[R0,#0x0]
   31: for (i=0; i <30; i++) {
 00000020  E3A00000  MOV         R0,#0x0
 00000024  ---- Variable 'i' assigned to Register 'R0' ----
 00000024  EA00000E  B           L_3  ; Targ=0x64
   32:      while (!(SPISTA & 0x08)) ;             // wait for data in the RX MMR
 00000028          L_9:
 00000028          L_6:
 00000028  E5101000  LDR         R1,=0xFFFF0A00
 0000002C  E5911000  LDR         R1,[R1,#0x0]
 00000030  E3110008  TST         R1,#0x0008
 00000034  0AFFFFFB  BEQ         L_6  ; Targ=0x28
   33:     received_data[i] = SPIRX;           // read data and clear bit 4 of SPISTA
 00000038  E5101000  LDR         R1,=0xFFFF0A04
 0000003C  E5911000  LDR         R1,[R1,#0x0]
 00000040  E1A01C01  MOV         R1,R1,LSL #24
 00000044  E1A01C21  MOV         R1,R1,LSR #24
 00000048  E1A02000  MOV         R2,R0 ; i
 0000004C  E1A03C02  MOV         R3,R2,LSL #24 ; i
 00000050  E1A03C23  MOV         R3,R3,LSR #24
 00000054  E28D2000  ADD         R2,R13,#0x0000
 00000058  E7C21003  STRB        R1,[R2,+R3]
   34:     }
 0000005C  E2800001  ADD         R0,R0,#0x0001 ; i
 00000060  E20000FF  AND         R0,R0,#0x00FF
 00000064          L_3:
 00000064  E1A01000  MOV         R1,R0 ; i
 00000068  E1A01C01  MOV         R1,R1,LSL #24 ; i
 0000006C  E1A01C21  MOV         R1,R1,LSR #24
 00000070  E351001E  CMP         R1,#0x001E
 00000074  BAFFFFEB  BLT         L_9  ; Targ=0x28
   37:     }            
 00000078          L_10:
 00000078  EAFFFFFE  B           L_10  ; Targ=0x78
 0000007C            ; SCOPE-END
   38: }
 0000007C  E28DD020  ADD         R13,R13,#0x0020
 00000080  E8BD0008  LDMIA       R13!,{R3}
 00000084  E12FFF13  BX          R3
 00000088          ENDP ; 'main'



Module Information          Static
----------------------------------
  code size            =    ------
  data size            =    ------
ARM COMPILER V2.42,  slave                                                                 09/01/06  14:43:49  PAGE 3   

  const size           =    ------
End of Module Information.


ARM COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)