📄 i2c_slave.lst
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ARM COMPILER V2.42, I2C_Slave 09/01/06 14:42:34 PAGE 1
ARM COMPILER V2.42, COMPILATION OF MODULE I2C_Slave
OBJECT MODULE PLACED IN I2C_Slave.OBJ
COMPILER INVOKED BY: C:\Keil\ARM\BIN\CA.exe I2C_Slave.c THUMB DEBUG TABS(4)
stmt level source
1 /***************************************************************************
2
3 Author : ADI - Apps www.analog.com/MicroConverter
4
5 Date : Sept. 2005
6
7 File : I2C_Slave.c
8
9 Hardware : Applicable to ADuC702x rev H or I silicon
10 Currently targetting ADuC7026.
11
12 Description : I2C Slave to demonstrate with I2C_Master.
13
14 Operates in two modes, read & write (called recieve and
15 transmit here). At the begining of an I2C transmission, the
16 Master sends an address. The LSB of this address determines
17 if the Master is to read (1) or write (0).
18
19
20 ***************************************************************************/
21
22 #include<ADuC7020.h>
23
24 void IRQ_Handler() __irq;
25
26 int i = 0, dat[9];
27
28
29 int main()
30 {
31 1 // I2C on P1.0 and P1.1
32 1 GP1CON = 0x22;
33 1
34 1 IRQEN = 0x200; // I2C0 Slave Interupt
35 1
36 1 I2C0CFG = 0x01; // Slave Enable
37 1 I2C0ID0 = 0xA0; // Slave ID
38 1 I2C0STX = 0x77;
39 1
40 1
41 1 while (1)
42 1 {
43 2 };
44 1
45 1 return 0;
46 1 }
47
48
49
50 /*************************************************/
51 /*************************************************/
52 /************ IRQ Service Routine *************/
53 /*************************************************/
54 /*************************************************/
55
56
57 void IRQ_Handler() __irq
58 {
59 1 // Slave Recieve
ARM COMPILER V2.42, I2C_Slave 09/01/06 14:42:34 PAGE 2
60 1 if ((I2C0SSTA & 0x08)==0x08) // Slave Recieve IRQ
61 1 {
62 2 dat[i] = I2C0SRX;
63 2 i++;
64 2 }
65 1
66 1
67 1 // Slave Transmit
68 1 if ((I2C0SSTA & 0x04)==0x04) // Slave Transmit IRQ
69 1 {
70 2 if(i > 4) // Resetting value of i if it has been incremented by RX
71 2 {
72 3 i = 0;
73 3 }
74 2
75 2 i++;
76 2 switch (i)
77 2 {
78 3 case 1:
79 3 I2C0STX = 0x55;
80 3 break;
81 3
82 3 case 2:
83 3 I2C0STX = 0x33;
84 3 break;
85 3
86 3 case 3:
87 3 I2C0STX = 0xAA;
88 3 break;
89 3
90 3 case 4:
91 3 I2C0STX = 0x11;
92 3 break;
93 3 };
94 2 }
95 1 }
ARM COMPILER V2.42, I2C_Slave 09/01/06 14:42:34 PAGE 3
ASSEMBLY LISTING OF GENERATED OBJECT CODE
*** EXTERNALS:
EXTERN NUMBER (__startup)
*** PUBLICS:
PUBLIC IRQ_Handler?A
PUBLIC main
PUBLIC i
PUBLIC dat
*** DATA SEGMENT '?DT0?I2C_Slave':
00000000 i:
00000000 BEGIN_INIT
00000000 00000000 DD 0x0
00000004 END_INIT
00000004 dat:
00000004 DS 36
*** CODE SEGMENT '?PR?main?I2C_Slave':
29: int main()
00000000 B500 PUSH {LR}
32: GP1CON = 0x22;
00000002 2122 MOV R1,#0x22
00000004 4800 LDR R0,=0xFFFFF404
00000006 6001 STR R1,[R0,#0x0]
34: IRQEN = 0x200; // I2C0 Slave Interupt
00000008 4980 LDR R1,=0x200
0000000A 4800 LDR R0,=0xFFFF0008
0000000C 6001 STR R1,[R0,#0x0]
36: I2C0CFG = 0x01; // Slave Enable
0000000E 2101 MOV R1,#0x1
00000010 4800 LDR R0,=0xFFFF082C
00000012 6001 STR R1,[R0,#0x0]
37: I2C0ID0 = 0xA0; // Slave ID
00000014 21A0 MOV R1,#0xA0
00000016 4800 LDR R0,=0xFFFF0838
00000018 6001 STR R1,[R0,#0x0]
38: I2C0STX = 0x77;
0000001A 2177 MOV R1,#0x77
0000001C 4800 LDR R0,=0xFFFF080C
0000001E 6001 STR R1,[R0,#0x0]
43: };
00000020 L_1:
00000020 E7FE B L_1 ; T=0x00000020
46: }
00000022 BC08 POP {R3}
00000024 4718 BX R3
00000026 ENDP ; 'main'
*** CODE SEGMENT '?PR?IRQ_Handler?A?I2C_Slave':
57: void IRQ_Handler() __irq
00000000 E92D000F STMDB R13!,{R0-R3}
60: if ((I2C0SSTA & 0x08)==0x08) // Slave Recieve IRQ
00000004 E5100000 LDR R0,=0xFFFF0804
00000008 E5900000 LDR R0,[R0,#0x0]
0000000C E3100008 TST R0,#0x0008
00000010 0A000009 BEQ L_6 ; Targ=0x3C
62: dat[i] = I2C0SRX;
00000014 E5100000 LDR R0,=0xFFFF0808
00000018 E5900000 LDR R0,[R0,#0x0]
0000001C E5101000 LDR R1,=i ; i
00000020 E5911000 LDR R1,[R1,#0x0] ; i
00000024 E1A03101 MOV R3,R1,LSL #2
00000028 E5102000 LDR R2,=dat ; dat
0000002C E7820003 STR R0,[R2,+R3]
ARM COMPILER V2.42, I2C_Slave 09/01/06 14:42:34 PAGE 4
63: i++;
00000030 E5100000 LDR R0,=i ; i
00000034 E2811001 ADD R1,R1,#0x0001
00000038 E5801000 STR R1,[R0,#0x0] ; i
64: }
0000003C L_6:
68: if ((I2C0SSTA & 0x04)==0x04) // Slave Transmit IRQ
0000003C E5100000 LDR R0,=0xFFFF0804
00000040 E5900000 LDR R0,[R0,#0x0]
00000044 E3100004 TST R0,#0x0004
00000048 0A000023 BEQ L_7 ; Targ=0xDC
70: if(i > 4) // Resetting value of i if it has been incremented by RX
0000004C E5100000 LDR R0,=i ; i
00000050 E5900000 LDR R0,[R0,#0x0] ; i
00000054 E3500004 CMP R0,#0x0004
00000058 DA000002 BLE L_8 ; Targ=0x68
72: i = 0;
0000005C E3A01000 MOV R1,#0x0
00000060 E5100000 LDR R0,=i ; i
00000064 E5801000 STR R1,[R0,#0x0] ; i
73: }
00000068 L_8:
75: i++;
00000068 E5100000 LDR R0,=i ; i
0000006C E5901000 LDR R1,[R0,#0x0] ; i
00000070 E2811001 ADD R1,R1,#0x0001
00000074 E5801000 STR R1,[R0,#0x0] ; i
76: switch (i)
00000078 E5100000 LDR R0,=i ; i
0000007C E5900000 LDR R0,[R0,#0x0] ; i
00000080 E3500002 CMP R0,#0x0002
00000084 0A000009 BEQ L_11 ; Targ=0xB0
00000088 E3500003 CMP R0,#0x0003
0000008C 0A00000B BEQ L_12 ; Targ=0xC0
00000090 E3500004 CMP R0,#0x0004
00000094 0A00000D BEQ L_13 ; Targ=0xD0
00000098 E3500001 CMP R0,#0x0001
0000009C 1A00000E BNE L_7 ; Targ=0xDC
78: case 1:
000000A0 L_10:
79: I2C0STX = 0x55;
000000A0 E3A01055 MOV R1,#0x55
000000A4 E5100000 LDR R0,=0xFFFF080C
000000A8 E5801000 STR R1,[R0,#0x0]
80: break;
000000AC EA00000A B L_7 ; Targ=0xDC
82: case 2:
000000B0 L_11:
83: I2C0STX = 0x33;
000000B0 E3A01033 MOV R1,#0x33
000000B4 E5100000 LDR R0,=0xFFFF080C
000000B8 E5801000 STR R1,[R0,#0x0]
84: break;
000000BC EA000006 B L_7 ; Targ=0xDC
86: case 3:
000000C0 L_12:
87: I2C0STX = 0xAA;
000000C0 E3A010AA MOV R1,#0xAA
000000C4 E5100000 LDR R0,=0xFFFF080C
000000C8 E5801000 STR R1,[R0,#0x0]
88: break;
000000CC EA000002 B L_7 ; Targ=0xDC
90: case 4:
000000D0 L_13:
91: I2C0STX = 0x11;
000000D0 E3A01011 MOV R1,#0x11
ARM COMPILER V2.42, I2C_Slave 09/01/06 14:42:34 PAGE 5
000000D4 E5100000 LDR R0,=0xFFFF080C
000000D8 E5801000 STR R1,[R0,#0x0]
94: }
000000DC L_7:
95: }
000000DC E8BD000F LDMIA R13!,{R0-R3}
000000E0 E25EF004 SUBS R15,R14,#0x0004
000000E4 ENDP ; 'IRQ_Handler?A'
Module Information Static
----------------------------------
code size = ------
data size = 40
const size = ------
End of Module Information.
ARM COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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