📄 protect.lst
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00000000 ---- Variable 'data' assigned to Register 'R1' ----
00000000 1C02 MOV R2,R0 ; addr
00000002 ---- Variable 'addr' assigned to Register 'R2' ----
131: FEEADR = addr; // set data address
00000002 1C10 MOV R0,R2 ; addr
00000004 0402 LSL R2,R0,#0x10 ; addr
00000006 0C12 LSR R2,R2,#0x10
00000008 4800 LDR R0,=0xFFFFF810
0000000A 6002 STR R2,[R0,#0x0]
132: FEEDAT = data; // set data value
0000000C 1C08 MOV R0,R1 ; data
0000000E 0601 LSL R1,R0,#0x18 ; data
00000010 0E09 LSR R1,R1,#0x18
00000012 4800 LDR R0,=0xFFFFF80C
00000014 6001 STR R1,[R0,#0x0]
133: FEECON = 0x02; // single Write command
00000016 2102 MOV R1,#0x2
00000018 4800 LDR R0,=0xFFFFF808
0000001A 6001 STR R1,[R0,#0x0]
134: status = FEESTA&0x03;
0000001C 4800 LDR R0,=0xFFFFF800
0000001E 6801 LDR R1,[R0,#0x0]
00000020 2003 MOV R0,#0x3
00000022 4001 AND R1,R0
00000024 0609 LSL R1,R1,#0x18
00000026 0E09 LSR R1,R1,#0x18
00000028 4800 LDR R0,=status ; status
0000002A 7001 STRB R1,[R0,#0x0] ; status
135: while (!(status)) status = FEESTA&0x03;
0000002C E007 B L_46 ; T=0x0000003E
0000002E L_48:
0000002E 4800 LDR R0,=0xFFFFF800
ARM COMPILER V2.42, protect 10/12/07 17:51:27 PAGE 9
00000030 6801 LDR R1,[R0,#0x0]
00000032 2003 MOV R0,#0x3
00000034 4001 AND R1,R0
00000036 0609 LSL R1,R1,#0x18
00000038 0E09 LSR R1,R1,#0x18
0000003A 4800 LDR R0,=status ; status
0000003C 7001 STRB R1,[R0,#0x0] ; status
0000003E L_46:
0000003E 4800 LDR R0,=status ; status
00000040 7800 LDRB R0,[R0,#0x0] ; status
00000042 1C01 MOV R1,R0
00000044 2900 CMP R1,#0x0
00000046 D0F2 BEQ L_48 ; T=0x0000002E
136: if ((status&0x02)==0x02) ERROR = 1;
00000048 2102 MOV R1,#0x2
0000004A 4208 TST R0,R1
0000004C D002 BEQ L_50 ; T=0x00000054
0000004E 2101 MOV R1,#0x1
00000050 4800 LDR R0,=ERROR ; ERROR
00000052 7001 STRB R1,[R0,#0x0] ; ERROR
00000054 L_50:
138: }
00000054 4770 BX R14
00000056 ENDP ; 'save?T'
*** CODE SEGMENT '?PR?erase_page?T?protect':
140: void erase_page(unsigned short int addr){
00000000 1C01 MOV R1,R0 ; addr
00000002 ---- Variable 'addr' assigned to Register 'R1' ----
141: FEEADR = addr; // set data address
00000002 1C08 MOV R0,R1 ; addr
00000004 0401 LSL R1,R0,#0x10 ; addr
00000006 0C09 LSR R1,R1,#0x10
00000008 4800 LDR R0,=0xFFFFF810
0000000A 6001 STR R1,[R0,#0x0]
142: FEECON = 0x05; // erase page command
0000000C 2105 MOV R1,#0x5
0000000E 4800 LDR R0,=0xFFFFF808
00000010 6001 STR R1,[R0,#0x0]
143: status = FEESTA&0x03;
00000012 4800 LDR R0,=0xFFFFF800
00000014 6801 LDR R1,[R0,#0x0]
00000016 2003 MOV R0,#0x3
00000018 4001 AND R1,R0
0000001A 0609 LSL R1,R1,#0x18
0000001C 0E09 LSR R1,R1,#0x18
0000001E 4800 LDR R0,=status ; status
00000020 7001 STRB R1,[R0,#0x0] ; status
144: while (!(status)) status = FEESTA&0x03;
00000022 E007 B L_52 ; T=0x00000034
00000024 L_54:
00000024 4800 LDR R0,=0xFFFFF800
00000026 6801 LDR R1,[R0,#0x0]
00000028 2003 MOV R0,#0x3
0000002A 4001 AND R1,R0
0000002C 0609 LSL R1,R1,#0x18
0000002E 0E09 LSR R1,R1,#0x18
00000030 4800 LDR R0,=status ; status
00000032 7001 STRB R1,[R0,#0x0] ; status
00000034 L_52:
00000034 4800 LDR R0,=status ; status
00000036 7800 LDRB R0,[R0,#0x0] ; status
00000038 1C01 MOV R1,R0
0000003A 2900 CMP R1,#0x0
0000003C D0F2 BEQ L_54 ; T=0x00000024
145: if ((status&0x02)==0x02) ERROR = 1;
0000003E 2102 MOV R1,#0x2
ARM COMPILER V2.42, protect 10/12/07 17:51:27 PAGE 10
00000040 4208 TST R0,R1
00000042 D002 BEQ L_56 ; T=0x0000004A
00000044 2101 MOV R1,#0x1
00000046 4800 LDR R0,=ERROR ; ERROR
00000048 7001 STRB R1,[R0,#0x0] ; ERROR
0000004A L_56:
147: }
0000004A 4770 BX R14
0000004C ENDP ; 'erase_page?T'
*** CODE SEGMENT '?PR?senddata?T?protect':
149: void senddata(short to_send){
00000000 B510 PUSH {R4,LR}
00000002 1C04 MOV R4,R0 ; to_send
00000004 ---- Variable 'to_send' assigned to Register 'R4' ----
150: while(!(0x020==(COMSTA0 & 0x020))){}
00000004 L_58:
00000004 4800 LDR R0,=0xFFFF0714
00000006 6800 LDR R0,[R0,#0x0]
00000008 2120 MOV R1,#0x20
0000000A 4208 TST R0,R1
0000000C D0FA BEQ L_58 ; T=0x00000004
151: COMTX = 0x0A; // output LF
0000000E 210A MOV R1,#0xA
00000010 4800 LDR R0,=0xFFFF0700
00000012 6001 STR R1,[R0,#0x0]
152: while(!(0x020==(COMSTA0 & 0x020))){}
00000014 L_62:
00000014 4800 LDR R0,=0xFFFF0714
00000016 6800 LDR R0,[R0,#0x0]
00000018 2120 MOV R1,#0x20
0000001A 4208 TST R0,R1
0000001C D0FA BEQ L_62 ; T=0x00000014
153: COMTX = 0x0D; // output CR
0000001E 210D MOV R1,#0xD
00000020 4800 LDR R0,=0xFFFF0700
00000022 6001 STR R1,[R0,#0x0]
154: while(!(0x020==(COMSTA0 & 0x020))){}
00000024 L_66:
00000024 4800 LDR R0,=0xFFFF0714
00000026 6800 LDR R0,[R0,#0x0]
00000028 2120 MOV R1,#0x20
0000002A 4208 TST R0,R1
0000002C D0FA BEQ L_66 ; T=0x00000024
155: COMTX = hex2ascii ((to_send >> 8) & 0x0F);
0000002E 1C20 MOV R0,R4 ; to_send
00000030 0400 LSL R0,R0,#0x10 ; to_send
00000032 1400 ASR R0,R0,#0x10
00000034 1200 ASR R0,R0,#0x8
00000036 210F MOV R1,#0xF
00000038 4008 AND R0,R1
0000003A F7FF BL hex2ascii?T ; T=0x0001 (1)
0000003C FFE1 BL hex2ascii?T ; T=0x0001 (2)
0000003E 0601 LSL R1,R0,#0x18 ; hex2ascii?T
00000040 0E09 LSR R1,R1,#0x18
00000042 4800 LDR R0,=0xFFFF0700
00000044 6001 STR R1,[R0,#0x0]
156: while(!(0x020==(COMSTA0 & 0x020))){}
00000046 L_70:
00000046 4800 LDR R0,=0xFFFF0714
00000048 6800 LDR R0,[R0,#0x0]
0000004A 2120 MOV R1,#0x20
0000004C 4208 TST R0,R1
0000004E D0FA BEQ L_70 ; T=0x00000046
157: COMTX = hex2ascii ((to_send >> 4) & 0x0F);
00000050 1C20 MOV R0,R4 ; to_send
00000052 0400 LSL R0,R0,#0x10 ; to_send
ARM COMPILER V2.42, protect 10/12/07 17:51:27 PAGE 11
00000054 1400 ASR R0,R0,#0x10
00000056 1100 ASR R0,R0,#0x4
00000058 210F MOV R1,#0xF
0000005A 4008 AND R0,R1
0000005C F7FF BL hex2ascii?T ; T=0x0001 (1)
0000005E FFD0 BL hex2ascii?T ; T=0x0001 (2)
00000060 0601 LSL R1,R0,#0x18 ; hex2ascii?T
00000062 0E09 LSR R1,R1,#0x18
00000064 4800 LDR R0,=0xFFFF0700
00000066 6001 STR R1,[R0,#0x0]
158: while(!(0x020==(COMSTA0 & 0x020))){}
00000068 L_74:
00000068 4800 LDR R0,=0xFFFF0714
0000006A 6800 LDR R0,[R0,#0x0]
0000006C 2120 MOV R1,#0x20
0000006E 4208 TST R0,R1
00000070 D0FA BEQ L_74 ; T=0x00000068
159: COMTX = hex2ascii (to_send & 0x0F);
00000072 1C20 MOV R0,R4 ; to_send
00000074 0400 LSL R0,R0,#0x10 ; to_send
00000076 1400 ASR R0,R0,#0x10
00000078 210F MOV R1,#0xF
0000007A 4008 AND R0,R1
0000007C F7FF BL hex2ascii?T ; T=0x0001 (1)
0000007E FFC0 BL hex2ascii?T ; T=0x0001 (2)
00000080 0601 LSL R1,R0,#0x18 ; hex2ascii?T
00000082 0E09 LSR R1,R1,#0x18
00000084 4800 LDR R0,=0xFFFF0700
00000086 6001 STR R1,[R0,#0x0]
160: }
00000088 BC10 POP {R4}
0000008A BC08 POP {R3}
0000008C 4718 BX R3
0000008E ENDP ; 'senddata?T'
*** CODE SEGMENT '?PR?hex2ascii?T?protect':
163: char hex2ascii(char toconv){
00000000 1C01 MOV R1,R0 ; toconv
00000002 ---- Variable 'toconv' assigned to Register 'R1' ----
164: if (toconv<0x0A) toconv += 0x30;
00000002 1C08 MOV R0,R1 ; toconv
00000004 0600 LSL R0,R0,#0x18 ; toconv
00000006 0E00 LSR R0,R0,#0x18
00000008 280A CMP R0,#0xA
0000000A DA03 BGE L_78 ; T=0x00000014
0000000C 3130 ADD R1,#0x30
0000000E 0609 LSL R1,R1,#0x18
00000010 0E09 LSR R1,R1,#0x18
00000012 E002 B L_79 ; T=0x0000001A
00000014 L_78:
165: else toconv += 0x37;
00000014 3137 ADD R1,#0x37
00000016 0609 LSL R1,R1,#0x18
00000018 0E09 LSR R1,R1,#0x18
0000001A L_79:
166: return (toconv);
0000001A 1C08 MOV R0,R1 ; toconv
0000001C 0600 LSL R0,R0,#0x18 ; toconv
0000001E 0E00 LSR R0,R0,#0x18
167: }
00000020 4770 BX R14
00000022 ENDP ; 'hex2ascii?T'
Module Information Static
----------------------------------
code size = ------
data size = 2
ARM COMPILER V2.42, protect 10/12/07 17:51:27 PAGE 12
const size = 7
End of Module Information.
ARM COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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