📄 hardware_reg.h
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#define DMACC0Control (DMACbase+0x100c)
#define DMACC0Configuration (DMACbase+0x1010)
#define DMACC1SrcAddr (DMACbase+0x1100) //DMA channel 1 registers; R/W
#define DMACC1DestAddr (DMACbase+0x1104)
#define DMACC1Control (DMACbase+0x110c)
#define DMACC1Configuration (DMACbase+0x1110)
#define DMACC2SrcAddr (DMACbase+0x1200) //DMA channel 2 registers; R/W
#define DMACC2DestAddr (DMACbase+0x1204)
#define DMACC2Control (DMACbase+0x120c)
#define DMACC2Configuration (DMACbase+0x1210)
#define DMACC3SrcAddr (DMACbase+0x1300) //DMA channel 3 registers; R/W
#define DMACC3DestAddr (DMACbase+0x1304)
#define DMACC3Control (DMACbase+0x130c)
#define DMACC3Configuration (DMACbase+0x1310)
#define DMACC4SrcAddr (DMACbase+0x1400) //DMA channel 4 registers; R/W
#define DMACC4DestAddr (DMACbase+0x1404)
#define DMACC4Control (DMACbase+0x140c)
#define DMACC4Configuration (DMACbase+0x1410)
#define DMACC5SrcAddr (DMACbase+0x1500) //DMA channel 5 registers; R/W
#define DMACC5DestAddr (DMACbase+0x1504)
#define DMACC5Control (DMACbase+0x150c)
#define DMACC5Configuration (DMACbase+0x1510)
/**************************************
define EMI registers
****************************************/
#define EMI_SRAM_REGBASE 0x11000000 //Sdram sram register base;
#define EMI_NAND_REGBASE 0x11000100 //NAND FLASH register base;
#define EMIADDR_SMCONF ( EMI_SRAM_REGBASE+0x00 ) //adress of sram time_sequence register
#define EMIADDR_CSGBAB ( EMI_SRAM_REGBASE+0x04 ) //adress of CSA and CSB chip select register
#define EMIADDR_CSGBCD ( EMI_SRAM_REGBASE+0X08 ) //adress of CSC and CSD chip select register
#define EMIADDR_CSGBEF ( EMI_SRAM_REGBASE+0Xc ) //adress of CSE and CSF chip select register
#define EMIADDR_REMAP ( EMI_SRAM_REGBASE+0X10 ) //Remap register select boot memory
#define EMIADDR_SDCONF1 ( EMI_SRAM_REGBASE+0X14 ) //sram and adram time_sequence register I
#define EMIADDR_SDCONF2 ( EMI_SRAM_REGBASE+0X18 ) //sram and adram time_sequence register II
#define EMIADDR_NANDADDR ( EMI_NAND_REGBASE+0X00 ) //adress of Nand Flash adress register
#define EMIADDR_NANDCOM ( EMI_NAND_REGBASE+0X04 ) //adress of Nand Flash control register
#define EMIADDR_NANDSTATUS ( EMI_NAND_REGBASE+0X0c ) //adress of Nand Flash status register
#define EMIADDR_NANDERRORADDR1 ( EMI_NAND_REGBASE+0X10 ) //adress of Nand Flash error register I
#define EMIADDR_NANDERRORADDR2 ( EMI_NAND_REGBASE+0X14 ) //adress of Nand Flash error register II
#define EMIADDR_NANDCONF ( EMI_NAND_REGBASE+0X18 ) //adress of Nand Flash config register
#define EMIADDR_NANDINTR ( EMI_NAND_REGBASE+0X1c ) //Int clear
#define EMIADDR_NANDFINECC ( EMI_NAND_REGBASE+0X20 ) //ECC complish
#define EMIADDR_NANDIDLE ( EMI_NAND_REGBASE+0X24 ) //Compish register
#define EMI_NAND_DATA 0x11000200
#define HA_ERRORBASE_EMI 0X28050000
/**************************************
define MMC registers
****************************************/
#ifdef FPGA
#define BASE_MMCC 0X10009000
#define MMCC_INIT 0X31000000
#else
#define BASE_MMCC 0X0020C000
#define MMCC_INIT 0X05080000
#endif
#define MMCC_STR_STP_CLK (BASE_MMCC+0x00)
#define MMCC_STATUS (BASE_MMCC+0X04)
#define MMCC_CLK_RATE (BASE_MMCC+0X08)
#define MMCC_CMD_DAT_CONT (BASE_MMCC+0X0C)
#define MMCC_RES_TO (BASE_MMCC+0X10)
#define MMCC_READ_TO (BASE_MMCC+0X14)
#define MMCC_BLK_LEN (BASE_MMCC+0X18)
#define MMCC_NOB (BASE_MMCC+0X1C)
#define MMCC_DAT_COUNT (BASE_MMCC+0X20)
#define MMCC_INT_MASK (BASE_MMCC+0X24)
#define MMCC_CMD (BASE_MMCC+0X28)
#define MMCC_ARG (BASE_MMCC+0X2C)
#define MMCC_RESPONSE0 (BASE_MMCC+0X30)
#define MMCC_RESPONSE1 (BASE_MMCC+0X34)
#define MMCC_RESPONSE2 (BASE_MMCC+0X38)
#define MMCC_RESPONSE3 (BASE_MMCC+0X3C)
#define MMCC_WRITE_BUFER_ACCESS (BASE_MMCC+0X40)
#define MMCC_READ_BUFER_ACCESS (BASE_MMCC+0X44)
//********************************
//PMU
//*****************************
#define PMU_BASE 0x10001000
#define PMU_PLTR (PMU_BASE+0X00)
#define PMU_PMCR (PMU_BASE+0X04)
#define PMU_PUCR (PMU_BASE+0X08)
#define PMU_PSCR (PMU_BASE+0X0C)//OPEN MODULE
#define PMU_PCDR (PMU_BASE+0X10)
#define PMU_PMDR (PMU_BASE+0X14)
//********************************
//GPIO
//********************************
#define GPIO_BASE 0x1000B000
#define PORTH_DIR (GPIO_BASE+0X68)
#define PORTH_SEL (GPIO_BASE+0X6C)
#define PORTH_DATA (GPIO_BASE+0X7C)
#endif //_HARWARE_REG_H
#define BASE_USBDEVICE 0x1000a000 //BASE ADDRESS OF usb device
#define USB_INTR (BASE_USBDEVICE+0X000) // ;int register
#define USB_INTRMASK (BASE_USBDEVICE+0X004) // ;imask register
#define USB_INTRCTRL (BASE_USBDEVICE+0X008) // ;control register
#define USB_EPINFO (BASE_USBDEVICE+0X00c) // ;information register
#define USB_BCONFIGURATIONVALUE (BASE_USBDEVICE+0X010) // ;configuration of value register
#define USB_BMATTRIBUTES (BASE_USBDEVICE+0X014) // ;configuration of bmattr register
#define USB_DEVSPEED (BASE_USBDEVICE+0X018) // ;record status register
#define USB_FRAMENUMBER (BASE_USBDEVICE+0X01C) // ;record status register
#define USB_EPTRANSACTIONS0 (BASE_USBDEVICE+0X020) // ;record status register
#define USB_EPTRANSACTIONS1 (BASE_USBDEVICE+0X024) // ;record status register
#define USB_APPIFUPDATE (BASE_USBDEVICE+0X028) // ;record status register
#define USB_CFGINTERFACE0 (BASE_USBDEVICE+0X02C) // ;cfg_interface register
#define USB_CFGINTERFACE1 (BASE_USBDEVICE+0X030) // ;cfg_interface register
#define USB_CFGINTERFACE2 (BASE_USBDEVICE+0X034) // ;cfg_interface register
#define USB_CFGINTERFACE3 (BASE_USBDEVICE+0X038) // ;cfg_interface register
#define USB_CFGINTERFACE4 (BASE_USBDEVICE+0X03c) // ;cfg_interface register
#define USB_CFGINTERFACE5 (BASE_USBDEVICE+0X040) // ;cfg_interface register
#define USB_CFGINTERFACE6 (BASE_USBDEVICE+0X044) // ;cfg_interface register
#define USB_CFGINTERFACE7 (BASE_USBDEVICE+0X048) // ;cfg_interface register
#define USB_CFGINTERFACE8 (BASE_USBDEVICE+0X04c) // ;cfg_interface register
#define USB_CFGINTERFACE9 (BASE_USBDEVICE+0X050) // ;cfg_interface register
#define USB_CFGINTERFACE10 (BASE_USBDEVICE+0X054) // ;cfg_interface register
#define USB_CFGINTERFACE11 (BASE_USBDEVICE+0X058) // ;cfg_interface register
#define USB_CFGINTERFACE12 (BASE_USBDEVICE+0X05c) // ;cfg_interface register
#define USB_CFGINTERFACE13 (BASE_USBDEVICE+0X060) // ;cfg_interface register
#define USB_CFGINTERFACE14 (BASE_USBDEVICE+0X064) // ;cfg_interface register
#define USB_CFGINTERFACE15 (BASE_USBDEVICE+0X068) // ;cfg_interface register
#define USB_CFGINTERFACE16 (BASE_USBDEVICE+0X06c) // ;cfg_interface register
#define USB_CFGINTERFACE17 (BASE_USBDEVICE+0X070) // ;cfg_interface register
#define USB_CFGINTERFACE18 (BASE_USBDEVICE+0X074) // ;cfg_interface register
#define USB_CFGINTERFACE19 (BASE_USBDEVICE+0X078) // ;cfg_interface register
#define USB_CFGINTERFACE20 (BASE_USBDEVICE+0X07c) // ;cfg_interface register
#define USB_CFGINTERFACE21 (BASE_USBDEVICE+0X080) // ;cfg_interface register
#define USB_CFGINTERFACE22 (BASE_USBDEVICE+0X084) // ;cfg_interface register
#define USB_CFGINTERFACE23 (BASE_USBDEVICE+0X088) // ;cfg_interface register
#define USB_CFGINTERFACE24 (BASE_USBDEVICE+0X08c) // ;cfg_interface register
#define USB_CFGINTERFACE25 (BASE_USBDEVICE+0X090) // ;cfg_interface register
#define USB_CFGINTERFACE26 (BASE_USBDEVICE+0X094) // ;cfg_interface register
#define USB_CFGINTERFACE27 (BASE_USBDEVICE+0X098) // ;cfg_interface register
#define USB_CFGINTERFACE28 (BASE_USBDEVICE+0X09c) // ;cfg_interface register
#define USB_CFGINTERFACE29 (BASE_USBDEVICE+0X0A0) // ;cfg_interface register
#define USB_CFGINTERFACE30 (BASE_USBDEVICE+0X0A4) // ;cfg_interface register
#define USB_CFGINTERFACE31 (BASE_USBDEVICE+0X0A8) // ;cfg_interface register
#define USB_PKTPASSEDCTRL (BASE_USBDEVICE+0X0AC) // ;@valid register aera
#define USB_PKTDROPPEDCTRL (BASE_USBDEVICE+0X0B0) // ;@valid register aera
#define USB_CRCERRCTRL (BASE_USBDEVICE+0X0B4) // ;@valid register aera
#define USB_BITSTUFFERRCTRL (BASE_USBDEVICE+0X0B8) // ;@valid register aera
#define USB_PIDERRCTRL (BASE_USBDEVICE+0X0BC) // ;@valid register aera
#define USB_FRAMINGERrCTRL (BASE_USBDEVICE+0X0C0) // ;@valid register aera
#define USB_TXPKTCTRL (BASE_USBDEVICE+0X0C4) // ;@valid register aera
#define USB_STATCTRLOV (BASE_USBDEVICE+0X0C8) // ;@valid register aera
#define USB_TXLENGTH (BASE_USBDEVICE+0X0CC)
#define USB_RXLENGTH (BASE_USBDEVICE+0X0D0)
#define USB_RESUME (BASE_USBDEVICE+0X0D4)
#define USB_READFLAG (BASE_USBDEVICE+0X0D8)
#define USB_RECEIVETYPE (BASE_USBDEVICE+0X0DC)
#define USB_APPLOCK (BASE_USBDEVICE+0X0E0)
#define USB_EP0OUTADDR (BASE_USBDEVICE+0X100) // ;@ep0out register
#define USB_EP0OUTBMATTR (BASE_USBDEVICE+0X104) // ;@ep0out register
#define USB_EP0OUTMAXPKTSIZE (BASE_USBDEVICE+0X108) // ;@ep0out register
#define USB_EP0OUTIFNUM (BASE_USBDEVICE+0X10C) // ;@ep0out register
#define USB_EP0OUTSTAT (BASE_USBDEVICE+0X110) // ;@ep0out register
#define USB_EP0OUTBMREQTYPE (BASE_USBDEVICE+0X114) // ;@ep0out register
#define USB_EP0OUTBREQUEST (BASE_USBDEVICE+0X118) // ;@ep0out register
#define USB_EP0OUTWVALUE (BASE_USBDEVICE+0X11C) // ;@ep0out register
#define USB_EP0OUTWINDEX (BASE_USBDEVICE+0X120) // ;@ep0out register
#define USB_EP0OUTWLENGTH (BASE_USBDEVICE+0X124) // ;@ep0out register
#define USB_EP0OUTSYNCHFRAME (BASE_USBDEVICE+0X128) // ;@ep0out register
#define USB_EP1INADDR (BASE_USBDEVICE+0X12C) // ;@ep0out register
#define USB_EP1INBMATTR (BASE_USBDEVICE+0X130) // ;@ep0out register
#define USB_EP1INMAXPKTSIZRE (BASE_USBDEVICE+0X134) // ;@ep0out register
#define USB_EP1INIFNUM (BASE_USBDEVICE+0X138) // ;@ep0out register
#define USB_EP1INSTAT (BASE_USBDEVICE+0x13C) // ;@ep0out register
#define USB_EP1INBMREQTYPE (BASE_USBDEVICE+0X140) // ;@ep0out register
#define USB_EP1INBREQUEST (BASE_USBDEVICE+0X144) // ;@ep0out register
#define USB_EP1INWVALUE (BASE_USBDEVICE+0X148) // ;@ep0out register
#define USB_EP1INWINDEX (BASE_USBDEVICE+0X14C) // ;@ep0out register
#define USB_EP1INWLENGTH (BASE_USBDEVICE+0X150) // ;@ep0out register
#define USB_EP1INSYNCHFRAME (BASE_USBDEVICE+0X154) // ;@ep0out register
#define USB_EP1OUTADDR (BASE_USBDEVICE+0X158) // ;@ep1out register
#define USB_EP1OUTBMATTR (BASE_USBDEVICE+0X15C) // ;@ep1out register
#define USB_EP1OUTMAXPKTSIZE (BASE_USBDEVICE+0X160) // ;@ep1out register
#define USB_EP1OUTIFNUM (BASE_USBDEVICE+0X164) // ;@ep1out register
#define USB_EP1OUTSTAT (BASE_USBDEVICE+0X168) // ;@ep1out register
#define USB_EP1OUTBMREQTYPE (BASE_USBDEVICE+0X16C) // ;@ep1out register question?
#define USB_EP1OUTBREQUEST (BASE_USBDEVICE+0X170) // ;@ep1out register question?
#define USB_EP1OUTWVALUE (BASE_USBDEVICE+0X174) // ;@ep1out register question?
#define USB_EP1OUTWINDEX (BASE_USBDEVICE+0X178) // ;@ep1out register question?
#define USB_EP1OUTWLENGTH (BASE_USBDEVICE+0X17C) // ;@ep1out register question?
#define USB_EP1OUTSYNCHFRAME (BASE_USBDEVICE+0X180) // ;@ep1out register question?
#define USB_EP2INADDR (BASE_USBDEVICE+0x2c+0X158) // ;@ep1out register
#define USB_EP2INBMATTR (BASE_USBDEVICE+0x2c+0X15C) // ;@ep1out register
#define USB_EP2INMAXPKTSIZE (BASE_USBDEVICE+0x2c+0X160) // ;@ep1out register
#define USB_EP2INIFNUM (BASE_USBDEVICE+0x2c+0X164) // ;@ep1out register
#define USB_EP2INSTAT (BASE_USBDEVICE+0x2c+0X168) // ;@ep1out register
#define USB_EP2INBMREQTYPE (BASE_USBDEVICE+0x2c+0X16C) // ;@ep1out register question?
#define USB_EP2INBREQUEST (BASE_USBDEVICE+0x2c+0X170) // ;@ep1out register question?
#define USB_EP2INWVALUE (BASE_USBDEVICE+0x2c+0X174) // ;@ep1out register question?
#define USB_EP2INWINDEX (BASE_USBDEVICE+0x2c+0X178) // ;@ep1out register question?
#define USB_EP2INWLENGTH (BASE_USBDEVICE+0x2c+0X17C) // ;@ep1out register question?
#define USB_EP2INSYNCHFRAME (BASE_USBDEVICE+0x2c+0X180) // ;@ep1out register question?
#define USB_EP2OUTADDR (BASE_USBDEVICE+0x58+0X158) // ;@ep1out register
#define USB_EP2OUTBMATTR (BASE_USBDEVICE+0x58+0X15C) // ;@ep1out register
#define USB_EP2OUTMAXPKTSIZE (BASE_USBDEVICE+0x58+0X160) // ;@ep1out register
#define USB_EP2OUTIFNUM (BASE_USBDEVICE+0x58+0X164) // ;@ep1out register
#define USB_EP2OUTSTAT (BASE_USBDEVICE+0x58+0X168) // ;@ep1out register
#define USB_EP2OUTBMREQTYPE (BASE_USBDEVICE+0x58+0X16C) // ;@ep1out register question?
#define USB_EP2OUTBREQUEST (BASE_USBDEVICE+0x58+0X170) // ;@ep1out register question?
#define USB_EP2OUTWVALUE (BASE_USBDEVICE+0x58+0X174) // ;@ep1out register question?
#define USB_EP2OUTWINDEX (BASE_USBDEVICE+0x58+0X178) // ;@ep1out register question?
#define USB_EP2OUTWLENGTH (BASE_USBDEVICE+0x58+0X17C) // ;@ep1out register question?
#define USB_EP2OUTSYNCHFRAME (BASE_USBDEVICE+0x58+0X180) // ;@ep1out register question?
#define USB_TXFIFO (BASE_USBDEVICE+0X300) //;@ data to host
#define USB_RXFIFO (BASE_USBDEVICE+0X200) //;@ data to device
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