hardware_gfd.h

基于一款32位嵌入式微处理器的USB接口的测试代码

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;
;  (c) 2004 ASIC,all rights reserved
;         
;           
;	This source code and any compilation or derivative thereof 
;is proprietary information and is confidential in nature.
;	Under no circumstance is this software to be exposed or placed
;under an open source License of any type without expressed
;written permission of ASIC.  
;
;filename:	gfd_usb_hl.c          
;history:
;
;    Version         Date            Author            Comments
;------------------------------------------------------------------------------------    
;     1.0          2004.9.24           lmq             Initial Creation
;     
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
    


R_RETURN		RN		r0             ; //with some problem,depend on the compiler,the gcc cmpiler,single return value is r0

		
		;#define R_SWI_ARGS_1		r12
		;#define R_SWI_ARGS_2		r13
		;#define R_SWI_ARGS_3		r14
		;#define R_SWI_ARGS_4		r15


RTA			RN		r4
RTB			RN		r5
RTC			RN		r6
RLA			RN		r7
RLB			RN		r8
RLC			RN		r9
RLD			RN		r10
RVA			RN		r11
RVB			RN		r12
RVC			RN		r13

;RTA		RN		r2
;RTB		RN		r3
;RTC		RN		r4
;RLA		RN		r5
;RLB		RN		r8
;RLC		RN		r9
;RLD		RN		r10
;RVA		RN		r6
;RVB		RN		r7
;RVC		RN		r11

             

		;///LC 2002 4 11
		;///#define R_OS_1			r12
		;///#define  R_OS_2			r13

R_ALL_0_12	 	RLIST	{ r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12 }             
;R_ALL_16_28	RN		r0                                                                  
		
		
;//******************************************************
;//*define the onchip register of GFD
;//*******************************************************
;//begin
SP_SVC			EQU		0X30FFF7F0
SP_USR			EQU		0X30FFF7F4
SP_SYS			EQU		0X30FFF7F8
SP_IRQ			EQU		0X30FFFBF8
SP_FIQ			EQU		0X30FFFFF8
SP_UND			EQU		0X30FFFFFC
SP_ABT			EQU		0X31000000



;THE register OF INTC
BASE_INTC		EQU		0x10000000  ;BASE ADDRESS OF INTC
INTC_EN			EQU		BASE_INTC+0X0  
INTC_MSK		EQU		BASE_INTC+0X8  
INTC_FC			EQU		BASE_INTC+0X10 
INTC_RWSTS		EQU		BASE_INTC+0X18 
INTC_STS        EQU		BASE_INTC+0X20 
INTC_MSKSTS     EQU		BASE_INTC+0X28 
INTC_FNLSTS     EQU		BASE_INTC+0X30 
INTC_PLV        EQU		BASE_INTC+0XD8 
                                       
INTC_EN_FIQ     EQU		BASE_INTC+0XC0 
INTC_MSK_FIQ    EQU		BASE_INTC+0XC4 
INTC_FC_FIQ     EQU		BASE_INTC+0XC8 
INTC_RWSTS_FIQ  EQU		BASE_INTC+0XCC 
INTC_STS_FIQ    EQU		BASE_INTC+0XD0 
INTC_FNL_FIQ    EQU		BASE_INTC+0XD4 





LAB_GPT		EQU		1
LAB_KBC 	EQU		2
;//******************************************************
;//*define the onchip register of GFD
;//*******************************************************
;//end

;******************************************************
;DEFINE THE INTERRUPT SOURCE  BEGIN
;******************************************************      
INTSRC_RTC  			EQU		0X80000000   	 ;//31      15                                          
INTSRC_DMA          	EQU  	0X40000000		 ;//30      14    
INTSRC_EMI         		EQU 	0X20000000		 ;//29      13 
INTSRC_GPT        		EQU 	0X10000000		 ;//28      12
INTSRC_USB      		EQU 	0X08000000		 ;//27      11
INTSRC_SPI      		EQU 	0X04000000 		 ;//26      10
INTSRC_MMC        		EQU 	0X02000000		 ;//25       9
INTSRC_UART1         	EQU 	0X01000000		 ;//24       8
INTSRC_UART2        	EQU 	0X00800000		 ;//23       7
INTSRC_I2C         		EQU 	0X00400000		 ;//22       6
INTSRC_AC97          	EQU 	0X00200000		 ;//21       5
INTSRC_MMA     			EQU 	0X00100000		 ;//20       4
INTSRC_EXTINT17     	EQU 	0X00080000		 ;//19       3
INTSRC_EXTINT16         EQU 	0X00040000 		 ;//18       2
INTSRC_EXTINT15   		EQU 	0X00020000		 ;//17  	 1      
;OFF1'B0               		EQU  	0X00010000		 ; ,    //16  		0	        
INTSRC_EXTINT0          EQU 	0X00008000 		 ;//15      			    
INTSRC_EXTINT1          EQU 	0X00004000		 ;//14      			    
INTSRC_EXTINT2          EQU 	0X00002000 		 ;//13      			    
INTSRC_EXTINT3          EQU 	0X00001000 		 ;//12      			    
INTSRC_EXTINT4          EQU 	0X00000800		 ;//11      			    
INTSRC_EXTINT5          EQU 	0X00000400 		 ;//10      			    
INTSRC_EXTINT6          EQU 	0X00000200		 ;//9       			    
INTSRC_EXTINT7          EQU 	0X00000100		 ;//8       			    
INTSRC_EXTINT8          EQU 	0X00000080		 ;//7       			    
INTSRC_EXTINT9          EQU 	0X00000040		 ;//6       			    
INTSRC_EXTINT10         EQU 	0X00000020		 ;//5       			    
INTSRC_EXTINT11         EQU 	0X00000010		 ;//4       			    
INTSRC_EXTINT12         EQU 	0X00000008		 ;//3       			    
INTSRC_EXTINT13         EQU 	0X00000002 		 ;//2       			    
INTSRC_EXTINT14         EQU 	0X00000001 		 ;//1             			    
                         
;