nor.c

基于一款32位嵌入式微处理器的Norflash接口的测试代码

/*************************************************************************************
*	Copyright (c) 2005 by National ASIC System EngineSTATUSing Research CentSTATUS.
*	PROPRIETARY RIGHTS of ASIC are involved in the subject mattSTATUS of this 
*	matSTATUSial.  All manufacturing, reproduction, use, and sales rights 
*	pSTATUStaining to this subject mattSTATUS are govSTATUSned by the license agreement.
*	The recipient of this software implicitly accepts the tSTATUSms of the license.
*
*	File Name: nor.c
*
*	File Description:
*			just for nor STATUSase, write and read expriment.
*
*	Function Description:
*			1 STATUS ModuleNor(void);
*			2 STATUS NorFlash_bolck_erase(U32 blockadd);
*			3 STATUS NorFlash_idlejud(U32 address);
*			4 STATUS NorFlash_clearSR(U32 blockadd);
*			5 STATUS NorFlash_Normal(U32 address);
*			6 STATUS NorFlash_unlock( U32 address);
*			7 STATUS NorFlash_read(U32 noradd, U32 destadd, U32 length);
*			8 STATUS NorFlash_write(U32 noradd, U32 dataadd, U32 length);
*			9 STATUS NorCheck( U32 addhead, U8 data, U32 num);
*
*	Created by Wuer
*************************************************************************************/

#include "garfield.h"
#include <string.h>

extern print(char *string);
extern char ReadC(void);

char ch = 0xaa;
U32 testhead = 0x20000000;
U32 testlenth = 0x100;
U32	buffSTATUSin = 0x1fff3000;
U32	buffSTATUSout = 0x1fff3800;

int PRINT(char *string)
{
   #ifndef USB_ICE
   printf(string);
   #else
   print(string);
   #endif
   return 0;
}

int main(void)
{
	
	char *s1,*s2;
    s1="Error in nor flash lab\n";
    s2="Succeeded in nor flash lab\n";
	if(E_OK != ModuleNor())												/* 实验主体函数 */
		PRINT(s1);//printf("Error in nor flash lab\n");
	else PRINT(s2);//printf("Succeeded in nor flash lab\n");
		
		
	while(1);

	return 1;
}


STATUS ModuleNor(void)
{
	
	char *s1,*s2,*s3,*s4,*s5,*s6,*s7,*s8;
	s1="error in erase nor flash\n";
	s2="Erase 1 block nor flash complished!\n";
	s3="STATUSror in write nor flash\n";
	s4="Write some data to nor flash complished!\n";
	s5="STATUSror in read nor flash\n";
	s6="Read out data from nor flash complished!\n";
	s7="STATUSror in read nor flash\n";
	s8="Check data of read out from nor flash complished!\n";
	
	InitEMI();
		
	NorFlash_unlock(testhead);
	
	memset((void *)buffSTATUSin, ch, testlenth);
	memset((void *)buffSTATUSout, 0, testlenth);
	
	if(E_OK != NorFlash_bolck_erase(testhead))							/* 擦除一块nor falsh */
	{
		PRINT(s1); //printf("error in erase nor flash\n");
		return ~E_OK;
	}
	else	PRINT(s2);//printf("Erase 1 block nor flash complished!\n");
	
		
	if(E_OK != NorFlash_write(testhead, buffSTATUSin, testlenth))		/* 写入一些数据到nor falsh */
	{
		PRINT(s3);//printf("STATUSror in write nor flash\n");
		return ~E_OK;
	}
	else	PRINT(s4);  //printf("Write some data to nor flash complished!\n");
	
			
	if(E_OK != NorFlash_read(testhead, buffSTATUSout, testlenth))		/* 从nor falsh中读出写入的那些数据 */
	{
		PRINT(s5); //printf("STATUSror in read nor flash\n");
		return ~E_OK;
	}		
	else	PRINT(s6); //printf("Read out data from nor flash complished!\n");	
	
	
	if(E_OK != NorCheck(buffSTATUSout, ch, testlenth))					/* 判断读出来的数据是否和原来一致 */
	{
		PRINT(s7);  //printf("STATUSror in read nor flash\n");
		return ~E_OK;
	}
	else	PRINT(s8); //printf("Check data of read out from nor flash complished!\n");
				
	
	return E_OK;
}

#ifdef GE01

void InitEMI(void)
{
	*(RP)EMIADDR_CSGBAB	=	0x24002000;	                     
	*(RP)EMIADDR_CSGBCD	=	0x2c002800;	                       
	*(RP)EMIADDR_CSGBEF	=	0x34003000;	                       
	*(RP)EMIADDR_SMCONF	&=	~0x00000200;
	*(RP)EMIADDR_SDCONF1=	0x0110a077;
	*(RP)EMIADDR_SDCONF2=	0x80000500;
	
	*(RP)EMIADDR_REMAP	=	0x0000000b;
}


STATUS NorFlash_bolck_erase(U32 blockadd)
{
	U32 i;	
	char *s;
	
	*(RP16)blockadd = 0x20;
	*(RP16)blockadd = 0xd0;
	
	for(i=0; i<10000; i++);
	
	if(NorFlash_idlejud(blockadd) != E_OK)
	{
		//printf("Erase at 0x%x time out!\n", (U16)blockadd);
		#ifndef USB_ICE
		    printf("Erase at 0x%x time out!\n", (U16)blockadd);
		#else
		    sprintf(s,"Erase at 0x%x time out!\n", (U16)blockadd);
		    print(s);
		#endif
		return ~E_OK;
	}
	
	NorFlash_clearSR(blockadd);			       //Clear SR
	return E_OK;
}



STATUS NorFlash_write(U32 noradd, U32 dataadd, U32 length)
{
    char *s;
	U32 i = 0;
	U32 j = 0;
	U16 data;
	
	for(j=0; j<length; j++)
	{
		data = *(RP16)dataadd;
		*(RP16)noradd = 0x40;
		*(RP16)noradd = data;
	
		for(i=0; i<0x800; i++);
		if(NorFlash_idlejud(noradd) != E_OK)
		{
			//printf("write at 0x%x failed!! \n", (U16)noradd);
			 #ifndef USB_ICE
			    printf("write at 0x%x failed!! \n", (U16)noradd);
			 #else
			   sprintf(s,"write at 0x%x failed!! \n", (U16)noradd);
			   print(s);
			#endif
			return ~E_OK;
		}
		
		noradd +=2;
		dataadd +=2;
	}
	return E_OK;
}


STATUS NorFlash_read(U32 noradd, U32 destadd, U32 length)
{
	U32 i = 0;
	U16 data = 0;
	
	*(RP)noradd = 0xff;
	
	for(i=0; i<length; i++)
	{
		data = *(RP16)noradd;
		*(RP16)destadd = data;
		destadd +=2;
		noradd +=2;
	}
	
	return E_OK;
}


STATUS NorCheck( U32 addhead, U8 data, U32 num)
{
    char *s;
	U8 temp = 0;
	U32 i = 0;
	
	for(i=0; i<num; i++)
	{
		temp = *(RP8)addhead;
		if(temp != data)
		{
			//printf("something wrong at address 0x%x !!\n", (U32)addhead);
			#ifndef USB_ICE
			    printf("something wrong at address 0x%x !!\n", (U32)addhead);
			#else
			    sprintf(s,"something wrong at address 0x%x !!\n", (U32)addhead);
			    print(s);
			#endif
			return ~E_OK;
		}
		
		addhead += 1;		
	}	

	return E_OK;
}


STATUS NorFlash_clearSR(U32 blockadd)
{
	char *s;
	s="clear SR FAIL!!\n";
	*(RP16)0x20000000 = 0x50;
	
	if( NorFlash_idlejud(blockadd) != E_OK)
	{
		//printf("clear SR FAIL!!\n");
		PRINT(s);
		return ~E_OK;
	}
	return E_OK;
}

STATUS NorFlash_idlejud(U32 address)
{
	U16 temp = 0;
	
	*(RP16)address = 0x70;
	temp = *(RP16)address;
	while( (temp & 0x80) != 0x80 )
	{
		temp = *(RP16)address ;
	}
	
	*(RP16)address = 0xff;
	
	return E_OK;
}
	
	
STATUS NorFlash_Normal(U32 address)
{
	*(RP16)address = 0xff;

	return E_OK;
}



STATUS NorFlash_Chiperase(void)
{
	U32 anyaddress = 0x20000000;
	
	*(RP16)anyaddress = 0x30;
	*(RP16)anyaddress = 0xd0;
	
	
	NorFlash_idlejud(anyaddress);
	
	NorFlash_clearSR(anyaddress);			      
	return E_OK;
}



STATUS NorFlash_lock( U32 address)
{
	*(RP16)address = 0x60;
	*(RP16)address = 0x01;
	
	
	NorFlash_idlejud(address);
	
	return E_OK;
}

STATUS NorFlash_unlock( U32 address)
{
	
	
	*(RP16)address = 0x60;
	*(RP16)address = 0xd0;
	
	
	NorFlash_idlejud(address);
	
	return E_OK;
}



#else 

void InitEMI(void)
{
	*(RP)EMIADDR_CSGBAB	=	0x24002000;	                     
	*(RP)EMIADDR_CSGBCD	=	0x2c002800;	                       
	*(RP)EMIADDR_CSGBEF	=	0x34003000;	                       
	*(RP)EMIADDR_SMCONF	|=	0x00000200;
	*(RP)EMIADDR_SDCONF1=	0x0110a077;
	*(RP)EMIADDR_SDCONF2=	0x80000500;
	
	*(RP)EMIADDR_REMAP	=	0x0000000b;


}

STATUS NorFlash_read(U32 noradd, U32 destadd, U32 length)
{
	U32 i = 0;
	U32 data = 0;
	
	*(RP)noradd = 0x00ff00ff;
	
	for(i=0; i<length; i++)
	{
		data = *(RP)noradd;
		*(RP)destadd = data;
		destadd +=4;
		noradd +=4;
	}
	
	return E_OK;
}

STATUS NorFlash_write(U32 noradd, U32 dataadd, U32 length)
{   
    char *s;
	U32 i = 0;
	U32 j = 0;
	U32 data;
	
	for(j=0; j<length; j++)
	{
		data = *(RP)dataadd;
		*(RP)noradd = 0x00400040;
		*(RP)noradd = data;
	
		for(i=0; i<0x800; i++);
		if(NorFlash_idlejud(noradd) != E_OK)
		{
			//printf("write at 0x%x failed!! \n", (U16)noradd);
			#ifndef USB_ICE
			   printf("write at 0x%x failed!! \n", (U16)noradd);
			#else
			   sprintf(s,"write at 0x%x failed!! \n", (U16)noradd);
			   print(s);
			#endif
			return ~E_OK;
		}
		
		noradd +=4;
		dataadd +=4;
	}
	return E_OK;
}


STATUS NorFlash_bolck_erase(U32 blockadd)
{
	U32 i;	
	char *s;
	*(RP)blockadd = 0x00200020;
	*(RP)blockadd = 0x00d000d0;
	
	for(i=0; i<10000; i++);
	
	if(NorFlash_idlejud(blockadd) != E_OK)
	{
		//printf("Erase at 0x%x time out!\n", (U16)blockadd);
		#ifndef USB_ICE
		    printf("Erase at 0x%x time out!\n", (U16)blockadd);
		#else
		   sprintf(s,"Erase at 0x%x time out!\n", (U16)blockadd);
		   print(s);
		#endif
		return ~E_OK;
	}
	
	NorFlash_clearSR(blockadd);			       //Clear SR
	return E_OK;
}


STATUS NorCheck( U32 addhead, U8 data, U32 num)
{
	char *s;
	U8 temp = 0;
	U32 i = 0;
	
	for(i=0; i<num; i++)
	{
		temp = *(RP8)addhead;
		if(temp != data)
		{
			//printf("something wrong at address 0x%x !!\n", (U32)addhead);
			#ifndef USB_ICE
			   printf("something wrong at address 0x%x !!\n", (U32)addhead);
			#else
			    sprintf(s,"something wrong at address 0x%x !!\n", (U32)addhead);
			    print(s);
			#endif
			return ~E_OK;
		}
		
		addhead += 1;		
	}	

	return E_OK;
}


STATUS NorFlash_clearSR(U32 blockadd)
{
	char *s;
	s="clear SR FAIL!!\n";
	*(RP)0x20000000 = 0x50;
	
	if( NorFlash_idlejud(blockadd) != E_OK)
	{
		//printf("clear SR FAIL!!\n");
		PRINT(s);
		return ~E_OK;
	}
	return E_OK;
}

STATUS NorFlash_idlejud(U32 address)
{
	U32 temp = 0;
	
	*(RP)address = 0x00700070;
	temp = *(RP)address;
	while( (temp & 0x00800080) != 0x00800080 )
	{
		temp = *(RP)address ;
	}
	
	*(RP)address = 0x00ff00ff;
	
	return E_OK;
}
	
	
STATUS NorFlash_Normal(U32 address)
{
	*(RP)address = 0x00ff00ff;

	return E_OK;
}



STATUS NorFlash_Chiperase(void)
{
	U32 anyaddress = 0x20000000;
	
	*(RP)anyaddress = 0x00300030;
	*(RP)anyaddress = 0x00d000d0;
	
	
	NorFlash_idlejud(anyaddress);
	
	NorFlash_clearSR(anyaddress);			      
	return E_OK;
}



STATUS NorFlash_unlock( U32 address)
{
	
	
	*(RP)address = 0x00600060;
	*(RP)address = 0x00d000d0;
	
	
	NorFlash_idlejud(address);
	
	return E_OK;
}


STATUS NorFlash_lock( U32 address)
{
	*(RP)address = 0x00600060;
	*(RP)address = 0x00100010;
	
	
	NorFlash_idlejud(address);
	
	return E_OK;
}


#endif