dma.h

基于一款32位嵌入式微处理器的DMAIP的测试代码

/*************************************************************************************
*	Copyright (c) 2005 by National ASIC System Engineering Research Center.
*	PROPRIETARY RIGHTS of ASIC are involved in the subject matter of this 
*	material.  All manufacturing, reproduction, use, and sales rights 
*	pertaining to this subject matter are governed by the license agreement.
*	The recipient of this software implicitly accepts the terms of the license.
*
*	File Name: rtc.h
*
*	File Description:
*			The file define some macro definition used in rtc.c file.
*		
*	Created by Wuer
**************************************************************************************/
#ifndef DMA_H
#define DMA_H

#include "typedef.h"

/**************************************                         
	define some macros
****************************************/
#define		DMASouraddInc			1
#define		DMADstaddInc			1

#define		DMAMEM					0
#define		DMAUSB					0b1
#define		DMAAC97					0b100
#define		DMASPI					0b0101
#define		DMANAND					0b0110
#define		DMAMMC					0b0111

#define		DMAControl				0
#define		DMAFinishIntOff			1
#define		DMAErrorIntOff			1

#define		DMAMtoM					0
#define		DMAMtoOther				1
#define		DMAOthertoM				2

#define		DMAEnable				1


/**************************************                         
	define DMA registers
****************************************/
#define 	DMACbase				0x11000000
#define 	DMACIntStatus			(DMACbase+0x1020) 			//Read
#define 	DMACIntTCStatus			(DMACbase+0x1050) 			//Read
#define 	DMACIntTCClear			(DMACbase+0x1060) 			//Write
#define 	DMACRawIntTCStatus		(DMACbase+0x1070) 			//Read
#define 	DMACIntErrorStatus		(DMACbase+0x1080) 			//Read
#define 	DMACIntErrClr			(DMACbase+0x1090) 			//Write
#define 	DMACRawIntErrorStatus	(DMACbase+0x10a0) 			//Read
#define 	DMACEnbldChns			(DMACbase+0x10B0) 			//Read;  Indicate which channel can be used;
#define		ADDRESS_CONFIGURATION 	(DMACbase+0x10C0)
   
#define 	DMACC0SrcAddr			(DMACbase+0x1000)			//DMA channel 0 registers;
#define 	DMACC0DestAddr			(DMACbase+0x1004)
#define 	DMACC0Control			(DMACbase+0x100c)
#define 	DMACC0Configuration		(DMACbase+0x1010)
#define 	DMACC1SrcAddr			(DMACbase+0x1100)			//DMA channel 1 registers;   R/W
#define 	DMACC1DestAddr			(DMACbase+0x1104)
#define 	DMACC1Control			(DMACbase+0x110c)
#define 	DMACC1Configuration		(DMACbase+0x1110)
#define 	DMACC2SrcAddr			(DMACbase+0x1200)			//DMA channel 2 registers;   R/W
#define 	DMACC2DestAddr			(DMACbase+0x1204)
#define 	DMACC2Control			(DMACbase+0x120c)
#define 	DMACC2Configuration		(DMACbase+0x1210)
#define 	DMACC3SrcAddr			(DMACbase+0x1300)			//DMA channel 3 registers;   R/W
#define 	DMACC3DestAddr			(DMACbase+0x1304)
#define 	DMACC3Control			(DMACbase+0x130c)
#define 	DMACC3Configuration		(DMACbase+0x1310)
#define 	DMACC4SrcAddr			(DMACbase+0x1400)			//DMA channel 4 registers;   R/W
#define 	DMACC4DestAddr			(DMACbase+0x1404)
#define 	DMACC4Control			(DMACbase+0x140c)
#define 	DMACC4Configuration		(DMACbase+0x1410)
#define 	DMACC5SrcAddr			(DMACbase+0x1500)			//DMA channel 5 registers;   R/W
#define 	DMACC5DestAddr			(DMACbase+0x1504)
#define 	DMACC5Control			(DMACbase+0x150c)
#define 	DMACC5Configuration		(DMACbase+0x1510)

/**************************************                         
	Declarations of DMA functions 
****************************************/
STATUS DMA_M_M(void);
STATUS DMA_M_O(void);
void InitDma(void); 
STATUS DmaTransMtoM(U32 srcadd, U32 destadd, U32 srcwidth, U32 destwidth, U32 burstsize, U32 sum);
STATUS DMAAPB(U32 sourceadd, U32 destadd, U32 source, U32 dest, U32 dmaccontrol, U32 srcwidth, U32 destwidth, U32 burstsize, U32 sum);
STATUS check(U32 head1, U32 head2, U32 num);
void clear(U32 head, U32 num);
void DataDefine(U32 head, char data, U32 num);

#endif