📄 ac97.c
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/*************************************************************************************
* Copyright (c) 2005 by National ASIC System Engineering Research Center.
* PROPRIETARY RIGHTS of ASIC are involved in the subject matter of this
* material. All manufacturing, reproduction, use, and sales rights
* pertaining to this subject matter are governed by the license agreement.
* The recipient of this software implicitly accepts the terms of the license.
*
* File Name: ac97.c
*
* File Description:
* The file includes three functions to initialize the lcd controller and
* display some pictures on the lcd.
*
* Function Description:
* STATUS ModuleAc97(void)
* The top function of AC97 experiment.
*
* Created by Michael <yuyu_zh@seu.edu.cn>, 2005-03-31
**************************************************************************************/
#include "garfield.h"
#define REPEAT
int count = 1;
U32 framebase = 0x30500000;
int main(void)
{
char *s;
s="error in rtc lab\n";
if(E_OK != ModuleAc97()){
#ifndef USB_ICE
printf("error in rtc lab\n");
#else
print(s);
#endif
}
while(1);
return 1;
}
STATUS ModuleAc97(void)
{
/* system initialized */
system_init();
/* if need play mp3 repeatly, open rtc interrrupt mask */
#ifdef REPEAT
unmask_irq(INT_DMA);
#endif
InitAC97();
ConfigureDMA();
return E_OK;
}
void ConfigurationCodec(int i)
{
//_________________________________________________________________
//**********open Master Volume Register,ADDR: 02H
*(RP)AC97_CRAC=WRITE+ 0x20000 + 0x1010; //0dB attenuation
do{}while(!OVER_WRITE);
//_________________________________________________________________
//**********open Master Volume MONO,ADDR:06H
// *(RP)AC97_CRAC=WRITE + 0x60000 + 0x0; //0dB attenuation
// do{}while(!OVER_WRITE);
//_________________________________________________________________
//*********open MIC Volume,ADDR:0eH
*(RP)AC97_CRAC=WRITE + 0xe0000 + 0x8; //0dB attenuation
do{}while(!OVER_WRITE);
//_________________________________________________________________
//*********open MIC Volume,ADDR:0eH
*(RP)AC97_CRAC=WRITE + 0x6a0000 + 0x50; //0dB attenuation
do{}while(!OVER_WRITE);
//________________________________________________________________
//********open Extend Audio Status and Control Register,ADDR:2AH
if(i)
{
*(RP)AC97_CRAC=WRITE + 0x2a0000 + 0x0; // fixed sample
do{}while(!OVER_WRITE);
}
else
{
*(RP)AC97_CRAC=WRITE + 0x2a0000 + 0x1; // VRA sample
do{}while(!OVER_WRITE);
//PCM DAC Rate,ADDR:2CH. For example :1b80:7040Hz
//*(RP)AC97_CRAC=WRITE +0x2c0000 + 0xbb80; //48kHz
*(RP)AC97_CRAC=WRITE +0x2c0000 + 0xac44; //44.1Khz
//*(RP)AC97_CRAC=WRITE +0x2c0000 + 0x7d00; //32Khz
//*(RP)AC97_CRAC=WRITE +0x2c0000 + 0x5dc0; //24hz
//*(RP)AC97_CRAC=WRITE +0x2c0000 + 0x5622; //22hz
//*(RP)AC97_CRAC=WRITE +0x2c0000 + 0x3e80; //16hz
//*(RP)AC97_CRAC=WRITE +0x2c0000 + 0x1f40; //8Khz
do{}while(!OVER_WRITE);
//PCM ADC Rate,ADDR:32H. For example :1b80:7040Hz
//*(RP)AC97_CRAC=WRITE +0x320000 + 0xbb80; //48kHz
*(RP)AC97_CRAC=WRITE +0x320000 + 0xac44; //44.1Khz
//*(RP)AC97_CRAC=WRITE +0x320000 + 0x7d00; //32Khz
//*(RP)AC97_CRAC=WRITE +0x320000 + 0x5dc0; //24hz
//*(RP)AC97_CRAC=WRITE +0x320000 + 0x5622; //22hz
//*(RP)AC97_CRAC=WRITE +0x320000 + 0x3e80; //16hz
//*(RP)AC97_CRAC=WRITE +0x320000 + 0x1f40; //8Khz
do{}while(!OVER_WRITE);
}
}
void ConfigurationAC97(int type)
{
if (type)
{
*(RP)AC97_OCR=0x00010001; //open L/R channel,and set fixed sample rate
*(RP)AC97_ICR=0x00000000; //open Input channel,and set fixed sample rate
}
else
{
*(RP)AC97_OCR=0x00030003; //open L/R channel,and set variable sample rate
*(RP)AC97_ICR=0x00000000; //open Input channel,and set variable sample rate
}
//_________________________________________________________________
//**********configure the register INT_ENABLE
*(RP)AC97_INT_ENABLE=0xbf; //open all the interrupt
//_________________________________________________________________
//**********configure the register AC97_ENABLE for open modual AC97
*(RP)AC97_ENABLE=0x1;
return ;
}
void ConfigureDMA(void)
{
*(RP)DMA_SA=(U32)framebase;
*(RP)DMA_DA=AC97_OUT_FIFOADDR;
*(RP)DMA_CTRL=0x03ffd4ad; //modified for future
*(RP)DMA_ENABLE=0x2003;
return ;
}
void InitAC97(void)
{
//_________________________________________________________________
//*********Reset AC97
*(RP)AC97_CONR=0X3;
//_________________________________________________________________
//**********Reset Codec
*(RP)AC97_CRAC=WRITE + 0x0 + 0x1;
do{}while(!OVER_WRITE);
//_________________________________________________________________
//************configure Codec,
//Note: first configure Codec,then AC97;
ConfigurationCodec(VRA_SAMPLE);
ConfigurationAC97(VRA_SAMPLE);
//_________________________________________________________________
//**********configure the register INT_CLEAR
if (*(RP)AC97_INT_STATUS!=0x0)
{
*(RP)AC97_INT_CLEAR=0x1; //after writing in INT_CLEAR,INT_STATUS must be zero
}
}
void dma_handler(void)
{
*(RP)DMACIntTCClear=0X01;
*(RP)DMACIntTCClear=0X00;
if(count <= 34){
*(RP)DMA_SA=(U32)framebase + (count++)*0x3ffc;
*(RP)DMA_CTRL=0x03ffd4ad; //modified for future
*(RP)DMA_ENABLE=0x2003;
}
return ;
}
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