gei82543end.c

操作系统vxworks平台下end设备的驱动程序,支持多种芯片,支持多种cpu

    if (pDrvCtrl->pRxBufMem != NULL)
        {
        free (pDrvCtrl->pRxBufMem);
        }

    /* release RX mBlk pool */

    if (pDrvCtrl->pMclkArea != NULL)
        {
        cfree (pDrvCtrl->pMclkArea);
        }      

#ifndef INCLUDE_RFC_1213
    /* Free MIB-II entries */

    m2IfFree(pDrvCtrl->end.pMib2Tbl);
    pDrvCtrl->end.pMib2Tbl = NULL;

#endif /* INCLUDE_RFC_1213 */
 
    /* release netPool structure */

    if (pDrvCtrl->end.pNetPool != NULL)
        {
	    if (netPoolDelete(pDrvCtrl->end.pNetPool) != OK)
            {
            LOGMSG("netPoolDelete fails\n", 0,0,0,0,0,0);
            }
	    free ((char *)pDrvCtrl->end.pNetPool);
        }

    return;
    }

/*************************************************************************
*
* gei82543EndMemInit - allocate and initialize memory for driver
*
* This routine allocates and initializes memory for descriptors and 
* corresponding buffers, and sets up the receive data pool for receiving 
* packets. 
*
* RETURNS: OK or ERROR.
*/

LOCAL STATUS gei82543EndMemInit
    (
    END_DEVICE * pDrvCtrl    /* device to be initialized */
    )
    {
    M_CL_CONFIG geiMclBlkConfig; /* Mblk */
    CL_DESC     geiClDesc;      /* Cluster descriptor */
    UINT32      size;           /* required memory size */
    UINT32      tmpBase;        /* temporary memory base */
    UINT32      bufSz;          /* real cluster size */
    int         bufNum;         /* temp variable */

    DRV_LOG (DRV_DEBUG_LOAD, ("gei82543EndMemInit...\n"), 1, 2, 3, 4, 5, 6);

    /* set the default TX/RX descriptor Number */

    if (pDrvCtrl->txDescNum == 0)
        pDrvCtrl->txDescNum = DEFAULT_NUM_TXDES;

    if (pDrvCtrl->rxDescNum == 0)
        pDrvCtrl->rxDescNum = DEFAULT_NUM_RXDES;

    /* round up to multiple of 8, hardware requirement */

    pDrvCtrl->txDescNum = ROUND_UP_MULTIPLE(pDrvCtrl->txDescNum, 
                                           INTEL_82543GC_MULTIPLE_DES);

    pDrvCtrl->rxDescNum = ROUND_UP_MULTIPLE((UINT32)pDrvCtrl->rxDescNum, 
                                         (UINT32)INTEL_82543GC_MULTIPLE_DES);

    /* calculate reasonable receive buffer size */

    size = pDrvCtrl->mtu + GEI_DEFAULT_ETHERHEADER + ETHER_CRC_LENGTH;

    /* assume MRU is the same as MTU */

    pDrvCtrl->rxPktSz = size + pDrvCtrl->offset;   

    if (size > GEI_MAX_FRAME_SIZE)
        return ERROR;

    if (pDrvCtrl->usrFlags & GEI_END_JUMBO_FRAME_SUPPORT)
        {
        for (bufSz = 2048; bufSz <= 16384; bufSz = bufSz << 1)
             {           
             if (size <= bufSz)
                 {
                 pDrvCtrl->rxBufSize = bufSz;
                 break;
                 }
             }
        }
    else /* normal frame */
        {
        pDrvCtrl->rxBufSize = 2048;
        bufSz = size;
        }

    /* add cluster ID and offset */

    bufSz += (pDrvCtrl->offset + CL_OVERHEAD);

    bufNum = bufSz / GEI_DESC_ALIGN_BYTE;

    if (bufSz != (bufNum * GEI_DESC_ALIGN_BYTE))  
            bufSz = (bufNum + 1) * GEI_DESC_ALIGN_BYTE;

    if ((int)(pDrvCtrl->pMemBase) == NONE)
        {
        if (!CACHE_DMA_IS_WRITE_COHERENT () || 
            !CACHE_DMA_IS_READ_COHERENT ())
            {
            DRV_LOG (DRV_DEBUG_LOAD, ("gei82543EndMemInit: shared descriptor 
                     memory not cache coherent\n"), 1, 2, 3, 4, 5, 6);
            return ERROR;
            }

        size = pDrvCtrl->txDescNum * TXDESC_SIZE +   /* for TX descriptor */
               pDrvCtrl->rxDescNum * RXDESC_SIZE +   /* for RX descriptor */
               512;                                  /* alignment */
        
        /* alloc memory in driver */

        pDrvCtrl->pMemBase = cacheDmaMalloc (size);

        if (pDrvCtrl->pMemBase == NULL)      /* no memory available */
            {
            DRV_LOG (DRV_DEBUG_LOAD, ("gei82543EndMemInit: could not obtain 
                     memory\n"), 1, 2, 3, 4, 5, 6);
            return (ERROR);
            }

        pDrvCtrl->memSize = size;

        pDrvCtrl->memAllocFlag = TRUE;
        }
    else
        { 
       /* 
        * if user has provided a shared memory, we assume 
        * it is a cache safe area 
        */

        if (pDrvCtrl->usrFlags & GEI_END_USER_MEM_FOR_DESC_ONLY)
            {
            size = pDrvCtrl->txDescNum * TXDESC_SIZE + /* for TX descriptor */
                   pDrvCtrl->rxDescNum * RXDESC_SIZE + /* for RX descriptor */
                   512;
            }
        else
            {
            size = pDrvCtrl->txDescNum * TXDESC_SIZE + /* for TX descriptor */
                   pDrvCtrl->rxDescNum * RXDESC_SIZE + /* for RX descriptor */
                   pDrvCtrl->rxDescNum * bufSz *       /* for RX buffer */
                   (DEFAULT_LOAN_RXBUF_FACTOR + 1) +   /* for RX loan buffer */
                   1024;                               /* for alignment */
            }

        if (pDrvCtrl->memSize < size)
            {
            DRV_LOG (DRV_DEBUG_LOAD, ("GEI82543EndMemInit: not enough 
                                      memory\n"), 1, 2, 3, 4, 5, 6);
            return ERROR;
            }

        pDrvCtrl->memAllocFlag = FALSE;
        }

    /* zero the pre-provided or allocated memory */

    memset((void *)pDrvCtrl->pMemBase, 0, size);

    /* set the TX descriptor base address, align to 128 byte */
 
    pDrvCtrl->pTxDescBase = (char *)(((UINT32)(pDrvCtrl->pMemBase) + 
                                      (GEI_DESC_ALIGN_BYTE - 1)) & 
                                      ~(GEI_DESC_ALIGN_BYTE - 1));

    /* set the RX descriptor base Address */

    pDrvCtrl->pRxDescBase = (char *)GEI_GET_TX_DESC_ADDR(pDrvCtrl->txDescNum);

    if (pDrvCtrl->memAllocFlag || 
         pDrvCtrl->usrFlags & GEI_END_USER_MEM_FOR_DESC_ONLY)
        {
        size = pDrvCtrl->rxDescNum * bufSz *        /* for RX buffer */
               (DEFAULT_LOAN_RXBUF_FACTOR + 1) +    /* for RX loan buffer */
               1024;

        pDrvCtrl->pRxBufMem = (char *) memalign(GEI_DESC_ALIGN_BYTE, size);
        if (pDrvCtrl->pRxBufMem == NULL)
            {
            DRV_LOG (DRV_DEBUG_LOAD, "gei82543EndMemInit: RxBuffer memory 
                                  unavailable\n",1, 2, 3, 4, 5, 6);
            goto errorExit;
            }

        memset((void *)pDrvCtrl->pRxBufMem, 0, size);

        pDrvCtrl->pCacheFuncs = &cacheUserFuncs;

        tmpBase = (UINT32) (pDrvCtrl->pRxBufMem);
        }
     else
        {
        pDrvCtrl->pCacheFuncs = &cacheNullFuncs;

        tmpBase = (UINT32)GEI_GET_RX_DESC_ADDR(pDrvCtrl->rxDescNum);
        }

     pDrvCtrl->pRxBufBase = (char *)(((tmpBase + (GEI_DESC_ALIGN_BYTE)) & 
                             ~(GEI_DESC_ALIGN_BYTE - 1)) - CL_OVERHEAD);

    /* get memory for RX buffer virtual address array */

    size = pDrvCtrl->rxDescNum * sizeof(UINT32);

    pDrvCtrl->pRxBufVirtAddr = (char **)memalign(GEI_DESC_ALIGN_BYTE, size); 

    /* allocate memory for txDescriptor manager array */

    size = pDrvCtrl->txDescNum * sizeof(TX_DESCTL);

    pDrvCtrl->pTxDesCtlBase = (P_TX_DESCTL)memalign(GEI_DESC_ALIGN_BYTE, size);

    if ((pDrvCtrl->pTxDesCtlBase) == NULL)
        {
        DRV_LOG (DRV_DEBUG_LOAD, "gei82543EndMemInit: TxDesCtl memory 
                                  unavailable\n",1, 2, 3, 4, 5, 6);
        goto errorExit;
        }

    /* get a buffer for TX polling mode */

    pDrvCtrl->pTxPollBufAdr = cacheDmaMalloc (bufSz);

    if ((pDrvCtrl->pTxPollBufAdr) == NULL)
        {
        DRV_LOG (DRV_DEBUG_LOAD, "gei82543EndMemInit: Tx Polling memory 
                                  unavailable\n",1, 2, 3, 4, 5, 6);
        goto errorExit;
        }

    /* clean up txDesCtl memory */

    memset((void *)pDrvCtrl->pTxDesCtlBase, 0, size);

    /* 
     * set up RX mBlk pool
     * This is how we set up and END netPool using netBufLib(1).
     * This code is pretty generic.
     */

    if ((pDrvCtrl->end.pNetPool = malloc (sizeof(NET_POOL))) == NULL)
        goto errorExit;

    bzero ((char *)&geiMclBlkConfig, sizeof(geiMclBlkConfig));
    bzero ((char *)&geiClDesc, sizeof(geiClDesc));

    geiMclBlkConfig.mBlkNum = pDrvCtrl->rxDescNum * 
                                       (DEFAULT_MBLK_NUM_FACTOR + 1);

    geiClDesc.clNum = pDrvCtrl->rxDescNum * 
                                     (DEFAULT_LOAN_RXBUF_FACTOR + 1);
    geiClDesc.clSize = bufSz - CL_OVERHEAD;
        
    pDrvCtrl->clSz = geiClDesc.clSize; 

    geiMclBlkConfig.clBlkNum = geiClDesc.clNum;

    /* calculate the total memory for all the M-Blks and CL-Blks. */

    geiMclBlkConfig.memSize = 
        ((geiMclBlkConfig.mBlkNum * (M_BLK_SZ + sizeof (long))) +
         (geiMclBlkConfig.clBlkNum * CL_BLK_SZ + sizeof(long)));

    if ((geiMclBlkConfig.memArea = (char *) memalign (sizeof(long), 
                                            geiMclBlkConfig.memSize)) == 
                                            NULL)
        {
        DRV_LOG (DRV_DEBUG_LOAD, "gei82543EndMemInit: MclBlkConfig memory 
                                  unavailable\n",1, 2, 3, 4, 5, 6);
        goto errorExit;
        }

    pDrvCtrl->pMclkArea = geiMclBlkConfig.memArea;

    geiClDesc.memSize = geiClDesc.clNum * (geiClDesc.clSize + CL_OVERHEAD);

    geiClDesc.memArea = (char *)(pDrvCtrl->pRxBufBase);
    geiClDesc.memArea = (char *)(((UINT32) geiClDesc.memArea + 0x3) & ~0x3);

    END_DRV_CACHE_INVALIDATE (geiClDesc.memArea, geiClDesc.memSize);

    /* initialize the memory pool. */

    if (netPoolInit(pDrvCtrl->end.pNetPool, &geiMclBlkConfig,
                     &geiClDesc, 1,NULL) == ERROR)
        {
        DRV_LOG (DRV_DEBUG_LOAD, "gei82543EndMemInit: Could not 
                                  init buffering\n", 1, 2, 3, 4, 5, 6);
        goto errorExit;
        }

    if ((pDrvCtrl->pClPoolId = netClPoolIdGet (pDrvCtrl->end.pNetPool,
                               geiClDesc.clSize, FALSE)) == NULL)
        {
        DRV_LOG (DRV_DEBUG_LOAD, "gei82543EndMemInit: Could not find specified
                                  pool ID\n", 1, 2, 3, 4, 5, 6);
        goto errorExit;
        }

    CACHE_PIPE_FLUSH ();

    DRV_LOG (DRV_DEBUG_LOAD, "gei82543EndMemInit...OK\n", 1, 2, 3, 4, 5, 6);

    return OK;

errorExit:

    DRV_LOG (DRV_DEBUG_LOAD, "gei82543EndMemInit...ERROR\n", 1, 2, 3,4,5,6);
  
    return ERROR;
    }

/*************************************************************************
*
* gei82543EndStart - setup and start the device 
*
* This routine connects interrupts, initializes receiver and transmitter, 
* and enable the device for running 
*
* RETURNS: OK or ERROR
*/

LOCAL STATUS gei82543EndStart
    (
    END_DEVICE * pDrvCtrl    /* device ID */
    )
    {
    STATUS result;           /* results of start device */

    DRV_LOG (DRV_DEBUG_LOAD, "gei82543EndStart...\n", 1, 2, 3, 4, 5, 6);

    if (pDrvCtrl->attach != TRUE)
       return ERROR;

    /* disable all chip interrupts */

    gei82543DisableChipInt (pDrvCtrl);

    /* turn off system interrupts */

    SYS_INT_DISABLE(pDrvCtrl);

    /* initialize the hardware and set up link */

    if (gei82543HwInit (pDrvCtrl) != OK)
       {
        DRV_LOG (DRV_DEBUG_LOAD, ("gei82543EndStart: link setup fails\n"), 
                                  1, 2, 3, 4, 5, 6);
        LOGMSG("link fails\n", 1, 2, 3, 4, 5, 6);