mycpu.map.eqn

Quartus II 5.0下写的一个单总线架构的CPU设计

--operation mode is normal

X2_39 = X1L41 & (93 & K2L9 # !93 & (X2_39)) # !X1L41 & (X2_39);


--X2_40 is 8cpu:92|bi74670:67|74670c:34|40
--operation mode is normal

X2_40 = X1L51 & (93 & K2L9 # !93 & (X2_40)) # !X1L51 & (X2_40);


--X2_51 is 8cpu:92|bi74670:67|74670c:34|51
--operation mode is normal

X2_51 = X1L91 & (X2_51) # !X1L91 & (93 & K2L9 # !93 & (X2_51));


--X2_30 is 8cpu:92|bi74670:67|74670c:34|30
--operation mode is normal

X2_30 = X1L61 & (93 & K2L9 # !93 & (X2_30)) # !X1L61 & (X2_30);


--W3L41 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~186
--operation mode is arithmetic

W3L41_carry_eqn = W3L71;
W3L41 = B8_18 $ B7_18 $ W3L41_carry_eqn;

--W3L51 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~188
--operation mode is arithmetic

W3L51 = CARRY(B8_18 & !B7_18 & !W3L71 # !B8_18 & (!W3L71 # !B7_18));


--W3L61 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~191
--operation mode is arithmetic

W3L61 = B8_19 $ B7_19;

--W3L71 is 8cpu:92|alu:62|lpm_add_sub:1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~193
--operation mode is arithmetic

W3L71 = CARRY(B8_19 & B7_19);


--X2_19 is 8cpu:92|bi74670:67|74670c:34|19
--operation mode is normal

X2_19 = X1L51 & (93 & K2L2 # !93 & (X2_19)) # !X1L51 & (X2_19);


--X2_20 is 8cpu:92|bi74670:67|74670c:34|20
--operation mode is normal

X2_20 = X1L41 & (93 & K2L2 # !93 & (X2_20)) # !X1L41 & (X2_20);


--X2_5 is 8cpu:92|bi74670:67|74670c:34|5
--operation mode is normal

X2_5 = X1L91 & (X2_5) # !X1L91 & (93 & K2L2 # !93 & (X2_5));


--X2_29 is 8cpu:92|bi74670:67|74670c:34|29
--operation mode is normal

X2_29 = X1L61 & (93 & K2L2 # !93 & (X2_29)) # !X1L61 & (X2_29);


--B8_14 is 8cpu:92|alu:62|74273b:5|14
--operation mode is normal

B8_14_lut_out = K3L11;
B8_14 = DFFEAS(B8_14_lut_out, M1_21, VCC, , , , , , );


--B7_14 is 8cpu:92|alu:62|74273b:4|14
--operation mode is normal

B7_14_lut_out = K3L11;
B7_14 = DFFEAS(B7_14_lut_out, M1_18, VCC, , , , , , );


--G1_14 is 8cpu:92|14
--operation mode is normal

G1_14 = H1_33 & B2_12 & CLK;


--B8_15 is 8cpu:92|alu:62|74273b:5|15
--operation mode is normal

B8_15_lut_out = K3L2;
B8_15 = DFFEAS(B8_15_lut_out, M1_21, VCC, , , , , , );


--B7_15 is 8cpu:92|alu:62|74273b:4|15
--operation mode is normal

B7_15_lut_out = K3L2;
B7_15 = DFFEAS(B7_15_lut_out, M1_18, VCC, , , , , , );


--B8_16 is 8cpu:92|alu:62|74273b:5|16
--operation mode is normal

B8_16_lut_out = K2L71;
B8_16 = DFFEAS(B8_16_lut_out, M1_21, VCC, , , , , , );


--B7_16 is 8cpu:92|alu:62|74273b:4|16
--operation mode is normal

B7_16_lut_out = K2L71;
B7_16 = DFFEAS(B7_16_lut_out, M1_18, VCC, , , , , , );


--B8_17 is 8cpu:92|alu:62|74273b:5|17
--operation mode is normal

B8_17_lut_out = K2L31;
B8_17 = DFFEAS(B8_17_lut_out, M1_21, VCC, , , , , , );


--B7_17 is 8cpu:92|alu:62|74273b:4|17
--operation mode is normal

B7_17_lut_out = K2L31;
B7_17 = DFFEAS(B7_17_lut_out, M1_18, VCC, , , , , , );


--B8_18 is 8cpu:92|alu:62|74273b:5|18
--operation mode is normal

B8_18_lut_out = K2L9;
B8_18 = DFFEAS(B8_18_lut_out, M1_21, VCC, , , , , , );


--B7_18 is 8cpu:92|alu:62|74273b:4|18
--operation mode is normal

B7_18_lut_out = K2L9;
B7_18 = DFFEAS(B7_18_lut_out, M1_18, VCC, , , , , , );


--B8_19 is 8cpu:92|alu:62|74273b:5|19
--operation mode is normal

B8_19_lut_out = K2L2;
B8_19 = DFFEAS(B8_19_lut_out, M1_21, VCC, , , , , , );


--B7_19 is 8cpu:92|alu:62|74273b:4|19
--operation mode is normal

B7_19_lut_out = K2L2;
B7_19 = DFFEAS(B7_19_lut_out, M1_18, VCC, , , , , , );


--K3L5 is 8cpu:92|pc:65|74161:9|f74161:sub|82~1
--operation mode is normal

K3L5_carry_eqn = K2_105;
K3L5 = !K3L5_carry_eqn;


--K3L7 is 8cpu:92|pc:65|74161:9|f74161:sub|82~3
--operation mode is arithmetic

K3L7 = K3L5;

--K3L6 is 8cpu:92|pc:65|74161:9|f74161:sub|82~2
--operation mode is arithmetic

K3L6 = CARRY(K3L5);


--CLRN is CLRN
--operation mode is input

CLRN = INPUT();


--CLK is CLK
--operation mode is input

CLK = INPUT();


--K2 is K2
--operation mode is input

K2 = INPUT();


--K1 is K1
--operation mode is input

K1 = INPUT();


--START is START
--operation mode is input

START = INPUT();


--K3 is K3
--operation mode is input

K3 = INPUT();


--kdata[8] is kdata[8]
--operation mode is input

kdata[8] = INPUT();


--kdata[7] is kdata[7]
--operation mode is input

kdata[7] = INPUT();


--kdata[6] is kdata[6]
--operation mode is input

kdata[6] = INPUT();


--kdata[5] is kdata[5]
--operation mode is input

kdata[5] = INPUT();


--kdata[4] is kdata[4]
--operation mode is input

kdata[4] = INPUT();


--kdata[3] is kdata[3]
--operation mode is input

kdata[3] = INPUT();


--kdata[2] is kdata[2]
--operation mode is input

kdata[2] = INPUT();


--kdata[1] is kdata[1]
--operation mode is input

kdata[1] = INPUT();


--count is count
--operation mode is output

count = OUTPUT(W3L1);


--M5 is M5
--operation mode is output

M5 = OUTPUT(H1_33);


--M2 is M2
--operation mode is output

M2 = OUTPUT(H1_28);


--0UPC is 0UPC
--operation mode is output

0UPC = OUTPUT(!97);


--M6 is M6
--operation mode is output

M6 = OUTPUT(H1_35);


--M3 is M3
--operation mode is output

M3 = OUTPUT(H1_37);


--busled[8] is busled[8]
--operation mode is output

busled[8] = OUTPUT(B6_12);


--busled[7] is busled[7]
--operation mode is output

busled[7] = OUTPUT(B6_13);


--busled[6] is busled[6]
--operation mode is output

busled[6] = OUTPUT(B6_14);


--busled[5] is busled[5]
--operation mode is output

busled[5] = OUTPUT(B6_15);


--busled[4] is busled[4]
--operation mode is output

busled[4] = OUTPUT(B6_16);


--busled[3] is busled[3]
--operation mode is output

busled[3] = OUTPUT(B6_17);


--busled[2] is busled[2]
--operation mode is output

busled[2] = OUTPUT(B6_18);


--busled[1] is busled[1]
--operation mode is output

busled[1] = OUTPUT(B6_19);


--Q1[8] is Q1[8]
--operation mode is output

Q1[8] = OUTPUT(B1_12);


--Q1[7] is Q1[7]
--operation mode is output

Q1[7] = OUTPUT(B1_13);


--Q1[6] is Q1[6]
--operation mode is output

Q1[6] = OUTPUT(B1_14);


--Q1[5] is Q1[5]
--operation mode is output

Q1[5] = OUTPUT(B1_15);


--Q1[4] is Q1[4]
--operation mode is output

Q1[4] = OUTPUT(B1_16);


--Q1[3] is Q1[3]
--operation mode is output

Q1[3] = OUTPUT(B1_17);


--Q1[2] is Q1[2]
--operation mode is output

Q1[2] = OUTPUT(B1_18);


--Q1[1] is Q1[1]
--operation mode is output

Q1[1] = OUTPUT(B1_19);


--Q2[8] is Q2[8]
--operation mode is output

Q2[8] = OUTPUT(B2_12);


--Q2[7] is Q2[7]
--operation mode is output

Q2[7] = OUTPUT(B2_13);


--Q2[6] is Q2[6]
--operation mode is output

Q2[6] = OUTPUT(B2_14);


--Q2[5] is Q2[5]
--operation mode is output

Q2[5] = OUTPUT(B2_15);


--Q2[4] is Q2[4]
--operation mode is output

Q2[4] = OUTPUT(B2_16);


--Q2[3] is Q2[3]
--operation mode is output

Q2[3] = OUTPUT(B2_17);


--Q2[2] is Q2[2]
--operation mode is output

Q2[2] = OUTPUT(B2_18);


--Q2[1] is Q2[1]
--operation mode i