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📄 rom.mif

📁 Quartus II 5.0下写的一个单总线架构的CPU设计
💻 MIF
字号:
-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic       
-- functions, and any output files any of the foregoing           
-- (including device programming or simulation files), and any    
-- associated documentation or information are expressly subject  
-- to the terms and conditions of the Altera Program License      
-- Subscription Agreement, Altera MegaCore Function License       
-- Agreement, or other applicable license agreement, including,   
-- without limitation, that your use is for the sole purpose of   
-- programming logic devices manufactured by Altera and sold by   
-- Altera or its authorized distributors.  Please refer to the    
-- applicable agreement for further details.

-- Quartus II generated Memory Initialization File (.mif)

WIDTH=24;
DEPTH=256;

ADDRESS_RADIX=HEX;
DATA_RADIX=HEX;

CONTENT BEGIN
	000  :   30C000;
	001  :   002000;
	[002..00f]  :   000000;
	010  :   C00200;
	011  :   111002;
	[012..01f]  :   000000;
	020  :   110802;
	[021..02f]  :   000000;
	030  :   30C000;
	031  :   008000;
	032  :   000200;
	033  :   111002;
	[034..03f]  :   000000;
	040  :   30C000;
	041  :   008000;
	042  :   100C02;
	[043..04f]  :   000000;
	050  :   180800;
	051  :   141000;
	052  :   020000;
	053  :   400202;
	[054..05f]  :   000000;
	060  :   30C000;
	061  :   000200;
	062  :   101102;
	[063..07f]  :   000000;
	080  :   C00100;
	081  :   310002;
	[082..0bf]  :   000000;
	0c0  :   30C000;
	0c1  :   C00400;
	0c2  :   010002;
	[0c3..0ff]  :   000000;
END;

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