mycpu.map.rpt

Quartus II 5.0下写的一个单总线架构的CPU设计

; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY       ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE       ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE     ;
+------------------------+---------+--------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in C:/Documents and Settings/ChenJia/桌面/硬件试验/mycpu/mycpu.map.eqn.


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 5.0 Build 148 04/26/2005 SJ Full Version
    Info: Processing started: Tue Dec 11 21:51:48 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off mycpu -c mycpu
Info: Found 1 design units, including 1 entities, in source file alu.bdf
    Info: Found entity 1: alu
Info: Found 1 design units, including 1 entities, in source file 8cpu.bdf
    Info: Found entity 1: 8cpu
Info: Found 1 design units, including 1 entities, in source file 1to8.bdf
    Info: Found entity 1: 1to8
Info: Found 1 design units, including 1 entities, in source file 74393b.bdf
    Info: Found entity 1: 74393b
Info: Found 1 design units, including 1 entities, in source file 74670c.bdf
    Info: Found entity 1: 74670c
Info: Found 1 design units, including 1 entities, in source file cpu001.bdf
    Info: Found entity 1: cpu001
Info: Found 1 design units, including 1 entities, in source file 8to1.bdf
    Info: Found entity 1: 8to1
Info: Found 1 design units, including 1 entities, in source file bi74670.bdf
    Info: Found entity 1: bi74670
Info: Found 1 design units, including 1 entities, in source file dcf.bdf
    Info: Found entity 1: dcf
Info: Found 1 design units, including 1 entities, in source file pc.bdf
    Info: Found entity 1: pc
Info: Found 1 design units, including 1 entities, in source file sequence.bdf
    Info: Found entity 1: sequence
Info: Elaborating entity "cpu001" for the top level hierarchy
Warning: Port "PRN" of type dcf and instance "84" is missing source signal
Warning: Port "D" of type dcf and instance "84" is missing source signal
Warning: Port "A" of type 74161 and instance "12" is missing source signal
Warning: Port "D" of type 74161 and instance "12" is missing source signal
Warning: Port "B" of type 74161 and instance "12" is missing source signal
Warning: Port "C" of type 74161 and instance "12" is missing source signal
Info: Elaborating entity "8cpu" for hierarchy "8cpu:92"
Info: Elaborating entity "alu" for hierarchy "8cpu:92|alu:62"
Info: Found 1 design units, including 1 entities, in source file d:/quartus50/libraries/megafunctions/LPM_ADD_SUB.tdf
    Info: Found entity 1: lpm_add_sub
Info: Elaborating entity "LPM_ADD_SUB" for hierarchy "8cpu:92|alu:62|LPM_ADD_SUB:1"
Info: Found 1 design units, including 1 entities, in source file d:/quartus50/libraries/megafunctions/addcore.tdf
    Info: Found entity 1: addcore
Info: Elaborating entity "addcore" for hierarchy "8cpu:92|alu:62|LPM_ADD_SUB:1|addcore:adder"
Info: Found 1 design units, including 1 entities, in source file d:/quartus50/libraries/megafunctions/a_csnbuffer.tdf
    Info: Found entity 1: a_csnbuffer
Info: Elaborating entity "a_csnbuffer" for hierarchy "8cpu:92|alu:62|LPM_ADD_SUB:1|addcore:adder|a_csnbuffer:oflow_node"
Info: Elaborating entity "a_csnbuffer" for hierarchy "8cpu:92|alu:62|LPM_ADD_SUB:1|addcore:adder|a_csnbuffer:result_node"
Info: Found 1 design units, including 1 entities, in source file d:/quartus50/libraries/megafunctions/altshift.tdf
    Info: Found entity 1: altshift
Info: Elaborating entity "altshift" for hierarchy "8cpu:92|alu:62|LPM_ADD_SUB:1|altshift:result_ext_latency_ffs"
Info: Elaborating entity "altshift" for hierarchy "8cpu:92|alu:62|LPM_ADD_SUB:1|altshift:carry_ext_latency_ffs"
Info: Found 1 design units, including 1 entities, in source file d:/quartus50/libraries/others/maxplus2/74273b.bdf
    Info: Found entity 1: 74273b
Info: Elaborating entity "74273b" for hierarchy "8cpu:92|alu:62|74273b:4"
Info: Found 1 design units, including 1 entities, in source file d:/quartus50/libraries/megafunctions/BUSMUX.tdf
    Info: Found entity 1: busmux
Info: Elaborating entity "BUSMUX" for hierarchy "8cpu:92|BUSMUX:49"
Info: Found 1 design units, including 1 entities, in source file d:/quartus50/libraries/megafunctions/lpm_mux.tdf
    Info: Found entity 1: lpm_mux
Info: Elaborating entity "lpm_mux" for hierarchy "8cpu:92|BUSMUX:49|lpm_mux:$00000"
Info: Found 1 design units, including 1 entities, in source file db/mux_afc.tdf
    Info: Found entity 1: mux_afc
Info: Elaborating entity "mux_afc" for hierarchy "8cpu:92|BUSMUX:49|lpm_mux:$00000|mux_afc:auto_generated"
Info: Using design file lpm_ram_dq0.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: lpm_ram_dq0
Info: Elaborating entity "lpm_ram_dq0" for hierarchy "8cpu:92|lpm_ram_dq0:inst"
Info: Found 1 design units, including 1 entities, in source file d:/quartus50/libraries/megafunctions/altsyncram.tdf
    Info: Found entity 1: altsyncram
Info: Elaborating entity "altsyncram" for hierarchy "8cpu:92|lpm_ram_dq0:inst|altsyncram:altsyncram_component"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_rs21.tdf
    Info: Found entity 1: altsyncram_rs21
Info: Elaborating entity "altsyncram_rs21" for hierarchy "8cpu:92|lpm_ram_dq0:inst|altsyncram:altsyncram_component|altsyncram_rs21:auto_generated"
Info: Elaborating entity "bi74670" for hierarchy "8cpu:92|bi74670:67"
Info: Elaborating entity "74670c" for hierarchy "8cpu:92|bi74670:67|74670c:34"
Info: Elaborating entity "pc" for hierarchy "8cpu:92|pc:65"
Info: Found 1 design units, including 1 entities, in source file d:/quartus50/libraries/others/maxplus2/74161.tdf
    Info: Found entity 1: 74161
Info: Elaborating entity "74161" for hierarchy "8cpu:92|pc:65|74161:8"
Info: Found 1 design units, including 1 entities, in source file d:/quartus50/libraries/others/maxplus2/f74161.bdf
    Info: Found entity 1: f74161
Info: Elaborating entity "f74161" for hierarchy "8cpu:92|pc:65|74161:8|f74161:sub"
Info: Elaborating entity "74161" for hierarchy "8cpu:92|pc:65|74161:9"
Info: Elaborating entity "sequence" for hierarchy "sequence:103"
Info: Elaborating entity "74393b" for hierarchy "sequence:103|74393b:25"
Info: Elaborating entity "dcf" for hierarchy "dcf:84"
Info: Elaborating entity "1to8" for hierarchy "1to8:43"
Info: Using design file lpm_rom6.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: lpm_rom6
Info: Elaborating entity "lpm_rom6" for hierarchy "lpm_rom6:inst2"
Info: Elaborating entity "altsyncram" for hierarchy "lpm_rom6:inst2|altsyncram:altsyncram_component"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_3mp.tdf
    Info: Found entity 1: altsyncram_3mp
Info: Elaborating entity "altsyncram_3mp" for hierarchy "lpm_rom6:inst2|altsyncram:altsyncram_component|altsyncram_3mp:auto_generated"
Info: Elaborating entity "8to1" for hierarchy "8to1:22"
Info: Elaborating entity "74161" for hierarchy "74161:12"
Info: Ignored 1 buffer(s)
    Info: Ignored 1 SOFT buffer(s)
Info: Converted 2 single input CARRY primitives to CARRY_SUM primitives
Warning: Ignored 1 CARRY_SUM primitives
    Warning: Ignored 1 CARRY_SUM primitives -- cannot place fan-in logic in single logic cell
        Warning: Can't place logic feeding CARRY_SUM primitive "8cpu:92|pc:65|74161:9|f74161:sub|82~0" in single logic cell
            Warning: Node "8cpu:92|pc:65|74161:8|f74161:sub|105~0" of type CARRY_SUM
            Warning: Node "8cpu:92|pc:65|74161:9|f74161:sub|95~0" of type CARRY_SUM
Info: Implemented 298 device resources after synthesis - the final resource count might be different
    Info: Implemented 14 input pins
    Info: Implemented 46 output pins
    Info: Implemented 206 logic cells
    Info: Implemented 32 RAM segments
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 11 warnings
    Info: Processing ended: Tue Dec 11 21:51:54 2007
    Info: Elapsed time: 00:00:09