📄 echo.rst
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009C 230 _REN = 0x009c 009D 231 _SM2 = 0x009d 009E 232 _SM1 = 0x009e 009F 233 _SM0 = 0x009f 0088 234 _IT0 = 0x0088 0089 235 _IE0 = 0x0089 008A 236 _IT1 = 0x008a 008B 237 _IE1 = 0x008b 008C 238 _TR0 = 0x008c 008D 239 _TF0 = 0x008d 008E 240 _TR1 = 0x008e 008F 241 _TF1 = 0x008f 242 ;-------------------------------------------------------- 243 ; overlayable register banks 244 ;-------------------------------------------------------- 245 .area REG_BANK_0 (REL,OVR,DATA) 0000 246 .ds 8 247 ;-------------------------------------------------------- 248 ; internal ram data 249 ;-------------------------------------------------------- 250 .area DSEG (DATA) 251 ;-------------------------------------------------------- 252 ; overlayable items in internal ram 253 ;-------------------------------------------------------- 254 .area OSEG (OVR,DATA) 255 ;-------------------------------------------------------- 256 ; Stack segment in internal ram 257 ;-------------------------------------------------------- 258 .area SSEG (DATA) 0008 259 __start__stack: 0008 260 .ds 1 261 262 ;-------------------------------------------------------- 263 ; indirectly addressable internal ram data 264 ;-------------------------------------------------------- 265 .area ISEG (DATA) 266 ;-------------------------------------------------------- 267 ; bit data 268 ;-------------------------------------------------------- 269 .area BSEG (BIT) 270 ;-------------------------------------------------------- 271 ; paged external ram data 272 ;-------------------------------------------------------- 273 .area PSEG (PAG,XDATA) 274 ;-------------------------------------------------------- 275 ; external ram data 276 ;-------------------------------------------------------- 277 .area XSEG (XDATA) 278 ;-------------------------------------------------------- 279 ; external initialized ram data 280 ;-------------------------------------------------------- 281 .area XISEG (XDATA) 282 .area HOME (CODE) 283 .area GSINIT0 (CODE) 284 .area GSINIT1 (CODE) 285 .area GSINIT2 (CODE) 286 .area GSINIT3 (CODE) 287 .area GSINIT4 (CODE) 288 .area GSINIT5 (CODE) 289 .area GSINIT (CODE) 290 .area GSFINAL (CODE) 291 .area CSEG (CODE) 292 ;-------------------------------------------------------- 293 ; interrupt vector 294 ;-------------------------------------------------------- 295 .area HOME (CODE) 0000 296 __interrupt_vect: 0000 02 00 03 297 ljmp __sdcc_gsinit_startup 298 ;-------------------------------------------------------- 299 ; global & static initialisations 300 ;-------------------------------------------------------- 301 .area HOME (CODE) 302 .area GSINIT (CODE) 303 .area GSFINAL (CODE) 304 .area GSINIT (CODE) 305 .globl __sdcc_gsinit_startup 306 .globl __sdcc_program_startup 307 .globl __start__stack 308 .globl __mcs51_genXINIT 309 .globl __mcs51_genXRAMCLEAR 310 .globl __mcs51_genRAMCLEAR 311 .area GSFINAL (CODE) 005C 02 00 5F 312 ljmp __sdcc_program_startup 313 ;-------------------------------------------------------- 314 ; Home 315 ;-------------------------------------------------------- 316 .area HOME (CODE) 317 .area CSEG (CODE) 005F 318 __sdcc_program_startup: 005F 12 00 8D 319 lcall _main 320 ; return from main will lock up 0062 80 FE 321 sjmp . 322 ;-------------------------------------------------------- 323 ; code 324 ;-------------------------------------------------------- 325 .area CSEG (CODE) 326 ;------------------------------------------------------------ 327 ;Allocation info for local variables in function 'uart_init' 328 ;------------------------------------------------------------ 329 ;------------------------------------------------------------ 330 ; echo.c:4: void uart_init(void) 331 ; ----------------------------------------- 332 ; function uart_init 333 ; ----------------------------------------- 0064 334 _uart_init: 0002 335 ar2 = 0x02 0003 336 ar3 = 0x03 0004 337 ar4 = 0x04 0005 338 ar5 = 0x05 0006 339 ar6 = 0x06 0007 340 ar7 = 0x07 0000 341 ar0 = 0x00 0001 342 ar1 = 0x01 343 ; echo.c:6: SCON = 0x50; 344 ; genAssign 0064 75 98 50 345 mov _SCON,#0x50 346 ; echo.c:7: HIGH_NIBBLE_SET(TMOD, 2); 347 ; genAnd 0067 74 0F 348 mov a,#0x0F 0069 55 89 349 anl a,_TMOD 350 ; genOr 006B 44 20 351 orl a,#0x20 006D F5 89 352 mov _TMOD,a 353 ; echo.c:8: TH1 = 253; 354 ; genAssign 006F 75 8D FD 355 mov _TH1,#0xFD 356 ; echo.c:9: PCON |= 0x80; 357 ; genOr 0072 43 87 80 358 orl _PCON,#0x80 359 ; echo.c:10: ES = 0; 360 ; genAssign 0075 C2 AC 361 clr _ES 362 ; echo.c:11: TR1 = 1; 363 ; genAssign 0077 D2 8E 364 setb _TR1 365 ; Peephole 300 removed redundant label 00101$ 0079 22 366 ret 367 ;------------------------------------------------------------ 368 ;Allocation info for local variables in function 'putchar' 369 ;------------------------------------------------------------ 370 ;c Allocated to registers r2 371 ;------------------------------------------------------------ 372 ; echo.c:14: void putchar(char c) 373 ; ----------------------------------------- 374 ; function putchar 375 ; ----------------------------------------- 007A 376 _putchar: 377 ; genReceive 007A AA 82 378 mov r2,dpl 379 ; echo.c:16: TI = 0; 380 ; genAssign 007C C2 99 381 clr _TI 382 ; echo.c:17: SBUF = c; 383 ; genAssign 007E 8A 99 384 mov _SBUF,r2 385 ; echo.c:18: while(!TI) 0080 386 00101$: 387 ; genIfx 388 ; genIfxJump 389 ; Peephole 108.d removed ljmp by inverse jump logic 0080 30 99 FD 390 jnb _TI,00101$ 391 ; Peephole 300 removed redundant label 00107$ 392 ; Peephole 300 removed redundant label 00104$ 0083 22 393 ret 394 ;------------------------------------------------------------ 395 ;Allocation info for local variables in function 'getchar' 396 ;------------------------------------------------------------ 397 ;------------------------------------------------------------ 398 ; echo.c:22: char getchar(void) 399 ; ----------------------------------------- 400 ; function getchar 401 ; ----------------------------------------- 0084 402 _getchar: 403 ; echo.c:24: RI = 0; 404 ; genAssign 0084 C2 98 405 clr _RI 406 ; echo.c:25: while(!RI) 0086 407 00101$: 408 ; genIfx 409 ; genIfxJump 410 ; Peephole 108.d removed ljmp by inverse jump logic 0086 30 98 FD 411 jnb _RI,00101$ 412 ; Peephole 300 removed redundant label 00108$ 413 ; echo.c:27: return SBUF; 414 ; genAssign 0089 85 99 82 415 mov dpl,_SBUF 416 ; genRet 417 ; Peephole 300 removed redundant label 00104$ 008C 22 418 ret 419 ;------------------------------------------------------------ 420 ;Allocation info for local variables in function 'main' 421 ;------------------------------------------------------------ 422 ;c Allocated to registers r2 423 ;------------------------------------------------------------ 424 ; echo.c:30: void main() 425 ; ----------------------------------------- 426 ; function main 427 ; ----------------------------------------- 008D 428 _main: 429 ; echo.c:32: uart_init(); 430 ; genCall 008D 12 00 64 431 lcall _uart_init 432 ; echo.c:33: EA = 0; 433 ; genAssign 0090 C2 AF 434 clr _EA 435 ; echo.c:34: while(1) { 0092 436 00102$: 437 ; echo.c:36: P1_0 ^= 1; 438 ; genXor 0092 B2 90 439 cpl _P1_0 440 ; echo.c:37: c = getchar(); 441 ; genCall 0094 12 00 84 442 lcall _getchar 443 ; echo.c:38: P0 = c; 444 ; genAssign 445 ; echo.c:39: putchar(c); 446 ; genCall 0097 AA 82 447 mov r2,dpl 0099 8A 80 448 mov _P0,r2 449 ; Peephole 166 removed redundant mov 009B 12 00 7A 450 lcall _putchar 451 ; Peephole 112.b changed ljmp to sjmp 009E 80 F2 452 sjmp 00102$ 453 ; Peephole 259.a removed redundant label 00104$ and ret 454 ; 455 .area CSEG (CODE) 456 .area CONST (CODE) 457 .area XINIT (CODE)⌨️ 快捷键说明
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