timer.sim.rpt

该芯片的功能是： ① 有一复位开关

; Trigger vector comparison with the specified mode                                          ; INPUT_EDGE ; INPUT_EDGE    ;
; Disable setup and hold time violations detection in input registers of bi-directional pins ; Off        ; Off           ;
; Overwrite Waveform Inputs With Simulation Outputs                                          ; On         ;               ;
; Glitch Filtering                                                                           ; Off        ; Off           ;
+--------------------------------------------------------------------------------------------+------------+---------------+


+----------------------+
; Simulation Waveforms ;
+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.


+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;      83.85 % ;
; Total nodes checked                                 ; 2267         ;
; Total output ports checked                          ; 2279         ;
; Total output ports with complete 1/0-value coverage ; 1911         ;
; Total output ports with no 1/0-value coverage       ; 364          ;
; Total output ports with no 1-value coverage         ; 367          ;
; Total output ports with no 0-value coverage         ; 365          ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                                          ;
+-------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                       ; Output Port Name                                                                                ; Output Port Type ;
+-------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------+------------------+
; |timer|done~0                                                                                   ; |timer|done~0                                                                                   ; out0             ;
; |timer|done~1                                                                                   ; |timer|done~1                                                                                   ; out0             ;
; |timer|done~2                                                                                   ; |timer|done~2                                                                                   ; out0             ;
; |timer|clk                                                                                      ; |timer|clk                                                                                      ; out              ;
; |timer|done                                                                                     ; |timer|done                                                                                     ; pin_out          ;
; |timer|min_msb[7]                                                                               ; |timer|min_msb[7]                                                                               ; pin_out          ;
; |timer|min_msb[6]                                                                               ; |timer|min_msb[6]                                                                               ; pin_out          ;
; |timer|min_msb[5]                                                                               ; |timer|min_msb[5]                                                                               ; pin_out          ;
; |timer|min_msb[4]                                                                               ; |timer|min_msb[4]                                                                               ; pin_out          ;
; |timer|min_msb[3]                                                                               ; |timer|min_msb[3]                                                                               ; pin_out          ;
; |timer|min_msb[2]                                                                               ; |timer|min_msb[2]                                                                               ; pin_out          ;
; |timer|min_msb[1]                                                                               ; |timer|min_msb[1]                                                                               ; pin_out          ;
; |timer|min_lsb[7]                                                                               ; |timer|min_lsb[7]                                                                               ; pin_out          ;
; |timer|min_lsb[6]                                                                               ; |timer|min_lsb[6]                                                                               ; pin_out          ;
; |timer|min_lsb[5]                                                                               ; |timer|min_lsb[5]                                                                               ; pin_out          ;
; |timer|min_lsb[4]                                                                               ; |timer|min_lsb[4]                                                                               ; pin_out          ;
; |timer|min_lsb[3]                                                                               ; |timer|min_lsb[3]                                                                               ; pin_out          ;
; |timer|min_lsb[2]                                                                               ; |timer|min_lsb[2]                                                                               ; pin_out          ;
; |timer|min_lsb[1]                                                                               ; |timer|min_lsb[1]                                                                               ; pin_out          ;
; |timer|sec_msb[7]                                                                               ; |timer|sec_msb[7]                                                                               ; pin_out          ;
; |timer|sec_msb[6]                                                                               ; |timer|sec_msb[6]                                                                               ; pin_out          ;
; |timer|sec_msb[5]                                                                               ; |timer|sec_msb[5]                                                                               ; pin_out          ;
; |timer|sec_msb[4]                                                                               ; |timer|sec_msb[4]                                                                               ; pin_out          ;
; |timer|sec_msb[3]                                                                               ; |timer|sec_msb[3]                                                                               ; pin_out          ;
; |timer|sec_msb[2]                                                                               ; |timer|sec_msb[2]                                                                               ; pin_out          ;
; |timer|sec_msb[1]                                                                               ; |timer|sec_msb[1]                                                                               ; pin_out          ;
; |timer|sec_lsb[7]                                                                               ; |timer|sec_lsb[7]                                                                               ; pin_out          ;
; |timer|sec_lsb[6]                                                                               ; |timer|sec_lsb[6]                                                                               ; pin_out          ;
; |timer|sec_lsb[5]                                                                               ; |timer|sec_lsb[5]                                                                               ; pin_out          ;
; |timer|sec_lsb[4]                                                                               ; |timer|sec_lsb[4]                                                                               ; pin_out          ;
; |timer|sec_lsb[3]                                                                               ; |timer|sec_lsb[3]                                                                               ; pin_out          ;
; |timer|sec_lsb[2]                                                                               ; |timer|sec_lsb[2]                                                                               ; pin_out          ;
; |timer|sec_lsb[1]                                                                               ; |timer|sec_lsb[1]                                                                               ; pin_out          ;
; |timer|counter4:u0|dual_reg4:u3|q~0                                                             ; |timer|counter4:u0|dual_reg4:u3|q~0                                                             ; out              ;
; |timer|counter4:u0|dual_reg4:u3|q~1                                                             ; |timer|counter4:u0|dual_reg4:u3|q~1                                                             ; out              ;
; |timer|counter4:u0|dual_reg4:u3|q~2                                                             ; |timer|counter4:u0|dual_reg4:u3|q~2                                                             ; out              ;
; |timer|counter4:u0|dual_reg4:u3|q~3                                                             ; |timer|counter4:u0|dual_reg4:u3|q~3                                                             ; out              ;
; |timer|counter4:u0|dual_reg4:u3|q~4                                                             ; |timer|counter4:u0|dual_reg4:u3|q~4                                                             ; out              ;
; |timer|counter4:u0|dual_reg4:u3|q~5                                                             ; |timer|counter4:u0|dual_reg4:u3|q~5                                                             ; out              ;
; |timer|counter4:u0|dual_reg4:u3|q~6                                                             ; |timer|counter4:u0|dual_reg4:u3|q~6                                                             ; out              ;
; |timer|counter4:u0|dual_reg4:u3|q~7                                                             ; |timer|counter4:u0|dual_reg4:u3|q~7                                                             ; out              ;