loader.sim.rpt

来自「该芯片的功能是： ① 有一复位开关」· RPT 代码 · 共 503 行 · 第 1/5 页

; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~8               ; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~8               ; out0             ;
; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~9               ; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~9               ; out0             ;
; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~11              ; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~11              ; out0             ;
; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~12              ; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~12              ; out0             ;
; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~13              ; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~13              ; out0             ;
; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~15              ; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~15              ; out0             ;
; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~16              ; |loader|lpm_mux:Mux1|mux_ldc:auto_generated|_~16              ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|result_node[0]~1  ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|result_node[0]~1  ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|result_node[0]    ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|result_node[0]    ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~2               ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~2               ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~3               ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~3               ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~4               ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~4               ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|w_result36w~1     ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|w_result36w~1     ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|w_result36w       ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|w_result36w       ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~7               ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~7               ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~8               ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~8               ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~9               ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~9               ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~11              ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~11              ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|w_result44w~1     ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|w_result44w~1     ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|w_result44w       ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|w_result44w       ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~13              ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~13              ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~15              ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~15              ; out0             ;
; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~16              ; |loader|lpm_mux:Mux0|mux_ldc:auto_generated|_~16              ; out0             ;
+---------------------------------------------------------------+---------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage                                                                                                                         ;
+---------------------------------------------------------------+---------------------------------------------------------------+------------------+
; Node Name                                                     ; Output Port Name                                              ; Output Port Type ;
+---------------------------------------------------------------+---------------------------------------------------------------+------------------+
; |loader|load_val[1]$latch                                     ; |loader|load_val[1]$latch                                     ; out              ;
; |loader|load_val[4]$latch                                     ; |loader|load_val[4]$latch                                     ; out              ;
; |loader|load_val[10]$latch                                    ; |loader|load_val[10]$latch                                    ; out              ;
; |loader|load_val[12]$latch                                    ; |loader|load_val[12]$latch                                    ; out              ;
; |loader|load_val[14]$latch                                    ; |loader|load_val[14]$latch                                    ; out              ;
; |loader|data[0]                                               ; |loader|data[0]                                               ; out              ;
; |loader|data[1]                                               ; |loader|data[1]                                               ; out              ;
; |loader|data[2]                                               ; |loader|data[2]                                               ; out              ;
; |loader|data[3]                                               ; |loader|data[3]                                               ; out              ;
; |loader|data[4]                                               ; |loader|data[4]                                               ; out              ;
; |loader|data[5]                                               ; |loader|data[5]                                               ; out              ;
; |loader|data[6]                                               ; |loader|data[6]                                               ; out              ;
; |loader|data[7]                                               ; |loader|data[7]                                               ; out              ;
; |loader|data[8]                                               ; |loader|data[8]                                               ; out              ;
; |loader|data[9]                                               ; |loader|data[9]                                               ; out              ;
; |loader|data[10]                                              ; |loader|data[10]                                              ; out              ;
; |loader|data[11]                                              ; |loader|data[11]                                              ; out              ;
; |loader|data[12]                                              ; |loader|data[12]                                              ; out              ;
; |loader|data[13]                                              ; |loader|data[13]                                              ; out              ;
; |loader|data[14]                                              ; |loader|data[14]                                              ; out              ;
; |loader|data[15]                                              ; |loader|data[15]                                              ; out              ;
; |loader|load_8888                                             ; |loader|load_8888                                             ; out              ;
; |loader|load_val[1]                                           ; |loader|load_val[1]                                           ; pin_out          ;
; |loader|load_val[4]                                           ; |loader|load_val[4]                                           ; pin_out          ;
; |loader|load_val[10]                                          ; |loader|load_val[10]                                          ; pin_out          ;
; |loader|load_val[12]                                          ; |loader|load_val[12]                                          ; pin_out          ;
; |loader|load_val[14]                                          ; |loader|load_val[14]                                          ; pin_out          ;
; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|result_node[0]~0 ; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|result_node[0]~0 ; out0             ;
; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|_~5              ; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|_~5              ; out0             ;
; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|w_result37w~0    ; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|w_result37w~0    ; out0             ;
; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|_~10             ; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|_~10             ; out0             ;
; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|w_result44w~0    ; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|w_result44w~0    ; out0             ;
; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|_~12             ; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|_~12             ; out0             ;
; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|w_result65w~1    ; |loader|lpm_mux:Mux17|mux_ldc:auto_generated|w_result65w~1    ; out0             ;
; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|result_node[0]~0 ; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|result_node[0]~0 ; out0             ;
; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|_~1              ; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|_~1              ; out0             ;
; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|w_result36w~0    ; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|w_result36w~0    ; out0             ;
; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|_~5              ; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|_~5              ; out0             ;
; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|w_result37w~0    ; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|w_result37w~0    ; out0             ;
; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|_~10             ; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|_~10             ; out0             ;
; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|w_result44w~0    ; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|w_result44w~0    ; out0             ;
; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|_~12             ; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|_~12             ; out0             ;
; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|w_result65w~1    ; |loader|lpm_mux:Mux16|mux_ldc:auto_generated|w_result65w~1    ; out0             ;
; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|result_node[0]~0 ; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|result_node[0]~0 ; out0             ;
; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|_~5              ; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|_~5              ; out0             ;
; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|w_result37w~0    ; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|w_result37w~0    ; out0             ;
; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|_~10             ; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|_~10             ; out0             ;
; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|w_result44w~0    ; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|w_result44w~0    ; out0             ;
; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|_~12             ; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|_~12             ; out0             ;
; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|w_result65w~1    ; |loader|lpm_mux:Mux15|mux_ldc:auto_generated|w_result65w~1    ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|result_node[0]~0 ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|result_node[0]~0 ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|result_node[0]~1 ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|result_node[0]~1 ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|result_node[0]   ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|result_node[0]   ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|_~1              ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|_~1              ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|_~2              ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|_~2              ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result36w~0    ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result36w~0    ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result36w~1    ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result36w~1    ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result36w      ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result36w      ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|_~5              ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|_~5              ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|_~6              ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|_~6              ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result37w~0    ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result37w~0    ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result37w~1    ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result37w~1    ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result37w      ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result37w      ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|_~10             ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|_~10             ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result44w~0    ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result44w~0    ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result44w~1    ; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result44w~1    ; out0             ;
; |loader|lpm_mux:Mux14|mux_ldc:auto_generated|w_result44w      ; |loader|lpm_mux:Mux14|mux_ldc:auto_generate