microwave_timer.map.qmsg

该芯片的功能是： ① 有一复位开关

{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|microwave_timer\|state_control:u0\|current_state " "Info: Encoding result for state machine \"\|microwave_timer\|state_control:u0\|current_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "5 " "Info: Completed encoding using 5 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state_control:u0\|current_state.done_msg " "Info: Encoded state bit \"state_control:u0\|current_state.done_msg\"" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state_control:u0\|current_state.timer " "Info: Encoded state bit \"state_control:u0\|current_state.timer\"" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state_control:u0\|current_state.set_clock " "Info: Encoded state bit \"state_control:u0\|current_state.set_clock\"" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state_control:u0\|current_state.lamp_test " "Info: Encoded state bit \"state_control:u0\|current_state.lamp_test\"" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state_control:u0\|current_state.idle " "Info: Encoded state bit \"state_control:u0\|current_state.idle\"" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|microwave_timer\|state_control:u0\|current_state.idle 00000 " "Info: State \"\|microwave_timer\|state_control:u0\|current_state.idle\" uses code string \"00000\"" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|microwave_timer\|state_control:u0\|current_state.lamp_test 00011 " "Info: State \"\|microwave_timer\|state_control:u0\|current_state.lamp_test\" uses code string \"00011\"" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|microwave_timer\|state_control:u0\|current_state.set_clock 00101 " "Info: State \"\|microwave_timer\|state_control:u0\|current_state.set_clock\" uses code string \"00101\"" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|microwave_timer\|state_control:u0\|current_state.timer 01001 " "Info: State \"\|microwave_timer\|state_control:u0\|current_state.timer\" uses code string \"01001\"" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|microwave_timer\|state_control:u0\|current_state.done_msg 10001 " "Info: State \"\|microwave_timer\|state_control:u0\|current_state.done_msg\" uses code string \"10001\"" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[12\] " "Warning: Latch loader:u1\|load_val\[12\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.set_clock " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.set_clock" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[13\] " "Warning: Latch loader:u1\|load_val\[13\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.done_msg " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.done_msg" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[14\] " "Warning: Latch loader:u1\|load_val\[14\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.set_clock " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.set_clock" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[15\] " "Warning: Latch loader:u1\|load_val\[15\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.set_clock " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.set_clock" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[0\] " "Warning: Latch loader:u1\|load_val\[0\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.done_msg " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.done_msg" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[1\] " "Warning: Latch loader:u1\|load_val\[1\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.set_clock " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.set_clock" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[2\] " "Warning: Latch loader:u1\|load_val\[2\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.done_msg " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.done_msg" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[3\] " "Warning: Latch loader:u1\|load_val\[3\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.set_clock " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.set_clock" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[4\] " "Warning: Latch loader:u1\|load_val\[4\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.set_clock " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.set_clock" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[5\] " "Warning: Latch loader:u1\|load_val\[5\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.set_clock " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.set_clock" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[6\] " "Warning: Latch loader:u1\|load_val\[6\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.done_msg " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.done_msg" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[7\] " "Warning: Latch loader:u1\|load_val\[7\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.set_clock " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.set_clock" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[8\] " "Warning: Latch loader:u1\|load_val\[8\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.done_msg " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.done_msg" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[9\] " "Warning: Latch loader:u1\|load_val\[9\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.done_msg " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.done_msg" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[10\] " "Warning: Latch loader:u1\|load_val\[10\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.set_clock " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.set_clock" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "loader:u1\|load_val\[11\] " "Warning: Latch loader:u1\|load_val\[11\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA state_control:u0\|current_state.set_clock " "Warning: Ports D and ENA on the latch are fed by the same signal state_control:u0\|current_state.set_clock" {  } { { "state_control.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/state_control.vhd" 22 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "loader.vhd" "" { Text "D:/Program Files/altera/70/quartus/自己实践/微波炉定时器芯片/整个系统/loader.vhd" 14 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "183 " "Info: Implemented 183 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "21 " "Info: Implemented 21 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "29 " "Info: Implemented 29 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "133 " "Info: Implemented 133 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 33 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 33 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "139 " "Info: Allocated 139 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 27 16:02:00 2007 " "Info: Processing ended: Thu Sep 27 16:02:00 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}