cy7c67200_300_otg.c

linux嵌入式课程实践中的一个关于声卡驱动程序 。

    HWTrace (0x3050);

    if (otg->state != a_host) 
    {
        if (otg->state == a_wait_bcon)
        {
            HWTrace (0x3051);
            /* Device has been inserted */
            handle_device_insertion(otg_cy_priv, PORT0);
        }
        else if (otg->state == a_suspend && otg->b_bus_resume)
        {
            HWTrace (0x3052);
            /* Remote Wakeup */
            handle_remote_wakeup(otg_cy_priv, PORT0);
            lcd_command(LCD_START_SOF, 0, PORT0, NULL, 0, otg_cy_priv);
        }

        HWTrace (0x3053);

        otg->b_bus_resume = FALSE;
        otg->state = a_host;
    }

    switch (otg->id)
    {
    case A_DEV:
        if (otg->a_bus_drop || !otg->b_conn) 
        {
            HWTrace (0x3054);
            a_wait_bcon_state(otg);
        }
        else if (!otg->a_vbus_vld)
        {
            HWTrace (0x3055);
            a_vbus_err_state(otg);
        }
        else if (!otg->a_bus_req || otg->a_suspend_req)
        {
            HWTrace (0x3056);
            a_suspend_state(otg);
        }
        break;

    case B_DEV:
        HWTrace (0x3057);
        a_wait_bcon_state(otg);
        break;
    } 
}

void a_suspend_state(otg_t * otg)
{
    HWTrace (0x3060);
    if (otg->state != a_suspend) {
        HWTrace (0x3061);
        lcd_command(LCD_STOP_SOF, 0, PORT0, NULL, 0, otg_cy_priv);    

        /* start the wait for b-device disconnect timer */
        otg_start_timer( &otg->a_aidl_bdis_tmout, Ta_aidl_bdis );

        otg->a_suspend_req = FALSE;
        otg->state = a_suspend;
    } 
    
    switch(otg->id)
    {
    case A_DEV:
        HWTrace (0x3062);
        if (otg->a_bus_drop || otg->a_aidl_bdis_tmout) 
        {
            HWTrace (0x3063);

            if( otg->a_aidl_bdis_tmout )
            {
                otg->a_bus_req = TRUE;
            }

            otg_cancel_timer( &otg->a_aidl_bdis_tmout );

            a_wait_vfall_state(otg);
        }
        else if (!otg->a_vbus_vld)
        {
            HWTrace (0x3064);
            otg_cancel_timer( &otg->a_aidl_bdis_tmout );
            a_vbus_err_state(otg);
        }
        else if (otg->a_bus_req || otg->b_bus_resume)
        {
            HWTrace (0x3065);
            otg_cancel_timer( &otg->a_aidl_bdis_tmout );
            a_host_state(otg);
        }
        else if (!otg->b_conn && otg->a_set_b_hnp_en)
        {
            HWTrace (0x3066);
            otg_cancel_timer( &otg->a_aidl_bdis_tmout );
            switch_role(PERIPHERAL_ROLE);
            a_peripheral_state(otg);
        }
        else if (!otg->b_conn && !otg->a_set_b_hnp_en)
        {
            HWTrace (0x3067);
            otg_cancel_timer( &otg->a_aidl_bdis_tmout );
            a_wait_bcon_state(otg);
        }
        break;

    case B_DEV:
        HWTrace (0x3068);
        otg_cancel_timer( &otg->a_aidl_bdis_tmout );
        a_wait_vfall_state(otg);
        break;
    } 
}

void a_peripheral_state(otg_t * otg)
{
    HWTrace (0x3070);
    if (otg->state != a_peripheral) {
        HWTrace (0x3071);
        otg->state = a_peripheral;

        otg->a_set_b_hnp_en = FALSE;
        otg->a_bus_req = TRUE;
//        otg->b_conn = TRUE;
        otg->b_conn = FALSE;
    }

    switch(otg->id)
    {
    case A_DEV:
         HWTrace (0x3072);
        if (otg->a_bus_drop) 
        {
            HWTrace (0x3073);
            switch_role(HOST_INACTIVE_ROLE);
            a_wait_vfall_state(otg);
        }
        else if (!otg->a_vbus_vld)
        {
            HWTrace (0x3074);
            switch_role(HOST_INACTIVE_ROLE);
            a_vbus_err_state(otg);
        }
        else if (otg->b_bus_suspend)
        {
            HWTrace (0x3075);
            switch_role(HOST_ROLE);
            a_wait_bcon_state(otg);
        }
        break;
    case B_DEV:
        HWTrace (0x3076);
        switch_role(HOST_INACTIVE_ROLE);
        a_wait_vfall_state(otg);
        break;
    }  
}

void a_vbus_err_state(otg_t * otg)
{
    HWTrace (0x3080);
    if (otg->state != a_vbus_err) 
    {
        HWTrace (0x3081);

        otg->state = a_vbus_err;

        lcd_command(LCD_DISABLE_OTG_VBUS, 0, PORT0, NULL, 0, otg_cy_priv);    

        //otg->a_bus_drop = TRUE;
        //otg->a_bus_req = FALSE;
    } 

    switch(otg->id)
    {
    case A_DEV:
         HWTrace (0x3082);
        if (otg->a_bus_drop) 
        {
            HWTrace (0x3083);
            a_wait_vfall_state(otg);
        }
        break;
    case B_DEV:
        HWTrace (0x3084);
        a_wait_vfall_state(otg);
        break;
    }  

}

void a_wait_vfall_state(otg_t * otg)
{
	unsigned short usb_ctl_val;

    HWTrace (0x3090);
    if (otg->state != a_wait_vfall) 
    {
        HWTrace (0x3091);
        /* if the state is coming from the a_suspend state and
         * the A-device has timeout waiting for a disconnect, and
         * OTG app has offer hnp, then we need to notify the app that
         * an unsuccessful hnp offer occurred 
         */
        switch_role(HOST_INACTIVE_ROLE);

        lcd_command(LCD_DISABLE_OTG_VBUS, 0, PORT0, NULL, 0, otg_cy_priv);

        otg->state = a_wait_vfall;
        otg->a_bus_drop = FALSE;
    }

	/* Check for B-disconnect */
    lcd_read_reg(USB1_CTL_REG, &usb_ctl_val, otg_cy_priv);

	/* if device is not connected */
	if (!(usb_ctl_val & (A_DP_STAT | A_DM_STAT)))
	{
		otg->b_conn = FALSE;
	}

    switch(otg->id)
    {
    case A_DEV:
        HWTrace (0x3093);     
        if (otg->a_bus_req || (!otg->a_sess_vld && !otg->b_conn)) 
        {
            HWTrace (0x3094);
            /*
            cy_err("a_bus_req:%d, a_sess_vld:%d, b_conn:%d",
                    otg->a_bus_req, otg->a_sess_vld, otg->b_conn);
                    */
			otg->b_conn = FALSE;
            a_idle_state(otg);
        }
        break;
    case B_DEV:
        HWTrace (0x3095);
		otg->b_conn = FALSE;
		otg->b_sess_vld = FALSE;
        a_idle_state(otg);
        break;
    }  
}

void b_idle_state(otg_t * otg)
{
    unsigned short otg_ctl;

    HWTrace (0x30A0);
    if (otg->state != b_idle) {
        HWTrace (0x30A1);
        otg->state = b_idle;
		otg->b_conn = FALSE;
        otg->b_srp_done = FALSE;
    } 

    otg->b_sess_end = !(otg->b_sess_vld);

    switch(otg->id)
    {
    case A_DEV:
        HWTrace (0x30A2);
        otg->a_bus_req = TRUE;
        a_idle_state(otg);
        break;

    case B_DEV:
        HWTrace (0x30A3);
        /*
        cy_err("b_bus_req:%d, sess_end:%d, se0_srp:%d",
                otg->b_bus_req, otg->b_sess_end, otg->b_se0_srp);
                */

        if (otg->b_bus_req && otg->b_sess_end && otg->b_se0_srp)
        {
            HWTrace (0x30A4);
            //cy_err("calling srp_init_state");
            b_srp_init_state(otg);
        }
        else if (otg->b_sess_vld)
        {
            HWTrace (0x30A5);
            b_peripheral_state(otg);
        }
        break;
    }  
}

void b_srp_init_state(otg_t * otg)
{
    HWTrace (0x30B0);
    if (otg->state != b_srp_init) {
        HWTrace (0x30B1);

        otg->state = b_srp_init;

        otg->b_se0_srp = FALSE;

        otg->b_srp_done = FALSE;
        pcd_signal_srp( 20, otg_cy_priv );
        otg->b_srp_done = TRUE;
    } 

    switch(otg->id)
    {
    case A_DEV:
        HWTrace (0x30B2);
        b_idle_state(otg);
        break;

    case B_DEV:
        HWTrace (0x30B3);
        if (otg->b_srp_done)
        {
            HWTrace (0x30B4);
            b_idle_state(otg);
        }
        break;
    }  
}

void b_peripheral_state(otg_t * otg)
{
    unsigned short otg_ctl;

    HWTrace (0x30C0);
    if (otg->state != b_peripheral) {
        HWTrace (0x30C1);
        otg->state = b_peripheral;
        otg->a_bus_resume = FALSE;
        otg->a_bus_suspend = FALSE;
        switch_role(PERIPHERAL_ROLE);
		otg->b_bus_req = TRUE;
    } 

    /*
    cy_err("b_bus_req:%d, b_hnp_en:%d, a_bus_suspend:%d, a_conn:%d",
            otg->b_bus_req, otg->b_hnp_en, otg->a_bus_suspend, otg->a_conn);
            */

    switch(otg->id)
    {
    case A_DEV:
        HWTrace (0x30C2);
        switch_role(HOST_INACTIVE_ROLE);
        b_idle_state(otg);
        break;

    case B_DEV:
        HWTrace (0x30C3);
        if (!otg->b_sess_vld)
        {
            HWTrace (0x30C4);
            switch_role(HOST_INACTIVE_ROLE);
            b_idle_state(otg);
        }
        else if (otg->b_bus_req && otg->b_hnp_en && otg->a_bus_suspend)
        {
//	        cy_err("b_peripheral_state: switching to b_wait_acon_state");
            HWTrace (0x30C5);
            /* Switching to host */
            // FIXME do we really do this here??
            switch_role(HOST_ROLE);
            b_wait_acon_state(otg);
        }
        break;
    }  
}

void b_wait_acon_state(otg_t * otg)
{
    unsigned short usb_ctl_val;
	int i;

    HWTrace (0x30D0);
    if (otg->state != b_wait_acon) 
    {
        HWTrace (0x30D1);
        /* FIXME Turn off pull-up resistor */
        /* start b_ase0_brst timer */
        // FIXME 1ms timing here, may need to do something else
//      The timer has a resolution of 10ms!!!
//        otg_start_timer( &otg->b_ase0_brst_tmout, Tb_ase0_brst );

		otg->b_ase0_brst_tmout = FALSE;
        otg->state = b_wait_acon;
        otg->a_bus_suspend = FALSE;
        otg->b_hnp_en = FALSE;

		/* Wait 3.125 ms for the a-device to connect */
		for (i=0; i<Tb_ase0_brst; i++)
		{
			udelay(100);

			/* if the a-device has not connected then indicate timeout */
		    lcd_read_reg(USB1_CTL_REG, &usb_ctl_val, otg_cy_priv);

			/* if device connects */
			if (usb_ctl_val & A_DP_STAT)
			{
				otg->a_conn = TRUE;
				break;
			}
		}

		if (!(usb_ctl_val & A_DP_STAT))
		{
			otg->b_ase0_brst_tmout = TRUE;
		}
    } 
    
    switch(otg->id)
    {
    case A_DEV:
        HWTrace (0x30D2);
//        otg_cancel_timer( &otg->b_ase0_brst_tmout );
        switch_role(HOST_INACTIVE_ROLE);
        b_idle_state(otg);
        break;

    case B_DEV:
        HWTrace (0x30D3);
        if (!otg->b_sess_vld)
        {
            HWTrace (0x30D4);
//            otg_cancel_timer( &otg->b_ase0_brst_tmout );
			otg->b_ase0_brst_tmout = FALSE;
            switch_role(HOST_INACTIVE_ROLE);
            b_idle_state(otg);
        }
        else if (otg->a_bus_resume || otg->b_ase0_brst_tmout)
        {
            HWTrace (0x30D5);
//            otg_cancel_timer( &otg->b_ase0_brst_tmout );
			otg->b_ase0_brst_tmout = FALSE;
            b_peripheral_state(otg);
//			cy_err("b_wait_acon->b_periph");
        }
        else if (otg->a_conn)
        {
            HWTrace (0x30D6);
//            otg_cancel_timer( &otg->b_ase0_brst_tmout );
			otg->b_ase0_brst_tmout = FALSE;
            b_host_state(otg);
//			cy_err("b_wait_acon->b_host");
        }
        break;
    }  
}

void b_host_state(otg_t * otg)
{
    HWTrace (0x30E0);

    if (otg->state != b_host) 
    {
        HWTrace (0x30E1);
        handle_device_insertion(otg_cy_priv, PORT0);
        otg->state = b_host;
    }

    switch(otg->id)
    {
    case A_DEV:
        HWTrace (0x30E2);
        /* Switching to Peripheral */
        switch_role(HOST_INACTIVE_ROLE);
        b_idle_state(otg);
        break;

    case B_DEV:
        HWTrace (0x30E3);
        if (!otg->b_sess_vld)
        {
            HWTrace (0x30E4);
            /* Switching to Peripheral */
            switch_role(HOST_INACTIVE_ROLE);
            b_idle_state(otg);
        }
        else if (!otg->b_bus_req || !otg->a_conn)
        {
            HWTrace (0x30E5);
            /* Switching to Peripheral */
            b_peripheral_state(otg);
        }
        break;
    } 
}

void update_otg_state (otg_t * otg)
{
    otg_states in_state;

    HWTrace (0x3000);

    if (otg == NULL)
    {
        HWTrace (0x3010);
        return;
    }

    in_state = otg->state;

    switch(otg->state) 
    {
    case a_idle:
        HWTrace (0x3011);
        a_idle_state(otg);
        break;

    case a_wait_vrise:
        HWTrace (0x3012);
        a_wait_vrise_state(otg);
        break;

    case a_wait_bcon:
        HWTrace (0x3013);
        a_wait_bcon_state(otg);
        break;
        
    case a_host:
        HWTrace (0x3014);
        a_host_state(otg);
        break;
    case a_suspend:
        HWTrace (0x3015);
        a_suspend_state(otg);
        break;  
        
    case a_peripheral:
        HWTrace (0x3016);
        a_peripheral_state(otg);
        break;
                
    case a_vbus_err:
        HWTrace (0x3017);
        a_vbus_err_state(otg);
        break;
        
    case a_wait_vfall:
        HWTrace (0x3018);
        a_wait_vfall_state(otg);
        break;
    
    case b_idle:
        HWTrace (0x3019);
        b_idle_state(otg);
        break;

    case b_srp_init:
        HWTrace (0x301A);
        b_srp_init_state(otg);
        break;

    case b_peripheral:
        HWTrace (0x301B);
        b_peripheral_state(otg);
        break;

    case b_wait_acon:
        HWTrace (0x301C);
        b_wait_acon_state(otg);
        break;

    case b_host:
        HWTrace (0x301D);
        b_host_state(otg);
        break;
    default: 
        cy_err("update_otg_state: unknown state!");
        HWTrace (0x301E);
        break;
    }

    /*
    cy_err("otg update: enter:%s, exit:%s", 
            state_names[in_state], state_names[otg->state]);
            */
}

/* End of file: otg.c */