xhyper255.c

linux嵌入式课程实践中的一个关于声卡驱动程序 。

/*
 *  linux/arch/arm/mach-pxa/xhyper255.c
 *
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 *
 */


#include <linux/init.h>
#include <linux/major.h>
#include <linux/fs.h>
#include <linux/interrupt.h>
#include <linux/sched.h>

#include <asm/types.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <asm/hardware.h>
#include <asm/irq.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>

#include <asm/io.h>
#include <asm/arch/irq.h>

#include "generic.h"

unsigned short hyper_port0=0;
unsigned short hyper_port1=0;
unsigned short hyper_port2=0;
unsigned short hyper_port3=0;

static void __init xhyper255_init_irq(void)
{
	pxa_init_irq();
	set_GPIO_IRQ_edge( 0, GPIO_RISING_EDGE);  /* Ethernet Interrupt */
#ifdef CONFIG_ARCH_XHYPER255B
	set_GPIO_IRQ_edge(IRQ_TO_GPIO_2_80(IRQ_GPIO_ADS7843), GPIO_FALLING_EDGE); /* ADS7843 touch controller */
	set_GPIO_IRQ_edge(IRQ_TO_GPIO_2_80(IRQ_GPIO_EZHOST),  GPIO_RISING_EDGE);  /* EZ-Host USB HOST controller */
#elif defined(CONFIG_ARCH_XHYPER255A)
	set_GPIO_IRQ_edge(IRQ_TO_GPIO_2_80(IRQ_GPIO_ADS7843), GPIO_FALLING_EDGE); /* ADS7843 touch controller */
#endif
	
}

static int __init xhyper255_init(void)
{
	return 0;
}

__initcall(xhyper255_init);
static void __init
fixup_xhyper255(struct machine_desc *desc, struct param_struct *params,
		char **cmdline, struct meminfo *mi)
{
#ifdef CONFIG_ARCH_XHYPER255B
	SET_BANK (0, 0xA0000000, 64*1024*1024);
	mi->nr_banks      = 1;
#if CONFIG_BLK_DEV_RAM
	setup_ramdisk (1, 0, 0, CONFIG_BLK_DEV_RAM_SIZE);
	setup_initrd (__phys_to_virt(0xA1000000), 4*1024*1024);
	ROOT_DEV = MKDEV(RAMDISK_MAJOR,0);
#endif //CONFIG_BLK_DEV_RAM                                 

#elif defined(CONFIG_ARCH_XHYPER255A)
        SET_BANK (0, 0xA0000000, 32*1024*1024);
	mi->nr_banks      = 1;
#if CONFIG_BLK_DEV_RAM
	setup_ramdisk (1, 0, 0, CONFIG_BLK_DEV_RAM_SIZE);
	setup_initrd (__phys_to_virt(0xA0800000), 4*1024*1024);
	ROOT_DEV = MKDEV(RAMDISK_MAJOR,0);
#endif //CONFIG_BLK_DEV_RAM				

#endif //CONFIG_ARCH_XHYPER255
}

static struct map_desc xhyper255_io_desc[] __initdata = {
 /* virtual     physical    length      domain     r  w  c  b */
#ifdef CONFIG_ARCH_XHYPER255B
 { 0xE8000000,  0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, // CS0 : Intel Strata Flash 32M
#elif defined(CONFIG_ARCH_XHYPER255A)
 { 0xE8000000,  0x00000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, // CS0 : Intel Strata Flash 16M 
#endif
 
 { 0xF0000000,  0x04000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, // CS1 : CS8900A

#ifdef CONFIG_ARCH_XHYPER255B
 { 0xf0110000,  0x08000000, 0x00010000, DOMAIN_IO, 0, 1, 0, 0 }, // CS2 : Extend PORT0
 { 0xf0120000,  0x08100000, 0x00010000, DOMAIN_IO, 0, 1, 0, 0 }, // CS2 : Extend PORT1
 { 0xf0130000,  0x08200000, 0x00010000, DOMAIN_IO, 0, 1, 0, 0 }, // CS2 : Extend PORT2
 { 0xf0140000,  0x08300000, 0x00010000, DOMAIN_IO, 0, 1, 0, 0 }, // CS2 : extend PORT3
 { 0xf1000000,  0x0C700000, 0x00010000, DOMAIN_IO, 0, 1, 0, 0 }, // CS3 : Ez-Host
#elif defined(CONFIG_ARCH_XHYPER255A)
 { 0xF0200000,  0x04700000, 0x00010000, DOMAIN_IO, 0, 1, 0, 0 }, // CS1 : 255A ADS7843/LCD
#endif
 LAST_DESC
};

static void __init xhyper255_map_io(void)
{
	pxa_map_io();
	iotable_init(xhyper255_io_desc);

 	/* setup memory timing for CS0/1 */
	
#ifdef CONFIG_ARCH_XHYPER255B
        MSC0 = MSC_CS(0, MSC_RBUFF(MSC_RBUFF_SLOW) |
                         MSC_RRR(7) |
                         MSC_RDN(15) |
                         MSC_RDF(15) |
                         MSC_RBW(0) | //32bit
                         MSC_RT(0)) |
#elif defined(CONFIG_ARCH_XHYPER255A)
		MSC0 = MSC_CS(0, MSC_RBUFF(MSC_RBUFF_SLOW) |
						MSC_RRR(7) |
						MSC_RDN(15) |
						MSC_RDF(15) |  
						MSC_RBW(1) |   //16bit
						MSC_RT(0)) |			
#endif
        MSC_CS(1, MSC_RBUFF(MSC_RBUFF_SLOW) |
                         MSC_RRR(7) |
                         MSC_RDN(15) |
                         MSC_RDF(15) |
                         MSC_RBW(1) |
                         MSC_RT(0));
        printk(KERN_INFO "MCS0 = 0x%08x\n", MSC0);

        /* setup memory timing for CS2/3 */
        MSC1 = MSC_CS(2, MSC_RBUFF(MSC_RBUFF_SLOW) |
                         MSC_RRR(5) |
                         MSC_RDN(10) |
                         MSC_RDF(10) |
                         MSC_RBW(1) |
                         MSC_RT(0)) |
               MSC_CS(3, MSC_RBUFF(MSC_RBUFF_SLOW) |
                         MSC_RRR(5) |
                         MSC_RDN(10) |
                         MSC_RDF(10) |
                         MSC_RBW(1) |
                         MSC_RT(0));
        printk(KERN_INFO "MCS1 = 0x%08x\n", MSC1);

        /* setup memory timing for CS4/5 */
        MSC2 = MSC_CS(4, MSC_RBUFF(MSC_RBUFF_SLOW) |
                         MSC_RRR(2) |
                         MSC_RDN(4) |
                         MSC_RDF(4) |
                         MSC_RBW(1) |
                         MSC_RT(0)) |
               MSC_CS(5, MSC_RBUFF(MSC_RBUFF_SLOW) |
                         MSC_RRR(2) |
                         MSC_RDN(4) |
                         MSC_RDF(4) |
                         MSC_RBW(1) |
                         MSC_RT(0));
        printk(KERN_INFO "MCS2 = 0x%08x\n", MSC2);
		
}

MACHINE_START(XHYPER255, "HYBUS X-Hyper255")
	MAINTAINER("Hybus Co,.ltd")
	BOOT_MEM(0xa0000000, 0x40000000, 0xfc000000)
	BOOT_PARAMS(0xa0000100)
	FIXUP(fixup_xhyper255)
	MAPIO(xhyper255_map_io)
	INITIRQ(xhyper255_init_irq)
MACHINE_END