cpu.hpp

SNES game emulator. C and asm files.

/*  CPU.HPP - 65c816 emulation stuff
*/

#define AUTOBACKFILESIZE 207000
#define AUTOBACKSPCSIZE 65600
extern byte *autobacktrackmem[10];
extern int autobackpos[9], autobacksize[9];
extern int autoback_countdown, autoback_restorecount;
size_t vfwrite(void *buf, size_t elsize, size_t nelem, FILE *fp);
size_t vfread (void *buf, size_t elsize, size_t nelem, FILE *fp);
FILE *vfopen (const char *filename, const char *mode);
void alloc_autobacktrack(int num);
void dealloc_autobacktrack();
void restorebacktrack ();
void savebacktrack ();
int vfeof (FILE *fp);
void vfclose (FILE *fp);
void dohdmaline ();
void savetallies ();

extern byte ram [0x20000], sram [0x10000], expram [0x2000];
extern byte vram [0x10000];
extern byte cgram [512], oam [544];

extern "C" {
	extern byte __cdecl registers [0x4000];
	extern int __cdecl frame_cycles, screen_scanline, total_frames, cycles_per_scan;
	extern int scan_cycles;
	extern byte __cdecl *startaddr [0x800];
	/*  For quick address aaccess.  To access a 65c816 address bb.aaaa, stored in variable addr:
		startaddr [addr >> 13] + (addr & 0x1FFF)
		This array is filled by getstartaddresses ().
	*/
	extern long __cdecl debug_instr;
	extern boolean returntogui;
	extern byte *rom;
}

extern boolean debugmode;

extern boolean showfps;

extern long framestarttime;
extern int snesframe;

extern int instantsaveslot;

struct headerdata {
	boolean hirom; // Apparent HiROM
	word hadd; // Set to 512
	char name [22];
	byte romsize; // Megabits
	byte sramsize; // Kilobits
	boolean fastrom;
	byte country, license, version;
	word resetvector, nmivector;
};

extern struct headerdata curheader; // Header of ROM that is currently loaded

#define SNESMEM(addr) (startaddr [(addr) >> 13] + ((addr) & 0x1FFF))

//byte *SNESMEM(int addr);

//#pragma aux SNESMEM = \
"mov edi,eax"\
"shr eax,11"\
"and al,0xFC"\
"and edi,01FFFh"\
"mov eax,[startaddr+eax]"\
"add edi,eax"\
parm [eax] modify [eax edi] value [edi];

//extern dword PC;
//extern word Y;
//extern word X;
//extern byte DBR;
//extern word D;
//extern word A;
//extern byte P;
//extern dword S;  
//extern boolean E;

extern struct opcodeinfo {
	char *format; // The first three bytes MUST BE THE OPCODE.
	// The description will be looked up according to the first three bytes.
	// S - stack relative
	// A - implicitly uses accumulator (no argument)
	// X and Y - Implied arguments specifying index registers X or Y.
	// %# - number.  This will be assumed to be a word if M=0, otherwise a byte.
	// %#i - number, but size is dependant on the X (Index) flag.
	// %#b - byte number.  Used with CLP and SEP.
	//      Numbers are automatically prefixed with "#".
	// %b - Argument is a 8-bit byte.
	// %w - Argument is a 16-bit word.
	// %L - Argument is a long address (3 bytes.)
	// @%b and @%w - Program counter reletive; signed byte or word.
	byte bytes, cycles;
} opcodelist[];

char *getaccessoryname (char *fn, char *dir, char *ext);
void savesram ();
void loadsram ();
boolean instantsave (int slot, boolean autobacktrack = false);
boolean instantload (int slot, boolean autobacktrack = false);

void resetsystem (boolean warmreset);
void getstartaddresses (boolean hirom);
void runsnes ();
void unassemble (dword opdata, char *s, byte P);
char *getdescr (byte opcode);

void startvblank ();
void startcpuframe ();
void startscanline ();
boolean ishirom ();
boolean ispal ();

extern "C" {
	byte __cdecl near *trapregread (byte *ptr, boolean wordread);
	byte __cdecl near *trapregwrite (byte *ptr, boolean wordwrite);
}

void togglecheat (int n);

/*  Apparent VRAM organization notes:
	2107 is the BG1 VRAM location register.  Bits 2-7 in this register specify
	the BYTE address of where the TILE MAP starts.  That is,
		LDA.b #4
		STA $2107  ; would mean that the tile map for BG1 starts at vram[2048]
	In other words, shift the value left by 11.
	Bits 0-1 are the "SC Size", meaning the dimensions of the tile map.
	Sizes are 0:32x32 1:32x64 2:64x32 3:64x64
	Each element in the tile map is two bytes and formatted like so:
		YXpc ccNN NNNN NNNN   Y = mirror y     X = mirror x   p=priority bit
		fedc ba98 7654 3210   ccc = palette nr (8 palettes)   NN.. = character number
	The location where the actual tiles start (for all four BGs) is selected
	with the registers $210B and $210C.  (Four bits per BG.)  This number
	is shifted left by 12 to get the final address.  At this location is an
	array of tiles, and the size of the elements of this array is calculated
	by: tile width * tile height * bit planes / 8 = bytes per tile
	eg in mode 0 it would be either 8*8*2/8=16, or 16x16x2/8=64.
	the palette is selected by bits 10-12 in the tile map; where a given
	palette number starts is given by: palette_number << bitplanes.
	
	Sprites: information about the sprites is stored in OAM.  Each sprite has
	4 bytes plus 2 bits of information about it in OAM.  This information is:
	Byte 0 xxxxxxxx  x: X-location.      c: Playfield priority.
	Byte 1 yyyyyyyy  y: Y-location.      d: Playfield priority.
	Byte 2 abcdeeeC  a: Vertical flip.   e: Pallete #.
	Byte 3 CCCCCCCC  b: Horizontal flip. C: Tile where the sprite data starts.
	Note: sprite palette 0 is the eighth palette (color 128?)
	The C bits index into another array of tiles.  This array of tiles starts
	at the location selected by bits 0-2 of $2101.  The value here is shifted
	left 14 (multiplied by 16384) to get the location in VRAM.  Add this to
	C multiplied by 32 to get the starting location of the sprite's bitmap.
	All tiles are made up of 8x8, 16 color (4 bit plane) sprites.  Sprites
	that are larger than 8x8 are made up of many of these 8x8 tiles; these
	tiles are organised left to right, and then top to bottom.
*/

/*REGISTERS*/

/*OAM (objects) REGISTERS**************************************************/
#define REG2101 ((byte*)(registers + 0x0101))
	// OAM Size register
	//Sprite sizes: b5-7: 000 =  8x8  or 16x16. 001 =  8x8  or 32x32.
	//                    010 =  8x8  or 64x64. 011 = 16x16 or 32x32.
	//                    100 = 16x16 or 64x64. 101 = 32x32 or 64x64.
	//b3-4: Name selection (upper 4k word addr).
	//b0-2: Base selection (8k word seg. addr).
#define REG2102 ((word*)(registers + 0x0102))
	// OAM address register b7 of loword is OAM priority rotation b0, is OAM address MSBit
	// hi word is OAM address LSByte
#define REG2104 ((byte*)(registers + 0x0104))
	// OAM Data write register
#define REG2138 ((byte*)(registers + 0x0138)) /*read-only*/
	// OAM Data read register

/*VIDEO REGISTERS/VRAM UPLOAD**********************************************/
#define REG2100 ((byte*)(registers + 0x0100))
	// Screen display register b7: 0=screen on 1=screen off
	// b0-3: brightness, 0xF = full
#define REG2105 ((byte*)(registers + 0x0105))
	// Screen mode register
#define REG2106 ((byte*)(registers + 0x0106))
	// Screen pixellation (Mosaic) b0-3 which BG to affect b4-7 pixel size
#define REG2107(plane) ((byte*)(registers + 0x0107 + plane))
	// VRAM Location register (BGxSC) (Tile maps)
	// $2107 to $210A b2-7:base address(*1K) b0-1:SC size
	// SC Sizes are 32x32, 32x64, 64x32 or 64x64. (In that order??)
#define REG210B ((word*)(registers + 0x010B))
	// Tile VRAM address (*8K, 4 bits for each BG)