emu65816.asm

SNES game emulator. C and asm files.

	dobreak
op2Cm1x0:
op2Cm1x1:
	load_abs
	docount 3, 4
	bit8
	dobreak
op2Dm0x0: ;	"AND %w", 3, 4,
op2Dm0x1:
	load_abs
	docount 3, 4+1
	and16
	dobreak
op2Dm1x0:
op2Dm1x1:
	load_abs
	docount 3, 4
	and8
	dobreak
op2Em0x0: ;	"ROL %w", 3, 6,
op2Em0x1:
	load_abs
	docount 3, 6+1
	rol16
	dobreak
op2Em1x0:
op2Em1x1:
	load_abs
	docount 3, 6
	rol8
	dobreak
op2Fm0x0: ;	"AND %L", 4, 5,
op2Fm0x1:
	load_abs_long
	docount 4, 5+1
	and16
	dobreak
op2Fm1x0:
op2Fm1x1:
	load_abs_long
	docount 4, 5
	and8
	dobreak
op30m0x0: ;	"BMI @%b", 2, 2,
op30m0x1:
op30m1x0:
op30m1x1:
	add edx, 2   ; PC += 2
	test cl, FNEGATIVE
	jnz @F       ; Branch
	sub esi, 2   ; cycle count
	dobreak
@@: shr ebx, 8
	sub esi, 3   ; cycle count
	movsx ebx, bl ; signed byte
	add dx, bx
	dobreak
op31m0x0: ;	"AND (<%b),Y", 2, 5,
	load_dir_indir_index_y16
	docount 2, 5+1
	and16
	dobreak
op31m0x1:
	load_dir_indir_index_y8
	docount 2, 5+1
	and16
	dobreak
op31m1x0:
	load_dir_indir_index_y16
	docount 2, 5
	and8
	dobreak
op31m1x1:
	load_dir_indir_index_y8
	docount 2, 5
	and8
	dobreak
op32m0x0: ;	"AND (<%b)", 2, 5,
op32m0x1:
	load_dir_indir
	docount 2, 5+1
	and16
	dobreak
op32m1x0:
op32m1x1:
	load_dir_indir
	docount 2, 5
	and8
	dobreak
op33m0x0: ;	"AND (<%b,s),Y", 2, 7,
	load_s_rel_indir_index_y16
	docount 2, 7+1
	and16
	dobreak
op33m0x1:
	load_s_rel_indir_index_y8
	docount 2, 7+1
	and16
	dobreak
op33m1x0:
	load_s_rel_indir_index_y16
	docount 2, 7
	and8
	dobreak
op33m1x1:
	load_s_rel_indir_index_y8
	docount 2, 7
	and8
	dobreak
op34m0x0: ;	"BIT <%b,X", 2, 4,
	load_dir_index_x16
	docount 2, 4+1
	bit16
	dobreak
op34m0x1:
	load_dir_index_x8
	docount 2, 4+1
	bit16
	dobreak
op34m1x0:
	load_dir_index_x16
	docount 2, 4
	bit8
	dobreak
op34m1x1:
	load_dir_index_x8
	docount 2, 4
	bit8
	dobreak
op35m0x0: ;	"AND <%b,X", 2, 4,
	load_dir_index_x16
	docount 2, 4+1
	and16
	dobreak
op35m0x1:
	load_dir_index_x8
	docount 2, 4+1
	and16
	dobreak
op35m1x0:
	load_dir_index_x16
	docount 2, 4
	and8
	dobreak
op35m1x1:
	load_dir_index_x8
	docount 2, 4
	and8
	dobreak
op36m0x0: ;	"ROL <%b,X", 2, 6,
	load_dir_index_x16
	docount 2, 6+1
	rol16
	dobreak
op36m0x1:
	load_dir_index_x8
	docount 2, 6+1
	rol16
	dobreak
op36m1x0:
	load_dir_index_x16
	docount 2, 6
	rol8
	dobreak
op36m1x1:
	load_dir_index_x8
	docount 2, 6
	rol8
	dobreak
op37m0x0: ;	"AND [<%b],Y", 2, 6,
	load_dir_indir_long_index_y16
	docount 2, 6+1
	and16
	dobreak
op37m0x1:
	load_dir_indir_long_index_y8
	docount 2, 6+1
	and16
	dobreak
op37m1x0:
	load_dir_indir_long_index_y16
	docount 2, 6
	and8
	dobreak
op37m1x1:
	load_dir_indir_long_index_y8
	docount 2, 6
	and8
	dobreak
op38m0x0: ;	"SEC", 1, 2,
op38m0x1:
op38m1x0:
op38m1x1:
	or  cl, FCARRY
	docount 1, 2
	dobreak
op39m0x0: ;	"AND %w,Y", 3, 4,
	load_abs_index_y16
	docount 3, 4+1
	and16
	dobreak
op39m0x1:
	load_abs_index_y8
	docount 3, 4+1
	and16
	dobreak
op39m1x0:
	load_abs_index_y16
	docount 3, 4
	and8
	dobreak
op39m1x1:
	load_abs_index_y8
	docount 3, 4
	and8
	dobreak
op3Am0x0: ;	"DEC A", 1, 2,
op3Am0x1:
	docount 1, 2
	deca16
	dobreak
op3Am1x0:
op3Am1x1:
	docount 1, 2
	deca8
	dobreak
op3Bm0x0: ;	"TSA", 1, 2,
op3Bm0x1:
op3Bm1x0:
op3Bm1x1:
	mov eax, dword [_reg.S]
	docount 1, 2
	mov dword [_reg.A], eax
	and cl, 0FFh-FNEGATIVE-FZERO
	test eax, eax
	jnz @F
	or  cl, FZERO
@@:	test ah, 80h
	jz @F
	or cl, FNEGATIVE
@@:	dobreak
op3Cm0x0: ;	"BIT %w,X", 3, 4,
	load_abs_index_x16
	docount 3, 4+1
	bit16
	dobreak
op3Cm0x1:
	load_abs_index_x8
	docount 3, 4+1
	bit16
	dobreak
op3Cm1x0:
	load_abs_index_x16
	docount 3, 4
	bit8
	dobreak
op3Cm1x1:
	load_abs_index_x8
	docount 3, 4
	bit8
	dobreak
op3Dm0x0: ;	"AND %w,X", 3, 4,
	load_abs_index_x16
	docount 3, 4+1
	and16
	dobreak
op3Dm0x1:
	load_abs_index_x8
	docount 3, 4+1
	and16
	dobreak
op3Dm1x0:
	load_abs_index_x16
	docount 3, 4
	and8
	dobreak
op3Dm1x1:
	load_abs_index_x8
	docount 3, 4
	and8
	dobreak
op3Em0x0: ;	"ROL %w,X", 3, 7,
	load_abs_index_x16
	docount 3, 7+1
	rol16
	dobreak
op3Em0x1:
	load_abs_index_x8
	docount 3, 7+1
	rol16
	dobreak
op3Em1x0:
	load_abs_index_x16
	docount 3, 7
	rol8
	dobreak
op3Em1x1:
	load_abs_index_x8
	docount 3, 7
	rol8
	dobreak
op3Fm0x0: ;	"AND %L,X", 4, 5,
	load_abs_long_index_x16
	docount 4, 5+1
	and16
	dobreak
op3Fm0x1:
	load_abs_long_index_x8
	docount 4, 5+1
	and16
	dobreak
op3Fm1x0:
	load_abs_long_index_x16
	docount 4, 5
	and8
	dobreak
op3Fm1x1:
	load_abs_long_index_x8
	docount 4, 5
	and8
	dobreak
op40m0x0: ;	"RTI", 1, 7,
op40m0x1:
op40m1x0:
op40m1x1:
	pullbyte cl
	test cl, 10h  ; 8-bit index?
	jz @F
	and dword [_reg.X], 0FFh ; clear high bytes
	and dword [_reg.Y], 0FFh
@@:	xor ebx, ebx
	pullbyte bl
	xor edx, edx
	pullbyte bh
	pullbyte dl
	shl edx, 16
	sub esi, 7
	or  edx, ebx
	dobreak_mxchange
op41m0x0: ;	"XOR (<%b,X)", 2, 6,
	load_dir_index_indir_x16
	docount 2, 6+1
	xor16
	dobreak
op41m0x1:
	load_dir_index_indir_x8
	docount 2, 6+1
	xor16
	dobreak
op41m1x0:
	load_dir_index_indir_x16
	docount 2, 6
	xor8
	dobreak
op41m1x1:
	load_dir_index_indir_x8
	docount 2, 6
	xor8
	dobreak
op42m0x0: ;	"???", 2, 2, (WDM)
op42m0x1:
op42m1x0:
op42m1x1:
	docount 2, 2
	dobreak
op43m0x0: ;	"XOR <%b,s", 2, 4,
op43m0x1:
	load_s_rel
	docount 2, 4+1
	xor16
	dobreak
op43m1x0:
op43m1x1:
	load_s_rel
	docount 2, 4
	xor8
	dobreak
op44m0x0: ;	"MVP XYA %w", 3, 7,
op44m1x0:
	; EBX:  BL  BH  3rd  4th
	;       opc dst src        (dbr<<16)+y = (src&0xFF0000)+x
	mov byte [_reg.DBR], bh
	sub esi, 7
	and ebx, 00FF0000h               ; Source
	mov edi, dword [_reg.DBR_2less]  ; Destination
	or  ebx, dword [_reg.X]
	or  edi, dword [_reg.Y]
	convert_snesptr ebx
	convert_snesptr edi
	trapandread8 ebx
	trapandwrite8 edi, bl
	dec_word [_reg.A]
	dec_word [_reg.X]
	dec_word [_reg.Y]
	cmp dword [_reg.A], 0000FFFFh
	jne @F
	add edx, 3
@@: dobreak
op44m0x1:
op44m1x1:
	; EBX:  BL  BH  3rd  4th
	;       opc dst src        (dbr<<16)+y = (src&0xFF0000)+x
	mov byte [_reg.DBR], bh
	sub esi, 7
	and ebx, 00FF0000h               ; Source
	mov edi, dword [_reg.DBR_2less]  ; Destination
	movzx eax,byte [_reg.Y]
	or  bl,   byte [_reg.X]
	or  edi, eax
	convert_snesptr ebx
	convert_snesptr edi
	trapandread8 ebx
	trapandwrite8 edi, bl
	dec_word [_reg.A]
	dec byte [_reg.X]
	dec byte [_reg.Y]
	cmp dword [_reg.A], 0000FFFFh
	jne @F
	add edx, 3
@@: dobreak
op45m0x0: ;	"XOR <%b", 2, 3,
op45m0x1:
	load_dir
	docount 2, 3+1
	xor16
	dobreak
op45m1x0:
op45m1x1:
	load_dir
	docount 2, 3
	xor8
	dobreak
op46m0x0: ;	"SHR <%b", 2, 5,
op46m0x1:
	load_dir
	docount 2, 5+1
	shr16
	dobreak
op46m1x0:
op46m1x1:
	load_dir
	docount 2, 5
	shr8
	dobreak
op47m0x0: ;	"XOR [<%b]", 2, 6,
op47m0x1:
	load_dir_indir_long
	docount 2, 6+1
	xor16
	dobreak
op47m1x0:
op47m1x1:
	load_dir_indir_long
	docount 2, 6
	xor8
	dobreak
op48m0x0: ;	"PSH A", 1, 3, // PHA
op48m0x1:
	mov ebx, dword [_reg.A]
	docount 1, 3+1
	pushbyte bh
	pushbyte bl
	dobreak
op48m1x0:
op48m1x1:
	mov bl, byte [_reg.A]
	docount 1, 3
	pushbyte bl
	dobreak
op49m0x0: ;	"XOR %#", 2, 2,
op49m0x1:
	get_imm
	docount 2+1, 2+1
	xor16 imm
	dobreak
op49m1x0:
op49m1x1:
	get_imm
	docount 2, 2
	xor8 imm
	dobreak
op4Am0x0: ;	"SHR A", 1, 2,
op4Am0x1:
	docount 1, 2
	shr16_a
	dobreak
op4Am1x0:
op4Am1x1:
	docount 1, 2
	shr8_a
	dobreak
op4Bm0x0: ;	"PSH PBR", 1, 3, // PHK
op4Bm0x1:
op4Bm1x0:
op4Bm1x1:
	mov ebx, edx
	inc edx
	shr ebx, 16
	sub esi, 3
	pushbyte bl
	dobreak
op4Cm0x0: ;	"JMP %w", 3, 3,
op4Cm0x1:
op4Cm1x0:
op4Cm1x1:
	shr ebx, 8
	and edx, 00FF0000h
	and ebx, 0000FFFFh
	sub esi, 3
	or  edx, ebx
	dobreak
op4Dm0x0: ;	"XOR %w", 3, 4,
op4Dm0x1:
	load_abs
	docount 3, 4+1
	xor16
	dobreak
op4Dm1x0:
op4Dm1x1:
	load_abs
	docount 3, 4
	xor8
	dobreak
op4Em0x0: ;	"SHR %w", 3, 6,
op4Em0x1:
	load_abs
	docount 3, 6+1
	shr16
	dobreak
op4Em1x0:
op4Em1x1:
	load_abs
	docount 3, 6
	shr8
	dobreak
op4Fm0x0: ;	"XOR %L", 4, 5,
op4Fm0x1:
	load_abs_long
	docount 4, 5+1
	xor16
	dobreak
op4Fm1x0:
op4Fm1x1:
	load_abs_long
	docount 4, 5
	xor8
	dobreak
op50m0x0: ;	"BVC @%b", 2, 2,
op50m0x1:
op50m1x0:
op50m1x1:
	add