spcops.inc

NES game Emulator in Linux.c and asm codes.

 inc R_NativePC
 shr al,byte 1
 sbb cl,cl
 mov B_A,al
 STORE_FLAGS_NZC al,cl
 OPCODE_EPILOG

; 5D
SPC_MOV_reg_reg X__A,B_X,B_A
; 5E
SPC_CMP_Y abs
; 5F

ALIGNC
EXPORT_C SPC_JMP_abs
 mov al,[1+R_NativePC]
 mov ah,[2+R_NativePC]
 cmp eax,0xFFC0
 mov R_NativePC,eax
 mov eax,[SPC_FFC0_Address]
 jnb .possible_rom
 mov eax,C_LABEL(SPCRAM)
.possible_rom:
 add R_NativePC,eax
 mov B_SPC_Code_Base,eax
 OPCODE_EPILOG

; 60
ALIGNC
EXPORT_C SPC_CLRC
 inc R_NativePC
 STORE_FLAGS_C ah
 OPCODE_EPILOG

; 61
TCALL 6
; 62 - SPC_SET1 in SPCmain.S
; 63 - SPC_BBS in SPCmain.S
; 64
SPC_CMP_A dp
; 65
SPC_CMP_A abs
; 66
SPC_CMP_A OXO
; 67
SPC_CMP_A OOdp_XOO
; 68
ALIGNC
EXPORT_C SPC_CMP_A_IM
 SPC_CMP_reg_IM B_A

; 69
SPC_CMP_mem dp_dp
; 6A
ALIGNC
EXPORT_C SPC_AND1C  ; Carry flag = Carry flag AND !mem.bit
 ADDR_membit    ; bx contains mem and cx contains bit number
 GET_BYTE_SPC
 ; C = C && !(byte & bit)
 mov cl,[offset_to_bit+ecx]
 and al,cl
 jz SPC_RETURN      ; C && !0 = C
 STORE_FLAGS_C 0    ; C && !1 = 0
 OPCODE_EPILOG

; 6B
SPC_ROR dp
; 6C
SPC_ROR abs
; 6D
SPC_PUSH_reg Y,B_Y
; 6E
ALIGNC
EXPORT_C SPC_DBNZ_dp
 mov ebx,B_SPC_PAGE
 mov bl,[1+R_NativePC]  ; get dp
 add R_NativePC,byte 3
 GET_BYTE_SPC           ; get (dp)
 dec al
 SET_BYTE_SPC
 test al,al
 jz SPC_RETURN

 movsx eax,byte [R_NativePC-1]  ; sign extend for addition
 short_branch
 OPCODE_EPILOG

; 6F
ALIGNC
EXPORT_C SPC_RET
 POP_W
 cmp eax,0xFFC0
 mov R_NativePC,eax
 mov eax,[SPC_FFC0_Address]
 jnb .possible_rom
 mov eax,C_LABEL(SPCRAM)
.possible_rom:
 add R_NativePC,eax
 mov B_SPC_Code_Base,eax
 OPCODE_EPILOG

; 70
SPC_BFS BVS,SPC_FLAG_V
; 71
TCALL 7
; 72 - SPC_CLR1 in SPCmain.S
; 73 - SPC_BBC in SPCmain.S
; 74
SPC_CMP_A Odp_XO
; 75
SPC_CMP_A Oabs_XO
; 76
SPC_CMP_A Oabs_YO
; 77
SPC_CMP_A OOdpO_YO
; 78
SPC_CMP_mem dp_IM
; 79
SPC_CMP_mem OXO_OYO
; 7A

ALIGNC
EXPORT_C SPC_ADDW_YA_dp
 STORE_FLAGS_V ah
 ADDR_dp
 GET_WORD_SPC        ; get DP word
 mov ebx,B_YA
 add bx,ax
 lahf
 mov B_YA,ebx
 jno .no_overflow
 STORE_FLAGS_V 1
.no_overflow:
 sbb cl,cl
 STORE_FLAGS_N bh
 or bl,bh
 STORE_FLAGS_C cl
 STORE_FLAGS_Z bl
 STORE_FLAGS_H ah
 OPCODE_EPILOG

; 7B
SPC_ROR Odp_XO
; 7C

ALIGNC
EXPORT_C SPC_ROR_A
 mov cl,B_C_flag
 inc R_NativePC
 add cl,255 ;MAKE_CARRY
 mov al,B_A
 rcr al,1
 sbb cl,cl
 mov B_A,al
 STORE_FLAGS_NZC al,cl
 OPCODE_EPILOG

; 7D
SPC_MOV_reg_reg A__X,B_A,B_X
; 7E
SPC_CMP_Y dp
; 7F - RETI - not yet implemented

; 80
ALIGNC
EXPORT_C SPC_SETC
 mov al,1
 inc R_NativePC
 STORE_FLAGS_C al
 OPCODE_EPILOG

; 81
TCALL 8
; 82 - SPC_SET1 in SPCmain.S
; 83 - SPC_BBS in SPCmain.S
; 84
SPC_ADC_A dp
; 85
SPC_ADC_A abs
; 86
SPC_ADC_A OXO
; 87
SPC_ADC_A OOdp_XOO
; 88
ALIGNC
EXPORT_C SPC_ADC_A_IM
 STORE_FLAGS_V ah
 mov al,[1+R_NativePC]
 mov cl,B_C_flag
 add R_NativePC,byte 2
 add cl,255 ;MAKE_CARRY
 mov cl,B_A
 adc cl,al
 lahf
 mov B_A,cl
 jno .no_overflow
 STORE_FLAGS_V 1
.no_overflow:
 sbb al,al
 STORE_FLAGS_NZ cl
 STORE_FLAGS_C al
 STORE_FLAGS_H ah
 OPCODE_EPILOG

; 89
SPC_ADC_mem dp_dp
; 8A
ALIGNC
EXPORT_C SPC_EOR1   ; Carry flag = Carry flag EOR mem.bit
 ADDR_membit    ; bx contains mem and cx contains bit number
 GET_BYTE_SPC
 mov cl,[offset_to_bit+ecx]
 and al,cl
 jz SPC_RETURN      ; C = C EOR 0 -> C = C
 mov al,B_C_flag
 cmp al,1
 sbb al,al
 STORE_FLAGS_C al   ; C = C EOR 1 -> C = !C
 OPCODE_EPILOG

; 8B
SPC_DEC dp
; 8C
SPC_DEC abs
; 8D
ALIGNC
EXPORT_C SPC_MOV_Y_IM
 SPC_MOV_reg_IM B_Y

; 8E
ALIGNC
EXPORT_C SPC_POP_PSW
 inc R_NativePC
 POP_B
 RESTOREFLAGS_SPC
 OPCODE_EPILOG

; 8F
ALIGNC
EXPORT_C SPC_MOV_dp_IM
 ADDR2_dp_IM al ; immediate byte in al
 SET_BYTE_SPC
 OPCODE_EPILOG

; 90
SPC_BFC BCC,SPC_FLAG_C
; 91
TCALL 9
; 92 - SPC_CLR1 in SPCmain.S
; 93 - SPC_BBC in SPCmain.S
; 94
SPC_ADC_A Odp_XO
; 95
SPC_ADC_A Oabs_XO
; 96
SPC_ADC_A Oabs_YO
; 97
SPC_ADC_A OOdpO_YO
; 98
SPC_ADC_mem dp_IM
; 99
SPC_ADC_mem OXO_OYO
; 9A

ALIGNC
EXPORT_C SPC_SUBW_YA_dp
 STORE_FLAGS_V ah
 ADDR_dp
 GET_WORD_SPC        ; get DP word
 mov ebx,B_YA
 sub bx,ax
 lahf
 mov B_YA,ebx
 jno .no_overflow
 STORE_FLAGS_V 1
.no_overflow:
 sbb cl,cl
 STORE_FLAGS_N bh
 or bl,bh
 xor cl,0xFF
 STORE_FLAGS_Z bl
 STORE_FLAGS_C cl
 STORE_FLAGS_H ah
 OPCODE_EPILOG

; 9B
SPC_DEC Odp_XO
; 9C
SPC_DEC_reg A,B_A
; 9D
SPC_MOV_reg_reg X__SP,B_X,B_SP
; 9E

ALIGNC
EXPORT_C SPC_DIV    ; This may not be 100% due to overflow checking!
 inc R_NativePC
 xor ebx,ebx
 mov bl,B_X
 test bl,bl         ; If zero skip divide!
 jz .overflow
 mov ax,B_YA        ; Dividend
 xor edx,edx
 div bx             ; Result is ax=quotient,dx=remainder
 test ah,ah         ; Check for overflow
 jnz .overflow
.no_overflow:
 mov [_Y],dl        ; Remainder in Y
;LOAD_BASE
 mov [_A],al        ; Quotient in A
 STORE_FLAGS_V ah
 STORE_FLAGS_NZ al
 OPCODE_EPILOG
ALIGNC
.overflow:
;LOAD_BASE
 mov ebx,0x80
 mov dword [_YA],0xFFFF
 STORE_FLAGS_N bl
 STORE_FLAGS_Z bl
 STORE_FLAGS_V bl
 OPCODE_EPILOG

; 9F

ALIGNC
EXPORT_C SPC_XCN
 mov al,B_A
 rol al,4
 inc R_NativePC
 mov B_A,al
 STORE_FLAGS_NZ al
 OPCODE_EPILOG

; A0
ALIGNC
EXPORT_C SPC_EI
 mov al,1
 inc R_NativePC
 STORE_FLAGS_I al
 OPCODE_EPILOG

; A1
TCALL 10
; A2 - SPC_SET1 in SPCmain.S
; A3 - SPC_BBS in SPCmain.S
; A4
SPC_SBC_A dp
; A5
SPC_SBC_A abs
; A6
SPC_SBC_A OXO
; A7
SPC_SBC_A OOdp_XOO
; A8 
ALIGNC
EXPORT_C SPC_SBC_A_IM
 STORE_FLAGS_V ah
 mov al,[1+R_NativePC]
 mov cl,B_C_flag
 add R_NativePC,byte 2
 cmp cl,1 ;MAKE_NOT_CARRY
 mov cl,B_A
 sbb cl,al
 lahf
 mov B_A,cl
 jno .no_overflow
 STORE_FLAGS_V 1
.no_overflow:
 sbb al,al
 STORE_FLAGS_N cl
 xor al,0xFF
 STORE_FLAGS_Z cl
 STORE_FLAGS_C al
 STORE_FLAGS_H ah
 OPCODE_EPILOG

; A9
SPC_SBC_mem dp_dp
; AA
ALIGNC
EXPORT_C SPC_MOV1_C_    ; Carry flag = mem.bit
 ADDR_membit        ; bx contains mem and cx contains bit number
 GET_BYTE_SPC
 mov cl,[offset_to_bit+ecx]
 and al,cl
 STORE_FLAGS_C al
 OPCODE_EPILOG

; AB
SPC_INC dp
; AC
SPC_INC abs
; AD
ALIGNC
EXPORT_C SPC_CMP_Y_IM
 SPC_CMP_reg_IM B_Y

; AE
SPC_POP_reg A,B_A
; AF
ALIGNC
EXPORT_C SPC_MOV_OXOInc_A
 ADDR_OXOInc
 mov al,B_A
 SET_BYTE_SPC
 OPCODE_EPILOG

; B0
SPC_BFS BCS,SPC_FLAG_C
; B1
TCALL 11
; B2 - SPC_CLR1 in SPCmain.S
; B3 - SPC_BBC in SPCmain.S
; B4
SPC_SBC_A Odp_XO
; B5
SPC_SBC_A Oabs_XO
; B6
SPC_SBC_A Oabs_YO
; B7
SPC_SBC_A OOdpO_YO
; B8
SPC_SBC_mem dp_IM
; B9
SPC_SBC_mem OXO_OYO
; BA

ALIGNC
EXPORT_C SPC_MOVW_YA_dp
 ADDR_dp
 xor eax,eax
 GET_WORD_SPC
 mov cl,al
 mov B_YA,eax
 or cl,ah
 STORE_FLAGS_N ah
 STORE_FLAGS_Z cl
 OPCODE_EPILOG

; BB
SPC_INC Odp_XO
; BC
SPC_INC_reg A,B_A
; BD

ALIGNC
EXPORT_C SPC_MOV_SP_X
 mov al,B_X
 inc R_NativePC
 mov B_SP,al
 OPCODE_EPILOG

; BE - DAS - not yet implemented
; BF

ALIGNC
EXPORT_C SPC_MOV_A_OXOInc
 ADDR_OXOInc
 GET_BYTE_SPC
 mov B_A,al
 STORE_FLAGS_NZ al
 OPCODE_EPILOG

; C0
ALIGNC
EXPORT_C SPC_DI
 inc R_NativePC
 STORE_FLAGS_I ah
 OPCODE_EPILOG

; C1
TCALL 12
; C2 - SPC_SET1 in SPCmain.S
; C3 - SPC_BBS in SPCmain.S
; C4
SPC_MOV_mem_A dp
; C5
SPC_MOV_mem_A abs
; C6
SPC_MOV_mem_A OXO
; C7
SPC_MOV_mem_A OOdp_XOO
; C8
ALIGNC
EXPORT_C SPC_CMP_X_IM
 SPC_CMP_reg_IM B_X

; C9
SPC_MOV_mem_X abs
; CA
ALIGNC
EXPORT_C SPC_MOV1__C    ; mem.bit = Carry flag
 ADDR_membit        ; bx contains mem and cx contains bit number
 GET_BYTE_SPC

 mov ah,B_C_flag
 test ah,ah
 jz .clear_bit

 mov cl,[offset_to_bit+ecx]
 or al,cl
 SET_BYTE_SPC
 OPCODE_EPILOG

ALIGNC
.clear_bit:
 mov cl,[offset_to_not+ecx]
 and al,cl
 SET_BYTE_SPC
 OPCODE_EPILOG

; CB
SPC_MOV_mem_Y dp
; CC
SPC_MOV_mem_Y abs
; CD
ALIGNC
EXPORT_C SPC_MOV_X_IM
 SPC_MOV_reg_IM B_X

; CE
SPC_POP_reg X,B_X
; CF
ALIGNC
EXPORT_C SPC_MUL
 inc R_NativePC
 mov al,B_Y
 mul byte B_A
 mov cl,al
 mov B_YA,eax
 or cl,ah
 STORE_FLAGS_N ah
 STORE_FLAGS_Z cl
 OPCODE_EPILOG

; D0
SPC_BFC BNE,SPC_FLAG_Z
; D1
TCALL 13
; D2 - SPC_CLR1 in SPCmain.S
; D3 - SPC_BBC in SPCmain.S
; D4
SPC_MOV_mem_A Odp_XO
; D5
SPC_MOV_mem_A Oabs_XO
; D6
SPC_MOV_mem_A Oabs_YO
; D7
SPC_MOV_mem_A OOdpO_YO
; D8
SPC_MOV_mem_X dp
; D9
SPC_MOV_mem_X Odp_YO
; DA

ALIGNC
EXPORT_C SPC_MOVW_dp_YA
 ADDR_dp
 mov eax,B_YA
 SET_WORD_SPC
 OPCODE_EPILOG

; DB
SPC_MOV_mem_Y Odp_XO
; DC
SPC_DEC_reg Y,B_Y
; DD
SPC_MOV_reg_reg A__Y,B_A,B_Y
; DE

ALIGNC
EXPORT_C SPC_CBNE_Odp_XO
 mov ebx,B_SPC_PAGE
 mov al,B_X
 mov bl,[1+R_NativePC]  ; get dp
 add R_NativePC,byte 3
 add bl,al
 GET_BYTE_SPC           ; Get (dp)
 cmp B_A,al
 je SPC_RETURN

 movsx eax,byte [R_NativePC-1]  ; sign extend for addition
 short_branch
 OPCODE_EPILOG

; DF - DAA - not yet implemented

; E0
ALIGNC
EXPORT_C SPC_CLRV
 inc R_NativePC
 STORE_FLAGS_H ah
 STORE_FLAGS_V ah
 OPCODE_EPILOG

; E1
TCALL 14
; E2 - SPC_SET1 in SPCmain.S
; E3 - SPC_BBS in SPCmain.S
; E4
SPC_MOV_A_mem dp
; E5
SPC_MOV_A_mem abs
; E6
SPC_MOV_A_mem OXO
; E7
SPC_MOV_A_mem OOdp_XOO
; E8
ALIGNC
EXPORT_C SPC_MOV_A_IM
 SPC_MOV_reg_IM B_A

; E9
SPC_MOV_X_mem abs
; EA
ALIGNC
EXPORT_C SPC_NOT1   ; !mem.bit
 ADDR_membit    ; bx contains mem and cx contains bit number
 GET_BYTE_SPC
 mov cl,[offset_to_bit+ecx]
 xor al,cl      ; complement the bit
 SET_BYTE_SPC
 OPCODE_EPILOG

; EB
SPC_MOV_Y_mem dp
; EC
SPC_MOV_Y_mem abs
; ED
ALIGNC
EXPORT_C SPC_NOTC
 mov al,B_C_flag
 inc R_NativePC
 cmp al,1
 sbb al,al
 STORE_FLAGS_C al
 OPCODE_EPILOG

; EE
SPC_POP_reg Y,B_Y
; EF
ALIGNC
EXPORT_C SPC_SLEEP
 OPCODE_EPILOG  ; What else can sleep do?

; F0
SPC_BFS BEQ,SPC_FLAG_Z
; F1
TCALL 15
; F2 - SPC_CLR1 in SPCmain.S
; F3 - SPC_BBC in SPCmain.S
; F4
SPC_MOV_A_mem Odp_XO
; F5
SPC_MOV_A_mem Oabs_XO
; F6
SPC_MOV_A_mem Oabs_YO
; F7
SPC_MOV_A_mem OOdpO_YO
; F8
SPC_MOV_X_mem dp
; F9
SPC_MOV_X_mem Odp_YO
; FA

ALIGNC
EXPORT_C SPC_MOV_dp_dp
 ADDR2_dp_dp al ; al is (s), bx d
 SET_BYTE_SPC
 OPCODE_EPILOG

; FB
SPC_MOV_Y_mem Odp_XO
; FC
SPC_INC_reg Y,B_Y
; FD
SPC_MOV_reg_reg Y__A,B_Y,B_A
; FE

ALIGNC
EXPORT_C SPC_DBNZ_Y
 mov al,B_Y
 add R_NativePC,byte 2
 dec al
 mov B_Y,al
 jz SPC_RETURN

 movsx eax,byte [R_NativePC-1]  ; sign extend for addition
 short_branch
 OPCODE_EPILOG

; FF

ALIGNC
EXPORT_C SPC_STOP
 OPCODE_EPILOG  ; What else can stop do?