dac.lst

Atmega8实例程序之-DAC的应用（SL-MEGA8开发板）

(0007) /*  目标MCU:MEGA8   晶振:外部(EXT) 8MHZ   */
(0008) /******************************************/
(0009) //  1、使用ICCAVR的终端调试窗口(Terminal)，进行通信调试。
(0010) //  2、对ICCAVR的终端调试窗口进行设置，设置串口为com1或com2,
(0011) //     通信波特率为19200(Tools->Environment Options...)。
(0012) //  3、将PC屏幕光标定位于调试窗口中。
(0013) #include <iom8v.h>
(0014) #define fosc 8000000 //晶振8MHZ
(0015) #define baud 19200	 //波特率
(0016) /*  		字符输出函数 		 */
(0017) void putchar(unsigned char c)
(0018) 	{	 
(0019)      while (!(UCSRA&(1<<UDRE)));
_putchar:
  c                    --> R16
    00F9 9B5D      SBIS	P0B,5
    00FA CFFE      RJMP	_putchar
(0020) 	 UDR=c;    
    00FB B90C      OUT	P0C,R16
(0021) 	}
    00FC 9508      RET
(0022) /*  		字符输入函数 		 */	
(0023) unsigned char getchar(void)
(0024)   	{
(0025) 	 while(!(UCSRA& (1<<RXC)));
_getchar:
    00FD 9B5F      SBIS	P0B,7
    00FE CFFE      RJMP	_getchar
(0026)      return UDR;
    00FF B10C      IN	R16,P0C
    0100 9508      RET
_puts:
  s                    --> R20
    0101 D0BD      RCALL	push_gset1
    0102 01A8      MOVW	R20,R16
(0027) 	}		
(0028) /*			字符串输出函数	   	 */	
(0029) void puts(char *s)
(0030) 	{
    0103 C005      RJMP	0x0109
(0031) 	while (*s)
(0032) 		{
(0033) 		putchar(*s);
    0104 01FA      MOVW	R30,R20
    0105 8100      LDD	R16,0+Z
    0106 DFF2      RCALL	_putchar
(0034) 		s++;
    0107 5F4F      SUBI	R20,0xFF
    0108 4F5F      SBCI	R21,0xFF
    0109 01FA      MOVW	R30,R20
    010A 8020      LDD	R2,0+Z
    010B 2022      TST	R2
    010C F7B9      BNE	0x0104
(0035) 		}	
(0036)     putchar(0x0a);//回车换行
    010D E00A      LDI	R16,0xA
    010E DFEA      RCALL	_putchar
(0037) 	putchar(0x0d);
    010F E00D      LDI	R16,0xD
    0110 DFE8      RCALL	_putchar
(0038) 	}
    0111 D0B0      RCALL	pop_gset1
    0112 9508      RET
(0039) /*			UART初始化				*/	
(0040) void uart_init(void)
(0041) {
(0042)  UCSRB=(1<<RXEN)|(1<<TXEN);//允许发送和接收
_uart_init:
    0113 E188      LDI	R24,0x18
    0114 B98A      OUT	P0A,R24
(0043)  UBRRL=(fosc/16/(baud+1))%256;
    0115 E18A      LDI	R24,0x1A
    0116 B989      OUT	P09,R24
(0044)  UBRRH=(fosc/16/(baud+1))/256;
    0117 2422      CLR	R2
    0118 BC20      OUT	P20,R2
(0045)  UCSRC=(1<<URSEL)|(1<<UCSZ1)|(1<<UCSZ0);//8位数据+1位STOP位
    0119 E886      LDI	R24,0x86
    011A BD80      OUT	P20,R24
(0046) }
    011B 9508      RET
FILE: C:\mega8\DAC\adc.c
(0001) /******************************************/
(0002) /*           广州天河双龙电子公司         */
(0003) /*           http://www.sl.com.cn         */
(0004) /*              ADC驱动程序               */
(0005) /*           作者:[e-mail]          */
(0006) /*              2002年5月11日             */
(0007) /*  目标MCU:MEGA8   晶振:外部(EXT) 8MHZ   */
(0008) /******************************************/
(0009) #include<iom8v.h>
(0010) unsigned int adc_rel;//AD转换结果
(0011) unsigned char adc_mux;//AD通道
(0012) extern unsigned int adc_old;
(0013) /*				微秒级延时程序	  		*/
(0014) void delay_us(int time)
(0015) 	 {     
(0016)   	  do
(0017) 	  	{
(0018) 		 time--;
_delay_us:
  time                 --> R16
    011C 5001      SUBI	R16,1
    011D 4010      SBCI	R17,0
(0019) 		}	
(0020)   	  while (time>1);
    011E E081      LDI	R24,1
    011F E090      LDI	R25,0
    0120 1780      CP	R24,R16
    0121 0791      CPC	R25,R17
    0122 F3CC      BLT	0x011C
(0021) 	 }	  
    0123 9508      RET
_delay_ms:
  time                 --> R20
    0124 D09A      RCALL	push_gset1
    0125 01A8      MOVW	R20,R16
(0022) /*	  		    毫秒级延时程序			*/	 
(0023) void delay_ms(unsigned int time)
(0024) 	 {
    0126 C005      RJMP	0x012C
(0025) 	  while(time!=0)
(0026) 	  	  {		
(0027) 		   delay_us(1000);
    0127 EE08      LDI	R16,0xE8
    0128 E013      LDI	R17,3
    0129 DFF2      RCALL	_delay_us
(0028) 		   time--;
    012A 5041      SUBI	R20,1
    012B 4050      SBCI	R21,0
    012C 3040      CPI	R20,0
    012D 0745      CPC	R20,R21
    012E F7C1      BNE	0x0127
(0029) 		  }
(0030) 	 }		
    012F D092      RCALL	pop_gset1
    0130 9508      RET
(0031) //ADC初始化	 
(0032) void adc_init(void)
(0033) {
(0034)  DDRC=0x00;
_adc_init:
    0131 2422      CLR	R2
    0132 BA24      OUT	P14,R2
(0035)  PORTC=0x00; 
    0133 BA25      OUT	P15,R2
(0036)  ADCSRA = 0x00; 
    0134 B826      OUT	P06,R2
(0037)  ADMUX =(1<<REFS0)|(adc_mux&0x0f);//选择内部AVCC为基准
    0135 91800074  LDS	R24,_adc_mux
    0137 708F      ANDI	R24,0xF
    0138 6480      ORI	R24,0x40
    0139 B987      OUT	P07,R24
(0038)  ACSR  =(1<<ACD);//关闭模拟比较器
    013A E880      LDI	R24,0x80
    013B B988      OUT	P08,R24
(0039)  ADCSRA=(1<<ADEN)|(1<<ADSC)|(1<<ADIE)|(1<<ADPS2)|(1<<ADPS1) ;//64分频
    013C EC8E      LDI	R24,0xCE
    013D B986      OUT	P06,R24
(0040) }
    013E 9508      RET
_adc_isr:
    013F 922A      ST	R2,-Y
    0140 923A      ST	R3,-Y
    0141 930A      ST	R16,-Y
    0142 931A      ST	R17,-Y
    0143 932A      ST	R18,-Y
    0144 933A      ST	R19,-Y
    0145 938A      ST	R24,-Y
    0146 939A      ST	R25,-Y
    0147 93EA      ST	R30,-Y
    0148 B62F      IN	R2,P3F
    0149 922A      ST	R2,-Y
(0041) //ADC完成中断
(0042) #pragma interrupt_handler adc_isr:iv_ADC     
(0043) void adc_isr(void)
(0044) {
(0045)  static unsigned i;
(0046)  adc_rel+=ADC&0x3ff;
    014A B184      IN	R24,P04
    014B B195      IN	R25,P05
    014C 7093      ANDI	R25,3
    014D 90200075  LDS	R2,_adc_rel
    014F 90300076  LDS	R3,_adc_rel+1
    0151 0E28      ADD	R2,R24
    0152 1E39      ADC	R3,R25
    0153 92300076  STS	R3,_adc_rel+1
    0155 92200075  STS	R2,_adc_rel
(0047)  ADMUX=(1<<REFS0)|(adc_mux&0x0f);//选择内部AVCC为基准
    0157 91800074  LDS	R24,_adc_mux
    0159 708F      ANDI	R24,0xF
    015A 6480      ORI	R24,0x40
    015B B987      OUT	P07,R24
(0048)  ADCSRA|=(1<<ADSC);//启动AD转换
    015C 9A36      SBI	P06,6
(0049)  if (i<63)
    015D 91800072  LDS	R24,_adc_old+2
    015F 91900073  LDS	R25,_adc_old+3
    0161 338F      CPI	R24,0x3F
    0162 E0E0      LDI	R30,0
    0163 079E      CPC	R25,R30
    0164 F430      BCC	0x016B
(0050)    i++;
    0165 9601      ADIW	R24,1
    0166 93900073  STS	R25,_adc_old+3
    0168 93800072  STS	R24,_adc_old+2
    016A C015      RJMP	0x0180
(0051)  else
(0052)    {
(0053)     adc_old=adc_rel/64;//64点平均滤波
    016B E026      LDI	R18,6
    016C E030      LDI	R19,0
    016D 91000075  LDS	R16,_adc_rel
    016F 91100076  LDS	R17,_adc_rel+1
    0171 D064      RCALL	lsr16
    0172 93100071  STS	R17,_adc_old+1
    0174 93000070  STS	R16,_adc_old
(0054) 	i=0;
    0176 2422      CLR	R2
    0177 2433      CLR	R3
    0178 92300073  STS	R3,_adc_old+3
    017A 92200072  STS	R2,_adc_old+2
(0055) 	adc_rel=0;
    017C 92300076  STS	R3,_adc_rel+1
    017E 92200075  STS	R2,_adc_rel
(0056)    }
(0057) }    0180 9029      LD	R2,Y+
    0181 BE2F      OUT	P3F,R2
    0182 91E9      LD	R30,Y+
    0183 9199      LD	R25,Y+
    0184 9189      LD	R24,Y+
    0185 9139      LD	R19,Y+
    0186 9129      LD	R18,Y+
    0187 9119      LD	R17,Y+
    0188 9109      LD	R16,Y+
    0189 9039      LD	R3,Y+
    018A 9029      LD	R2,Y+
    018B 9518      RETI
FILE: C:\mega8\DAC\read_flash.s
(0001) ;unsigned char read_flash(unsigned int add);
(0002) _read_flash::
(0003)         mov r31,r17
_read_flash:
    018C 2FF1      MOV	R31,R17
(0004) 		mov r30,r16
    018D 2FE0      MOV	R30,R16
(0005) 		lpm r16,z
    018E 9104      LD	R16,R16
(0006) 		clr r17
    018F 2711      CLR	R17
(0007) 		ret	FILE: <library>
    0190 9508      RET
push_lset:
    0191 93FA      ST	R31,-Y
    0192 93EA      ST	R30,-Y
    0193 93BA      ST	R27,-Y
    0194 93AA      ST	R26,-Y
    0195 939A      ST	R25,-Y
    0196 938A      ST	R24,-Y
    0197 933A      ST	R19,-Y
    0198 932A      ST	R18,-Y
    0199 931A      ST	R17,-Y
    019A 930A      ST	R16,-Y
    019B 929A      ST	R9,-Y
    019C 928A      ST	R8,-Y
    019D 927A      ST	R7,-Y
    019E 926A      ST	R6,-Y
    019F 925A      ST	R5,-Y
    01A0 924A      ST	R4,-Y
    01A1 923A      ST	R3,-Y
    01A2 922A      ST	R2,-Y
    01A3 921A      ST	R1,-Y
    01A4 920A      ST	R0,-Y
    01A5 B60F      IN	R0,P3F
    01A6 920A      ST	R0,-Y
    01A7 9508      RET
pop_lset:
    01A8 9009      LD	R0,Y+
    01A9 BE0F      OUT	P3F,R0
    01AA 9009      LD	R0,Y+
    01AB 9019      LD	R1,Y+
    01AC 9029      LD	R2,Y+
    01AD 9039      LD	R3,Y+
    01AE 9049      LD	R4,Y+
    01AF 9059      LD	R5,Y+
    01B0 9069      LD	R6,Y+
    01B1 9079      LD	R7,Y+
    01B2 9089      LD	R8,Y+
    01B3 9099      LD	R9,Y+
    01B4 9109      LD	R16,Y+
    01B5 9119      LD	R17,Y+
    01B6 9129      LD	R18,Y+
    01B7 9139      LD	R19,Y+
    01B8 9189      LD	R24,Y+
    01B9 9199      LD	R25,Y+
    01BA 91A9      LD	R26,Y+
    01BB 91B9      LD	R27,Y+
    01BC 91E9      LD	R30,Y+
    01BD 91F9      LD	R31,Y+
    01BE 9508      RET
push_gset1:
    01BF 935A      ST	R21,-Y
    01C0 934A      ST	R20,-Y
    01C1 9508      RET
pop_gset1:
    01C2 E0E1      LDI	R30,1
pop:
    01C3 9149      LD	R20,Y+
    01C4 9159      LD	R21,Y+
    01C5 FDE0      SBRC	R30,0
    01C6 9508      RET
    01C7 9169      LD	R22,Y+
    01C8 9179      LD	R23,Y+
    01C9 FDE1      SBRC	R30,1
    01CA 9508      RET
    01CB 90A9      LD	R10,Y+
    01CC 90B9      LD	R11,Y+
    01CD FDE2      SBRC	R30,2
    01CE 9508      RET
    01CF 90C9      LD	R12,Y+
    01D0 90D9      LD	R13,Y+
    01D1 FDE3      SBRC	R30,3
    01D2 9508      RET
    01D3 90E9      LD	R14,Y+
    01D4 90F9      LD	R15,Y+
    01D5 9508      RET
lsr16:
    01D6 2322      TST	R18
    01D7 F021      BEQ	0x01DC
    01D8 9516      LSR	R17
    01D9 9507      ROR	R16
    01DA 952A      DEC	R18
    01DB CFFA      RJMP	lsr16
    01DC 9508      RET